88c1242dc0
With the changes done in previous patches, print_insn_XXX functions don't have to be external visible out of opcodes, because both gdb and objdump select disassemblers through a single interface. This patch moves these print_insn_XXX declarations from include/dis-asm.h to opcodes/disassemble.h, which is a new header added by this patch. include: 2017-05-24 Yao Qi <yao.qi@linaro.org> * dis-asm.h: Move some function declarations to opcodes/disassemble.h. opcodes: 2017-05-24 Yao Qi <yao.qi@linaro.org> * alpha-dis.c: Include disassemble.h, don't include dis-asm.h. * avr-dis.c, bfin-dis.c, cr16-dis.c: Likewise. * crx-dis.c, d10v-dis.c, d30v-dis.c: Likewise. * disassemble.c, dlx-dis.c, epiphany-dis.c: Likewise. * fr30-dis.c, ft32-dis.c, h8300-dis.c, h8500-dis.c: Likewise. * hppa-dis.c, i370-dis.c, i386-dis.c: Likewise. * i860-dis.c, i960-dis.c, ip2k-dis.c: Likewise. * iq2000-dis.c, lm32-dis.c, m10200-dis.c: Likewise. * m10300-dis.c, m32r-dis.c, m68hc11-dis.c: Likewise. * m68k-dis.c, m88k-dis.c, mcore-dis.c: Likewise. * metag-dis.c, microblaze-dis.c, mmix-dis.c: Likewise. * moxie-dis.c, msp430-dis.c, mt-dis.c: * nds32-dis.c, nios2-dis.c, ns32k-dis.c: Likewise. * or1k-dis.c, pdp11-dis.c, pj-dis.c: Likewise. * ppc-dis.c, pru-dis.c, riscv-dis.c: Likewise. * rl78-dis.c, s390-dis.c, score-dis.c: Likewise. * sh-dis.c, sh64-dis.c, tic30-dis.c: Likewise. * tic4x-dis.c, tic54x-dis.c, tic6x-dis.c: Likewise. * tic80-dis.c, tilegx-dis.c, tilepro-dis.c: Likewise. * v850-dis.c, vax-dis.c, visium-dis.c: Likewise. * w65-dis.c, wasm32-dis.c, xc16x-dis.c: Likewise. * xgate-dis.c, xstormy16-dis.c, xtensa-dis.c: Likewise. * z80-dis.c, z8k-dis.c: Likewise. * disassemble.h: New file.
374 lines
8.8 KiB
C
374 lines
8.8 KiB
C
/* Print DEC PDP-11 instructions.
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Copyright (C) 2001-2017 Free Software Foundation, Inc.
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This file is part of the GNU opcodes library.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include "disassemble.h"
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#include "opcode/pdp11.h"
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#define AFTER_INSTRUCTION "\t"
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#define OPERAND_SEPARATOR ", "
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#define JUMP 0x1000 /* Flag that this operand is used in a jump. */
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#define FPRINTF (*info->fprintf_func)
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#define F info->stream
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/* Sign-extend a 16-bit number in an int. */
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#define SIGN_BITS (8 * sizeof (int) - 16)
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#define sign_extend(x) (((x) << SIGN_BITS) >> SIGN_BITS)
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static int
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read_word (bfd_vma memaddr, int *word, disassemble_info *info)
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{
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int status;
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bfd_byte x[2];
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status = (*info->read_memory_func) (memaddr, x, 2, info);
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if (status != 0)
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return -1;
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*word = x[1] << 8 | x[0];
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return 0;
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}
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static void
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print_signed_octal (int n, disassemble_info *info)
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{
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if (n < 0)
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FPRINTF (F, "-%o", -n);
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else
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FPRINTF (F, "%o", n);
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}
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static void
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print_reg (int reg, disassemble_info *info)
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{
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/* Mask off the addressing mode, if any. */
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reg &= 7;
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switch (reg)
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{
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case 0: case 1: case 2: case 3: case 4: case 5:
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FPRINTF (F, "r%d", reg); break;
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case 6: FPRINTF (F, "sp"); break;
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case 7: FPRINTF (F, "pc"); break;
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default: ; /* error */
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}
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}
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static void
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print_freg (int freg, disassemble_info *info)
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{
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FPRINTF (F, "fr%d", freg);
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}
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static int
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print_operand (bfd_vma *memaddr, int code, disassemble_info *info)
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{
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int mode = (code >> 3) & 7;
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int reg = code & 7;
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int disp;
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switch (mode)
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{
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case 0:
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print_reg (reg, info);
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break;
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case 1:
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FPRINTF (F, "(");
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print_reg (reg, info);
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FPRINTF (F, ")");
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break;
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case 2:
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if (reg == 7)
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{
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int data;
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if (read_word (*memaddr, &data, info) < 0)
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return -1;
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FPRINTF (F, "$");
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print_signed_octal (sign_extend (data), info);
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*memaddr += 2;
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}
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else
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{
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FPRINTF (F, "(");
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print_reg (reg, info);
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FPRINTF (F, ")+");
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}
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break;
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case 3:
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if (reg == 7)
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{
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int address;
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if (read_word (*memaddr, &address, info) < 0)
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return -1;
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FPRINTF (F, "*$%o", address);
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*memaddr += 2;
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}
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else
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{
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FPRINTF (F, "*(");
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print_reg (reg, info);
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FPRINTF (F, ")+");
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}
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break;
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case 4:
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FPRINTF (F, "-(");
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print_reg (reg, info);
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FPRINTF (F, ")");
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break;
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case 5:
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FPRINTF (F, "*-(");
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print_reg (reg, info);
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FPRINTF (F, ")");
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break;
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case 6:
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case 7:
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if (read_word (*memaddr, &disp, info) < 0)
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return -1;
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*memaddr += 2;
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if (reg == 7)
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{
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bfd_vma address = *memaddr + sign_extend (disp);
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if (mode == 7)
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FPRINTF (F, "*");
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if (!(code & JUMP))
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FPRINTF (F, "$");
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(*info->print_address_func) (address, info);
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}
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else
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{
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if (mode == 7)
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FPRINTF (F, "*");
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print_signed_octal (sign_extend (disp), info);
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FPRINTF (F, "(");
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print_reg (reg, info);
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FPRINTF (F, ")");
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}
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break;
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}
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return 0;
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}
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static int
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print_foperand (bfd_vma *memaddr, int code, disassemble_info *info)
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{
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int mode = (code >> 3) & 7;
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int reg = code & 7;
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if (mode == 0)
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print_freg (reg, info);
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else
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return print_operand (memaddr, code, info);
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return 0;
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}
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/* Print the PDP-11 instruction at address MEMADDR in debugged memory,
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on INFO->STREAM. Returns length of the instruction, in bytes. */
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int
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print_insn_pdp11 (bfd_vma memaddr, disassemble_info *info)
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{
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bfd_vma start_memaddr = memaddr;
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int opcode;
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int src, dst;
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int i;
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info->bytes_per_line = 6;
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info->bytes_per_chunk = 2;
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info->display_endian = BFD_ENDIAN_LITTLE;
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if (read_word (memaddr, &opcode, info) != 0)
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return -1;
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memaddr += 2;
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src = (opcode >> 6) & 0x3f;
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dst = opcode & 0x3f;
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for (i = 0; i < pdp11_num_opcodes; i++)
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{
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#define OP pdp11_opcodes[i]
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if ((opcode & OP.mask) == OP.opcode)
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switch (OP.type)
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{
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case PDP11_OPCODE_NO_OPS:
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FPRINTF (F, "%s", OP.name);
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goto done;
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case PDP11_OPCODE_REG:
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FPRINTF (F, "%s", OP.name);
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FPRINTF (F, AFTER_INSTRUCTION);
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print_reg (dst, info);
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goto done;
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case PDP11_OPCODE_OP:
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FPRINTF (F, "%s", OP.name);
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FPRINTF (F, AFTER_INSTRUCTION);
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if (strcmp (OP.name, "jmp") == 0)
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dst |= JUMP;
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if (print_operand (&memaddr, dst, info) < 0)
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return -1;
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goto done;
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case PDP11_OPCODE_FOP:
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FPRINTF (F, "%s", OP.name);
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FPRINTF (F, AFTER_INSTRUCTION);
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if (strcmp (OP.name, "jmp") == 0)
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dst |= JUMP;
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if (print_foperand (&memaddr, dst, info) < 0)
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return -1;
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goto done;
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case PDP11_OPCODE_REG_OP:
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FPRINTF (F, "%s", OP.name);
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FPRINTF (F, AFTER_INSTRUCTION);
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print_reg (src, info);
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FPRINTF (F, OPERAND_SEPARATOR);
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if (strcmp (OP.name, "jsr") == 0)
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dst |= JUMP;
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if (print_operand (&memaddr, dst, info) < 0)
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return -1;
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goto done;
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case PDP11_OPCODE_REG_OP_REV:
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FPRINTF (F, "%s", OP.name);
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FPRINTF (F, AFTER_INSTRUCTION);
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if (print_operand (&memaddr, dst, info) < 0)
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return -1;
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FPRINTF (F, OPERAND_SEPARATOR);
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print_reg (src, info);
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goto done;
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case PDP11_OPCODE_AC_FOP:
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{
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int ac = (opcode & 0xe0) >> 6;
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FPRINTF (F, "%s", OP.name);
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FPRINTF (F, AFTER_INSTRUCTION);
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print_freg (ac, info);
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FPRINTF (F, OPERAND_SEPARATOR);
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if (print_foperand (&memaddr, dst, info) < 0)
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return -1;
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goto done;
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}
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case PDP11_OPCODE_FOP_AC:
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{
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int ac = (opcode & 0xe0) >> 6;
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FPRINTF (F, "%s", OP.name);
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FPRINTF (F, AFTER_INSTRUCTION);
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if (print_foperand (&memaddr, dst, info) < 0)
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return -1;
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FPRINTF (F, OPERAND_SEPARATOR);
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print_freg (ac, info);
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goto done;
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}
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case PDP11_OPCODE_AC_OP:
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{
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int ac = (opcode & 0xe0) >> 6;
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FPRINTF (F, "%s", OP.name);
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FPRINTF (F, AFTER_INSTRUCTION);
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print_freg (ac, info);
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FPRINTF (F, OPERAND_SEPARATOR);
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if (print_operand (&memaddr, dst, info) < 0)
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return -1;
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goto done;
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}
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case PDP11_OPCODE_OP_AC:
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{
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int ac = (opcode & 0xe0) >> 6;
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FPRINTF (F, "%s", OP.name);
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FPRINTF (F, AFTER_INSTRUCTION);
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if (print_operand (&memaddr, dst, info) < 0)
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return -1;
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FPRINTF (F, OPERAND_SEPARATOR);
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print_freg (ac, info);
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goto done;
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}
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case PDP11_OPCODE_OP_OP:
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FPRINTF (F, "%s", OP.name);
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FPRINTF (F, AFTER_INSTRUCTION);
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if (print_operand (&memaddr, src, info) < 0)
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return -1;
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FPRINTF (F, OPERAND_SEPARATOR);
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if (print_operand (&memaddr, dst, info) < 0)
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return -1;
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goto done;
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case PDP11_OPCODE_DISPL:
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{
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int displ = (opcode & 0xff) << 8;
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bfd_vma address = memaddr + (sign_extend (displ) >> 7);
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FPRINTF (F, "%s", OP.name);
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FPRINTF (F, AFTER_INSTRUCTION);
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(*info->print_address_func) (address, info);
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goto done;
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}
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case PDP11_OPCODE_REG_DISPL:
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{
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int displ = (opcode & 0x3f) << 10;
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bfd_vma address = memaddr - (displ >> 9);
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FPRINTF (F, "%s", OP.name);
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FPRINTF (F, AFTER_INSTRUCTION);
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print_reg (src, info);
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FPRINTF (F, OPERAND_SEPARATOR);
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(*info->print_address_func) (address, info);
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goto done;
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}
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case PDP11_OPCODE_IMM8:
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{
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int code = opcode & 0xff;
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FPRINTF (F, "%s", OP.name);
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FPRINTF (F, AFTER_INSTRUCTION);
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FPRINTF (F, "%o", code);
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goto done;
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}
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case PDP11_OPCODE_IMM6:
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{
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int code = opcode & 0x3f;
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FPRINTF (F, "%s", OP.name);
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FPRINTF (F, AFTER_INSTRUCTION);
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FPRINTF (F, "%o", code);
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goto done;
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}
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case PDP11_OPCODE_IMM3:
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{
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int code = opcode & 7;
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FPRINTF (F, "%s", OP.name);
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FPRINTF (F, AFTER_INSTRUCTION);
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FPRINTF (F, "%o", code);
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goto done;
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}
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case PDP11_OPCODE_ILLEGAL:
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{
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FPRINTF (F, ".word");
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FPRINTF (F, AFTER_INSTRUCTION);
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FPRINTF (F, "%o", opcode);
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goto done;
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}
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default:
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/* TODO: is this a proper way of signalling an error? */
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FPRINTF (F, "<internal error: unrecognized instruction type>");
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return -1;
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}
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#undef OP
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}
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done:
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return memaddr - start_memaddr;
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}
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