96d56e9f91
(record_thumb_to_arm_glue, bfd_arm_process_before_allocation):
Change member name class to symbol_class.
* bfd/coff-i960.c (coff_i960_relocate_section) Rename variable
class to class_val. Change member name class to symbol_class.
* bfd/coff-rs6000.c (_bfd_xcoff_swap_aux_in)
(_bfd_xcoff_swap_aux_out): Rename arguments class to in_class.
* bfd/coff-stgo32.c (adjust_aux_in_post)
(adjust_aux_out_pre, adjust_aux_out_post): Rename arguments class
to in_class.
* bfd/coff64-rs6000.c (_bfd_xcoff64_swap_aux_in)
(_bfd_xcoff64_swap_aux_out): Rename arguments class to in_class.
* bfd/coffcode.h (coff_pointerize_aux_hook): Rename variable class
to n_sclass.
* bfd/coffgen.c (coff_write_symbol, coff_pointerize_aux): Rename
variables named class to n_sclass. (coff_write_symbols): Rename
variable class to sym_class. (bfd_coff_set_symbol_class): Rename
argument class to symbol_class.
* bfd/cofflink.c (_bfd_coff_link_hash_newfunc)
(coff_link_add_symbols, _bfd_coff_link_input_bfd)
(_bfd_coff_write_global_sym, _bfd_coff_generic_relocate_section):
Update code to use renamed members.
* bfd/coffswap.h (coff_swap_aux_in, coff_swap_aux_out): Rename
argument class to in_class.
* bfd/libcoff-in.h (struct coff_link_hash_entry, struct
coff_debug_merge_type) Renamed members class to symbol_class and
type_class.
* bfd/libcoff.h Regenerated.
* bfd/peXXigen.c: (_bfd_XXi_swap_aux_in, _bfd_XXi_swap_aux_out):
Rename argument class to in_class.
* bfd/pef.c (bfd_pef_parse_imported_symbol): Update code to use
renamed members.
* bfd/pef.h (struct bfd_pef_imported_symbol): Changed name of
member class to symbol_class.
* binutils/ieee.c (ieee_read_cxx_misc, ieee_read_cxx_class)
(ieee_read_reference): Rename variables named class to cxxclass.
* gas/config/tc-arc.c (struct syntax_classes): Rename member class
to s_class. (arc_extinst): Rename variable class to
s_class. Update code to use renamed members.
* gas/config/tc-mips.c (insn_uses_reg): Rename argument class to
regclass.
* gas/config/tc-ppc.c (ppc_csect, ppc_change_csect, ppc_function)
(ppc_tc, ppc_is_toc_sym, ppc_symbol_new_hook, ppc_frob_label)
(ppc_fix_adjustable, md_apply_fix): Update code to use renamed
members.
* gas/config/tc-ppc.h (struct ppc_tc_sy): Change name of member
from class to symbol_class. (OBJ_COPY_SYMBOL_ATTRIBUTES): Update
code to use renamed members.
* gas/config/tc-score.c (s3_adjust_paritybit): Rename argument
class to i_class.
* gas/config/tc-score7.c (s7_adjust_paritybit): Rename argument
class to i_class.
* gprof/corefile.c (core_create_function_syms): Rename variable
class to cxxclass.
* include/coff/ti.h (GET_LNSZ_SIZE, PUT_LNSZ_SIZE): Updated name
of class variable to in_class to match changes in function that
use this macro.
* include/opcode/ia64.h (struct ia64_operand): Renamed member
class to op_class
* ld/emultempl/elf32.em (gld${EMULATION_NAME}_load_symbols)
(gld${EMULATION_NAME}_try_needed): Rename variable class to
link_class
* opcodes/ia64-dis.c (print_insn_ia64): Update code to use renamed
member.
* opcodes/m88k-dis.c (m88kdis): Rename variable class to in_class.
* opcodes/tic80-opc.c (tic80_symbol_to_value)
(tic80_value_to_symbol): Rename argument class to symbol_class.
322 lines
9.8 KiB
C
322 lines
9.8 KiB
C
/* ia64-dis.c -- Disassemble ia64 instructions
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Copyright 1998, 1999, 2000, 2002, 2005, 2007, 2008, 2009
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Free Software Foundation, Inc.
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Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
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This file is part of the GNU opcodes library.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with this file; see the file COPYING. If not, write to the
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Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA. */
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#include <assert.h>
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#include <string.h>
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#include "dis-asm.h"
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#include "opcode/ia64.h"
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#define NELEMS(a) ((int) (sizeof (a) / sizeof (a[0])))
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/* Disassemble ia64 instruction. */
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/* Return the instruction type for OPCODE found in unit UNIT. */
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static enum ia64_insn_type
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unit_to_type (ia64_insn opcode, enum ia64_unit unit)
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{
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enum ia64_insn_type type;
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int op;
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op = IA64_OP (opcode);
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if (op >= 8 && (unit == IA64_UNIT_I || unit == IA64_UNIT_M))
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{
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type = IA64_TYPE_A;
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}
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else
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{
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switch (unit)
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{
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case IA64_UNIT_I:
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type = IA64_TYPE_I; break;
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case IA64_UNIT_M:
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type = IA64_TYPE_M; break;
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case IA64_UNIT_B:
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type = IA64_TYPE_B; break;
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case IA64_UNIT_F:
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type = IA64_TYPE_F; break;
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case IA64_UNIT_L:
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case IA64_UNIT_X:
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type = IA64_TYPE_X; break;
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default:
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type = -1;
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}
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}
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return type;
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}
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int
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print_insn_ia64 (bfd_vma memaddr, struct disassemble_info *info)
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{
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ia64_insn t0, t1, slot[3], template_val, s_bit, insn;
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int slotnum, j, status, need_comma, retval, slot_multiplier;
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const struct ia64_operand *odesc;
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const struct ia64_opcode *idesc;
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const char *err, *str, *tname;
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BFD_HOST_U_64_BIT value;
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bfd_byte bundle[16];
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enum ia64_unit unit;
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char regname[16];
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if (info->bytes_per_line == 0)
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info->bytes_per_line = 6;
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info->display_endian = info->endian;
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slot_multiplier = info->bytes_per_line;
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retval = slot_multiplier;
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slotnum = (((long) memaddr) & 0xf) / slot_multiplier;
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if (slotnum > 2)
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return -1;
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memaddr -= (memaddr & 0xf);
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status = (*info->read_memory_func) (memaddr, bundle, sizeof (bundle), info);
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if (status != 0)
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{
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(*info->memory_error_func) (status, memaddr, info);
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return -1;
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}
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/* bundles are always in little-endian byte order */
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t0 = bfd_getl64 (bundle);
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t1 = bfd_getl64 (bundle + 8);
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s_bit = t0 & 1;
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template_val = (t0 >> 1) & 0xf;
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slot[0] = (t0 >> 5) & 0x1ffffffffffLL;
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slot[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
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slot[2] = (t1 >> 23) & 0x1ffffffffffLL;
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tname = ia64_templ_desc[template_val].name;
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if (slotnum == 0)
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(*info->fprintf_func) (info->stream, "[%s] ", tname);
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else
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(*info->fprintf_func) (info->stream, " ");
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unit = ia64_templ_desc[template_val].exec_unit[slotnum];
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if (template_val == 2 && slotnum == 1)
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{
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/* skip L slot in MLI template: */
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slotnum = 2;
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retval += slot_multiplier;
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}
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insn = slot[slotnum];
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if (unit == IA64_UNIT_NIL)
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goto decoding_failed;
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idesc = ia64_dis_opcode (insn, unit_to_type (insn, unit));
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if (idesc == NULL)
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goto decoding_failed;
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/* print predicate, if any: */
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if ((idesc->flags & IA64_OPCODE_NO_PRED)
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|| (insn & 0x3f) == 0)
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(*info->fprintf_func) (info->stream, " ");
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else
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(*info->fprintf_func) (info->stream, "(p%02d) ", (int)(insn & 0x3f));
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/* now the actual instruction: */
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(*info->fprintf_func) (info->stream, "%s", idesc->name);
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if (idesc->operands[0])
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(*info->fprintf_func) (info->stream, " ");
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need_comma = 0;
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for (j = 0; j < NELEMS (idesc->operands) && idesc->operands[j]; ++j)
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{
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odesc = elf64_ia64_operands + idesc->operands[j];
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if (need_comma)
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(*info->fprintf_func) (info->stream, ",");
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if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
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{
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/* special case of 64 bit immediate load: */
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value = ((insn >> 13) & 0x7f) | (((insn >> 27) & 0x1ff) << 7)
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| (((insn >> 22) & 0x1f) << 16) | (((insn >> 21) & 0x1) << 21)
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| (slot[1] << 22) | (((insn >> 36) & 0x1) << 63);
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}
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else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
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{
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/* 62-bit immediate for nop.x/break.x */
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value = ((slot[1] & 0x1ffffffffffLL) << 21)
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| (((insn >> 36) & 0x1) << 20)
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| ((insn >> 6) & 0xfffff);
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}
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else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
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{
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/* 60-bit immediate for long branches. */
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value = (((insn >> 13) & 0xfffff)
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| (((insn >> 36) & 1) << 59)
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| (((slot[1] >> 2) & 0x7fffffffffLL) << 20)) << 4;
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}
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else
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{
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err = (*odesc->extract) (odesc, insn, &value);
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if (err)
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{
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(*info->fprintf_func) (info->stream, "%s", err);
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goto done;
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}
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}
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switch (odesc->op_class)
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{
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case IA64_OPND_CLASS_CST:
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(*info->fprintf_func) (info->stream, "%s", odesc->str);
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break;
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case IA64_OPND_CLASS_REG:
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if (odesc->str[0] == 'a' && odesc->str[1] == 'r')
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{
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switch (value)
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{
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case 0: case 1: case 2: case 3:
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case 4: case 5: case 6: case 7:
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sprintf (regname, "ar.k%u", (unsigned int) value);
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break;
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case 16: strcpy (regname, "ar.rsc"); break;
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case 17: strcpy (regname, "ar.bsp"); break;
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case 18: strcpy (regname, "ar.bspstore"); break;
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case 19: strcpy (regname, "ar.rnat"); break;
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case 21: strcpy (regname, "ar.fcr"); break;
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case 24: strcpy (regname, "ar.eflag"); break;
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case 25: strcpy (regname, "ar.csd"); break;
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case 26: strcpy (regname, "ar.ssd"); break;
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case 27: strcpy (regname, "ar.cflg"); break;
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case 28: strcpy (regname, "ar.fsr"); break;
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case 29: strcpy (regname, "ar.fir"); break;
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case 30: strcpy (regname, "ar.fdr"); break;
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case 32: strcpy (regname, "ar.ccv"); break;
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case 36: strcpy (regname, "ar.unat"); break;
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case 40: strcpy (regname, "ar.fpsr"); break;
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case 44: strcpy (regname, "ar.itc"); break;
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case 45: strcpy (regname, "ar.ruc"); break;
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case 64: strcpy (regname, "ar.pfs"); break;
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case 65: strcpy (regname, "ar.lc"); break;
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case 66: strcpy (regname, "ar.ec"); break;
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default:
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sprintf (regname, "ar%u", (unsigned int) value);
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break;
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}
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(*info->fprintf_func) (info->stream, "%s", regname);
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}
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else if (odesc->str[0] == 'c' && odesc->str[1] == 'r')
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{
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switch (value)
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{
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case 0: strcpy (regname, "cr.dcr"); break;
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case 1: strcpy (regname, "cr.itm"); break;
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case 2: strcpy (regname, "cr.iva"); break;
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case 8: strcpy (regname, "cr.pta"); break;
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case 16: strcpy (regname, "cr.ipsr"); break;
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case 17: strcpy (regname, "cr.isr"); break;
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case 19: strcpy (regname, "cr.iip"); break;
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case 20: strcpy (regname, "cr.ifa"); break;
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case 21: strcpy (regname, "cr.itir"); break;
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case 22: strcpy (regname, "cr.iipa"); break;
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case 23: strcpy (regname, "cr.ifs"); break;
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case 24: strcpy (regname, "cr.iim"); break;
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case 25: strcpy (regname, "cr.iha"); break;
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case 26: strcpy (regname, "cr.iib0"); break;
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case 27: strcpy (regname, "cr.iib1"); break;
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case 64: strcpy (regname, "cr.lid"); break;
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case 65: strcpy (regname, "cr.ivr"); break;
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case 66: strcpy (regname, "cr.tpr"); break;
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case 67: strcpy (regname, "cr.eoi"); break;
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case 68: strcpy (regname, "cr.irr0"); break;
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case 69: strcpy (regname, "cr.irr1"); break;
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case 70: strcpy (regname, "cr.irr2"); break;
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case 71: strcpy (regname, "cr.irr3"); break;
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case 72: strcpy (regname, "cr.itv"); break;
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case 73: strcpy (regname, "cr.pmv"); break;
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case 74: strcpy (regname, "cr.cmcv"); break;
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case 80: strcpy (regname, "cr.lrr0"); break;
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case 81: strcpy (regname, "cr.lrr1"); break;
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default:
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sprintf (regname, "cr%u", (unsigned int) value);
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break;
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}
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(*info->fprintf_func) (info->stream, "%s", regname);
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}
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else
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(*info->fprintf_func) (info->stream, "%s%d", odesc->str, (int)value);
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break;
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case IA64_OPND_CLASS_IND:
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(*info->fprintf_func) (info->stream, "%s[r%d]", odesc->str, (int)value);
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break;
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case IA64_OPND_CLASS_ABS:
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str = 0;
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if (odesc - elf64_ia64_operands == IA64_OPND_MBTYPE4)
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switch (value)
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{
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case 0x0: str = "@brcst"; break;
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case 0x8: str = "@mix"; break;
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case 0x9: str = "@shuf"; break;
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case 0xa: str = "@alt"; break;
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case 0xb: str = "@rev"; break;
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}
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if (str)
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(*info->fprintf_func) (info->stream, "%s", str);
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else if (odesc->flags & IA64_OPND_FLAG_DECIMAL_SIGNED)
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(*info->fprintf_func) (info->stream, "%lld", (long long) value);
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else if (odesc->flags & IA64_OPND_FLAG_DECIMAL_UNSIGNED)
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(*info->fprintf_func) (info->stream, "%llu", (long long) value);
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else
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(*info->fprintf_func) (info->stream, "0x%llx", (long long) value);
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break;
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case IA64_OPND_CLASS_REL:
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(*info->print_address_func) (memaddr + value, info);
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break;
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}
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need_comma = 1;
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if (j + 1 == idesc->num_outputs)
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{
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(*info->fprintf_func) (info->stream, "=");
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need_comma = 0;
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}
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}
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if (slotnum + 1 == ia64_templ_desc[template_val].group_boundary
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|| ((slotnum == 2) && s_bit))
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(*info->fprintf_func) (info->stream, ";;");
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done:
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ia64_free_opcode ((struct ia64_opcode *)idesc);
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failed:
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if (slotnum == 2)
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retval += 16 - 3*slot_multiplier;
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return retval;
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decoding_failed:
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(*info->fprintf_func) (info->stream, " data8 %#011llx", (long long) insn);
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goto failed;
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}
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