5f74bc130d
2003-09-30 Chris Demetriou <cgd@broadcom.com> * archures.c (bfd_mach_mipsisa64r2): New define. * bfd-in2.h: Regenerate. * aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2. * cpu-mips.c (I_mipsisa64r2): New enum value. (arch_info_struct): Add entry for I_mipsisa64r2. * elfxx-mips.c (_bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2. (mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case. (mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2. [ binutils/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2. [ gas/Changelog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs. * configure: Regenerate. * config/tc-mips.c (imm2_expr): New variable. (md_assemble, mips16_ip): Initialize imm2_expr. (ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2. (macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands. (macro): Handle M_DEXT and M_DINS. (validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands. (mips_ip): Likewise. (OPTION_MIPS64R2): New define. (md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2). OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2. (md_parse_option): Handle OPTION_MIPS64R2. (s_mipsset): Handle setting "mips64r2" ISA. (mips_cpu_info_table): Add mips64r2. (md_show_usage): Document -mips64r2 option. * doc/as.texinfo: Docuemnt -mips64r2 option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips64r2.d: New file. * gas/mips/cp0sel-names-mips64r2.d: New file. * gas/mips/elf_arch_mips64r2.d: New file. * gas/mips/hwr-names-mips64r2.d: New file. * gas/mips/mips32r2-ill-fp64.l: New file. * gas/mips/mips32r2-ill-fp64.s: New file. * gas/mips/mips64r2-ill.l: New file. * gas/mips/mips64r2-ill.s: New file. * gas/mips/mips64r2.d: New file. * gas/mips/mips64r2.s: New file. * gas/mips/mips.exp: Define "mips64r2" arch, and run new tests. [ include/elf/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_64R2): New define. [ include/opcode/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document +E, +F, +G, +H, and +I operand types. Update documentation of I, +B and +C operand types. (INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines. (M_DEXT, M_DINS): New enum values. [ ld/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ldmain.c (get_emulation): Ignore "-mips64r2". [ ld/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ld-mips-elf/mips-elf-flags.exp: Add tests for combinations with MIPS64r2. [ opcodes/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_arch_choices): Add entry for "mips64r2" (print_insn_args): Add handing for +E, +F, +G, and +H. * mips-opc.c (I65): New define for MIPS64r2. (mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins", "dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh", and "dshd" for MIPS64r2. Adjust "dror", "dror32", and "drorv" to be supported on MIPS64r2.
130 lines
4.5 KiB
C
130 lines
4.5 KiB
C
/* bfd back-end for mips support
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Copyright 1990, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 2000, 2002
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Free Software Foundation, Inc.
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Written by Steve Chamberlain of Cygnus Support.
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "bfd.h"
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#include "sysdep.h"
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#include "libbfd.h"
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static const bfd_arch_info_type *mips_compatible
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PARAMS ((const bfd_arch_info_type *, const bfd_arch_info_type *));
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/* The default routine tests bits_per_word, which is wrong on mips as
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mips word size doesn't correlate with reloc size. */
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static const bfd_arch_info_type *
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mips_compatible (a, b)
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const bfd_arch_info_type *a;
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const bfd_arch_info_type *b;
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{
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if (a->arch != b->arch)
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return NULL;
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/* Machine compatibility is checked in
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_bfd_mips_elf_merge_private_bfd_data. */
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return a;
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}
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#define N(BITS_WORD, BITS_ADDR, NUMBER, PRINT, DEFAULT, NEXT) \
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{ \
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BITS_WORD, /* bits in a word */ \
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BITS_ADDR, /* bits in an address */ \
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8, /* 8 bits in a byte */ \
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bfd_arch_mips, \
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NUMBER, \
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"mips", \
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PRINT, \
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3, \
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DEFAULT, \
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mips_compatible, \
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bfd_default_scan, \
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NEXT, \
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}
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enum
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{
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I_mips3000,
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I_mips3900,
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I_mips4000,
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I_mips4010,
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I_mips4100,
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I_mips4111,
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I_mips4120,
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I_mips4300,
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I_mips4400,
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I_mips4600,
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I_mips4650,
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I_mips5000,
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I_mips5400,
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I_mips5500,
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I_mips6000,
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I_mips7000,
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I_mips8000,
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I_mips10000,
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I_mips12000,
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I_mips16,
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I_mips5,
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I_mipsisa32,
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I_mipsisa32r2,
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I_mipsisa64,
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I_mipsisa64r2,
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I_sb1,
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};
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#define NN(index) (&arch_info_struct[(index) + 1])
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static const bfd_arch_info_type arch_info_struct[] =
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{
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N (32, 32, bfd_mach_mips3000, "mips:3000", FALSE, NN(I_mips3000)),
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N (32, 32, bfd_mach_mips3900, "mips:3900", FALSE, NN(I_mips3900)),
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N (64, 64, bfd_mach_mips4000, "mips:4000", FALSE, NN(I_mips4000)),
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N (64, 64, bfd_mach_mips4010, "mips:4010", FALSE, NN(I_mips4010)),
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N (64, 64, bfd_mach_mips4100, "mips:4100", FALSE, NN(I_mips4100)),
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N (64, 64, bfd_mach_mips4111, "mips:4111", FALSE, NN(I_mips4111)),
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N (64, 64, bfd_mach_mips4120, "mips:4120", FALSE, NN(I_mips4120)),
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N (64, 64, bfd_mach_mips4300, "mips:4300", FALSE, NN(I_mips4300)),
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N (64, 64, bfd_mach_mips4400, "mips:4400", FALSE, NN(I_mips4400)),
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N (64, 64, bfd_mach_mips4600, "mips:4600", FALSE, NN(I_mips4600)),
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N (64, 64, bfd_mach_mips4650, "mips:4650", FALSE, NN(I_mips4650)),
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N (64, 64, bfd_mach_mips5000, "mips:5000", FALSE, NN(I_mips5000)),
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N (64, 64, bfd_mach_mips5400, "mips:5400", FALSE, NN(I_mips5400)),
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N (64, 64, bfd_mach_mips5500, "mips:5500", FALSE, NN(I_mips5500)),
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N (32, 32, bfd_mach_mips6000, "mips:6000", FALSE, NN(I_mips6000)),
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N (64, 64, bfd_mach_mips7000, "mips:7000", FALSE, NN(I_mips7000)),
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N (64, 64, bfd_mach_mips8000, "mips:8000", FALSE, NN(I_mips8000)),
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N (64, 64, bfd_mach_mips10000,"mips:10000", FALSE, NN(I_mips10000)),
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N (64, 64, bfd_mach_mips12000,"mips:12000", FALSE, NN(I_mips12000)),
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N (64, 64, bfd_mach_mips16, "mips:16", FALSE, NN(I_mips16)),
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N (64, 64, bfd_mach_mips5, "mips:mips5", FALSE, NN(I_mips5)),
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N (32, 32, bfd_mach_mipsisa32, "mips:isa32", FALSE, NN(I_mipsisa32)),
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N (32, 32, bfd_mach_mipsisa32r2,"mips:isa32r2", FALSE, NN(I_mipsisa32r2)),
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N (64, 64, bfd_mach_mipsisa64, "mips:isa64", FALSE, NN(I_mipsisa64)),
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N (64, 64, bfd_mach_mipsisa64r2,"mips:isa64r2", FALSE, NN(I_mipsisa64r2)),
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N (64, 64, bfd_mach_mips_sb1, "mips:sb1", FALSE, 0),
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};
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/* The default architecture is mips:3000, but with a machine number of
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zero. This lets the linker distinguish between a default setting
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of mips, and an explicit setting of mips:3000. */
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const bfd_arch_info_type bfd_mips_arch =
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N (32, 32, 0, "mips", TRUE, &arch_info_struct[0]);
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