263 lines
8.1 KiB
Plaintext
263 lines
8.1 KiB
Plaintext
Thu May 15 11:45:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* insns (get_fp_reg): Use sim_fpu_u32to to perform unsigned
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conversion.
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(do_fcmp): Update to use new fp compare functions. Make reg nr arg
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instead of reg. Stops fp overflow.
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(get_fp_reg): Assume val is valid when reg == 0.
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(set_fp_reg): Fix double conversion.
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* misc.c (tic80_trace_fpu1): New function, trace simple fp op.
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* insns (do_frnd): Add tracing.
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* cpu.h (TRACE_FPU1): Ditto.
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* insns (do_trap): Printf formatting.
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Wed May 14 18:05:50 1997 Mike Meissner <meissner@cygnus.com>
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* misc.c (tic80_trace_fpu{3,2,2i}): Align columns with other
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insns. Use %g to print floating point instead of %f in case the
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numbers are real large.
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Tue May 13 18:00:10 1997 Mike Meissner <meissner@cygnus.com>
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* insns (do_trap): For system calls that are defined, but not
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provided return EINVAL. Temporarily add traps 74-79 to just print
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the register state.
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* interp.c (engine_{run_until_stop,step}): Before executing
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instructions, make sure r0 == 0.
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Tue May 13 16:39:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* alu.h (IMEM): Take full cia not just IP as argument.
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* interp.c (engine_run_until_stop): Delete handling of annuled
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instructions.
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(engine_step): Ditto.
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* insn (do_branch): New function.
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(do_bbo, do_bbz, do_bcnd, do_bsr, do_jsr): Use do_branch to handle
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annuled branches.
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Mon May 12 17:15:52 1997 Mike Meissner <meissner@cygnus.com>
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* insns (do_{ld,st}): Fix tracing for ld/st.
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Mon May 12 11:12:24 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* sim-calls.c (sim_stop_reason): Restore keep_running after a
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CNTRL-C, don't re-clear it.
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* interp.c (engine_error): stop rather than signal with SIGABRT
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when an error.
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* insns (do_ld): For 64bit loads, always store LSW in rDest, MSW in
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rDest + 1. Also done by Michael Meissner <meissner@cygnus.com>
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(do_st): Converse for store.
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* misc.c (tic80_trace_fpu2i): Correct printf format for int type.
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Sun May 11 11:02:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* sim-calls.c (sim_stop_reason): Return a SIGINT if keep_running
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was cleared.
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* interp.c (engine_step): New function. Single step the simulator
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taking care of cntrl-c during a step.
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* sim-calls.c (sim_resume): Differentiate between stepping and
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running so that a cntrl-c during a step is reported.
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Sun May 11 10:54:31 1997 Mark Alexander <marka@cygnus.com>
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* sim-calls.c (sim_fetch_register): Use correct reg base.
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(sim_store_register): Ditto.
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Sun May 11 10:25:14 1997 Michael Meissner <meissner@cygnus.com>
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* cpu.h (tic80_trace_shift): Add declaration.
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(TRACE_SHIFT): New macro to trace shift instructions.
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* misc.c (tic80_trace_alu2): Align spacing.
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(tic80_trace_shift): New function to trace shifts.
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* insns (lmo): Add missing 0b prefix to bits.
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(do_shift): Use ~ (unsigned32)0, instead of -1. Use TRACE_SHIFT
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instead of TRACE_ALU2.
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(sl r): Use EndMask as is, instead of using Source+1 register.
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(subu): Operands are unsigned, not signed.
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(do_{ld,st}): Fix endian problems with ld.d/st.d.
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Sat May 10 12:35:47 1997 Michael Meissner <meissner@cygnus.com>
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* insns (and{.tt,.tf,.ft,.ff}): Immediate values are unsigned, not
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signed.
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Fri May 9 15:47:36 1997 Mike Meissner <meissner@cygnus.com>
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* insns (cmp_vals,do_cmp): Produce the correct bits as specified
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by the architecture.
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(xor): Fix xor immediate patterns to use the correct bits.
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Fri May 9 09:55:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* alu.h (long_immediate): Adjust the CIA delay-pointer as well as
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the NIA when a 64bit insn.
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Thu May 8 11:57:47 1997 Michael Meissner <meissner@cygnus.com>
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* insns (jsr,bsr): For non-allulled calls, set r31 so that the
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return address does not reexecute the instruction in the delay
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slot.
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(bbo,bbz): Complement bit number to reverse the one's complement
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that the assembler is required to do.
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* misc.c (tic80_trace_*): Change format slightly to accomidate
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real large decimal values.
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Thu May 8 14:07:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* sim-calls.c (sim_do_command): Implement.
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(sim_store_register): Fix typo T2H v H2T.
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Wed May 7 11:48:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* cpu.h (TRACE_FPU2, TRACE_FPU3, TRACE_FPU2I): Add.
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* insn: Clean up fpu tracing.
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* sim-calls.c (sim_create_inferior): Start out with interrupts
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enabled.
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* cpu.h (TRACE_SINK3), misc.c (tic80_trace_sink3): Three argument
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sink
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* insns (rdcr, swcr, wrcr, brcr, rmo, lmo): Implement.
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* insns (do_*): Remove MY_INDEX/indx argument from support functions,
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igen now handles this.
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* cpu.h (CR): New macro - access TIc80 control registers.
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* misc.c: New file.
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(tic80_cr2index): New function, map control register opcode index
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into the internal CR enum.
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* interp.c
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(tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Move from
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here
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* misc.c: to here.
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* Makefile.in (SIM_OBJS): Add misc.o.
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Tue May 6 15:22:58 1997 Mike Meissner <meissner@cygnus.com>
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* cpu.h ({,v}{S,D}P_FPR): Delete unused macros that won't work on
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big endian hosts.
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(tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Declare
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new functions.
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(TRACE_{ALU{2,3},NOP,SINK{1,2},{,U}COND_BR,LD,ST}): New macros to
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trace various instruction types.
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* insns: Modify all instructions to support semantic tracing.
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* interp.c (toplevel): Include itable.h.
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(tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): New
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functions to provide semantic level tracing information.
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Mon May 5 11:50:43 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* alu.h: Update usage of core object to reflect recent changes in
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../common/sim-*core.
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* sim-calls.c (sim_open): Ditto.
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Mon May 5 14:10:17 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* insn (cmnd): No-op cache flushes.
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* insns (do_trap): Allow writes to STDERR.
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* Makefile.in (SIM_OBJS): Link in sim-fpu.o.
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(SIM_EXTRA_LIBS): Link in the math library.
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* alu.h: Add support for floating point unit using sim-alu.
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* insns (fadd, fsub, fmpy, fdiv, fcmp, frnd*): Implement.
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Fri May 2 14:57:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* sim-calls.c: Include sim-utils.h and sim-options.h.
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* sim-main.h (sim_state): Drop sim_events and sim_core members,
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moved to simulator base type.
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* alu.h (IMEM, MEM, STORE): Update track changes in common
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directory.
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* insns: Drop cia argument from functions, igen now handles this.
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* interp.c (engine_init): Include string.h/strings.h to define
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memset et.al.
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* sim-main.h (sim_cia): Delcare, tracking common dir changes.
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* cpu.h (sim_cpu): Update instruction_address with sim_cia.
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Wed Apr 30 11:26:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* sim-main.h (signal.h): Include so that SIG* available to all
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callers of sig_halt.
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* insns (do_shift): New function, implement shift operations.
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(do_trap): Add handler for trap 73 - SIGTRAP.
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Tue Apr 29 10:58:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* alu.h (MEM, STORE): Force addresses to be correctly aligned.
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* insns (do_jsr): Fix.
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(do_st, do_ld): Handle 64bit transfers.
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(do_trap): Match libgloss.
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(rdcr): Implement nop - Dest == r0 - variant.
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* sim-calls.c (sim_create_inferior): Initialize SP.
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* Makefile.in (ENGINE_H): Everything now depends on sim-options.h.
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(support.o): Depends on ENGINE_H.
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* cpu.h: Four accumulators.
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* Makefile.in (tmp-igen): Include line number information in
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generated files.
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* insns (dld, dst): Fill in.
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Mon Apr 28 13:02:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* insns (vld): Fix instruction format wrong.
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Thu Apr 24 16:43:09 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* dc: Add additional rules so that minor opcode files are
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detected.
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* insns: Enable more instructions.
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* sim-calls.c (sim_fetch_register,sim_store_register, sim_write):
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Implement.
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Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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* Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o.
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* sim-calls.c (sim_open): Call sim_module_uninstall if argument
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parsing fails. Call sim_post_argv_init.
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(sim_close): Call sim_module_uninstall.
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Wed Apr 23 20:05:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* insns (and, bbo, bcnd, bsr, dcache, jsr, or, xor, nor): Enable.
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* ic: Add fields for enabled instructions.
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