129 lines
3.6 KiB
C
129 lines
3.6 KiB
C
/* If we're being compiled as a .c file, rather than being included in
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d10v_sim.h, then ENDIAN_INLINE won't be defined yet. */
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#ifndef ENDIAN_INLINE
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#define NO_ENDIAN_INLINE
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#include "d10v_sim.h"
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#define ENDIAN_INLINE
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#endif
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ENDIAN_INLINE uint16
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get_word (uint8 *x)
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{
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#if (defined(__i386__) || defined(__i486__) || defined(__i586__) || defined(__i686__)) && defined(__GNUC__)
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unsigned short word = *(unsigned short *)x;
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__asm__ ("xchgb %b0,%h0" : "=q" (word) : "0" (word));
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return word;
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#elif defined(WORDS_BIGENDIAN)
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/* It is safe to do this on big endian hosts, since the d10v requires that words be
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aligned on 16-bit boundaries. */
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return *(uint16 *)x;
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#else
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return ((uint16)x[0]<<8) + x[1];
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#endif
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}
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ENDIAN_INLINE uint32
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get_longword (uint8 *x)
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{
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#if (defined(__i486__) || defined(__i586__) || defined(__i686__)) && defined(__GNUC__) && defined(USE_BSWAP)
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unsigned int long_word = *(unsigned *)x;
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__asm__ ("bswap %0" : "=r" (long_word) : "0" (long_word));
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return long_word;
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#elif (defined(__i386__) || defined(__i486__) || defined(__i586__) || defined(__i686__)) && defined(__GNUC__)
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unsigned int long_word = *(unsigned *)x;
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__asm__("xchgb %b0,%h0\n\t" /* swap lower bytes */
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"rorl $16,%0\n\t" /* swap words */
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"xchgb %b0,%h0" /* swap higher bytes */
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:"=q" (long_word)
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: "0" (long_word));
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return long_word;
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#elif (defined(_POWER) && defined(_AIX)) || (defined(__PPC__) && defined(__BIG_ENDIAN__))
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/* Power & PowerPC computers in big endian mode can handle unaligned loads&stores */
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return *(uint32 *)x;
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#elif defined(WORDS_BIGENDIAN)
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/* long words must be aligned on at least 16-bit boundaries, so this should be safe. */
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return (((uint32) *(uint16 *)x)<<16) | ((uint32) *(uint16 *)(x+2));
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#else
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return ((uint32)x[0]<<24) + ((uint32)x[1]<<16) + ((uint32)x[2]<<8) + ((uint32)x[3]);
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#endif
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}
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ENDIAN_INLINE int64
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get_longlong (uint8 *x)
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{
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uint32 top = get_longword (x);
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uint32 bottom = get_longword (x+4);
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return (((int64)top)<<32) | (int64)bottom;
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}
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ENDIAN_INLINE void
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write_word (uint8 *addr, uint16 data)
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{
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#if (defined(__i386__) || defined(__i486__) || defined(__i586__) || defined(__i686__)) && defined(__GNUC__)
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__asm__ ("xchgb %b0,%h0" : "=q" (data) : "0" (data));
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*(uint16 *)addr = data;
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#elif defined(WORDS_BIGENDIAN)
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/* It is safe to do this on big endian hosts, since the d10v requires that words be
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aligned on 16-bit boundaries. */
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*(uint16 *)addr = data;
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#else
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addr[0] = (data >> 8) & 0xff;
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addr[1] = data & 0xff;
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#endif
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}
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ENDIAN_INLINE void
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write_longword (uint8 *addr, uint32 data)
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{
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#if (defined(__i486__) || defined(__i586__) || defined(__i686__)) && defined(__GNUC__) && defined(USE_BSWAP)
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__asm__ ("bswap %0" : "=r" (data) : "0" (data));
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*(uint32 *)addr = data;
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#elif (defined(__i386__) || defined(__i486__) || defined(__i586__) || defined(__i686__)) && defined(__GNUC__)
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__asm__("xchgb %b0,%h0\n\t" /* swap lower bytes */
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"rorl $16,%0\n\t" /* swap words */
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"xchgb %b0,%h0" /* swap higher bytes */
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:"=q" (data)
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: "0" (data));
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*(uint32 *)addr = data;
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#elif (defined(_POWER) && defined(_AIX)) || (defined(__PPC__) && defined(__BIG_ENDIAN__))
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/* Power & PowerPC computers in big endian mode can handle unaligned loads&stores */
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*(uint32 *)addr = data;
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#elif defined(WORDS_BIGENDIAN)
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*(uint16 *)addr = (uint16)(data >> 16);
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*(uint16 *)(addr + 2) = (uint16)data;
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#else
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addr[0] = (data >> 24) & 0xff;
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addr[1] = (data >> 16) & 0xff;
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addr[2] = (data >> 8) & 0xff;
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addr[3] = data & 0xff;
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#endif
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}
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ENDIAN_INLINE void
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write_longlong (uint8 *addr, int64 data)
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{
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write_longword (addr, (uint32)(data >> 32));
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write_longword (addr+4, (uint32)data);
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}
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