binutils-gdb/sim
Dimitar Dimitrov e2e9097bd2 Add testsuite for the PRU simulator port
sim/testsuite/ChangeLog:

	* configure: Regenerate.

sim/testsuite/sim/pru/ChangeLog:

	* add.s: New test.
	* allinsn.exp: New file.
	* dmem-zero-pass.s: New test.
	* dmem-zero-trap.s: New test.
	* dram.s: New test.
	* jmp.s: New test.
	* loop-imm.s: New test.
	* loop-reg.s: New test.
	* mul.s: New test.
	* subreg.s: New test.
	* testutils.inc: New file.
2019-09-23 22:11:16 +01:00
..
aarch64
arm
avr
bfin
common sim: Add PRU simulator port 2019-09-23 22:11:02 +01:00
cr16
cris bfd_section_* macros 2019-09-19 09:40:13 +09:30
d10v
erc32 bfd_section_* macros 2019-09-19 09:40:13 +09:30
frv
ft32
h8300
igen
iq2000
lm32 bfd_section_* macros 2019-09-19 09:40:13 +09:30
m32c bfd_section_* macros 2019-09-19 09:40:13 +09:30
m32r
m68hc11 bfd_section_* macros 2019-09-19 09:40:13 +09:30
mcore
microblaze
mips
mn10300
moxie
msp430
or1k
ppc bfd macro conversion to inline functions 2019-09-20 18:04:02 +09:30
pru sim: Add PRU simulator port 2019-09-23 22:11:02 +01:00
rl78 bfd_section_* macros 2019-09-19 09:40:13 +09:30
rx bfd_section_* macros 2019-09-19 09:40:13 +09:30
sh
sh64
testsuite Add testsuite for the PRU simulator port 2019-09-23 22:11:16 +01:00
v850
.gitignore
ChangeLog sim: Add PRU simulator port 2019-09-23 22:11:02 +01:00
configure sim: Add PRU simulator port 2019-09-23 22:11:02 +01:00
configure.ac
configure.tgt sim: Add PRU simulator port 2019-09-23 22:11:02 +01:00
MAINTAINERS sim: Add PRU simulator port 2019-09-23 22:11:02 +01:00
Makefile.in
README-HACKING