binutils-gdb/include
Alan Modra 23cedd1dc9 PowerPC inline PLT call support
In addition to the existing relocs we need two more to mark all
instructions in the call sequence, PLTCALL on the call itself (plus
the toc restore insn for ppc64), and PLTSEQ on others.  All
relocations in a particular sequence have the same symbol.

Example ppc64 ELFv2 assembly:
 .reloc .,R_PPC64_PLTSEQ,puts
	std 2,24(1)
	addis 12,2,puts@plt@ha	# .reloc .,R_PPC64_PLT16_HA,puts
	ld 12,puts@plt@l(12)	# .reloc .,R_PPC64_PLT16_LO_DS,puts
 .reloc .,R_PPC64_PLTSEQ,puts
	mtctr 12
 .reloc .,R_PPC64_PLTCALL,puts
	bctrl
	ld 2,24(1)

Example ppc32 -fPIC assembly:
	addis 12,30,puts+32768@plt@ha # .reloc .,R_PPC_PLT16_HA,puts+0x8000
	lwz 12,12,puts+32768@plt@l    # .reloc .,R_PPC_PLT16_LO,puts+0x8000
 .reloc .,R_PPC_PLTSEQ,puts+32768
	mtctr 12
 .reloc .,R_PPC_PLTCALL,puts+32768
	bctrl

Marking sequences like this allows the linker to convert them to nops
and a direct call if the target symbol turns out to be local.

When the call is __tls_get_addr, each relocation shown above is paired
with an R_PPC*_TLSLD or R_PPC*_TLSGD reloc to additionally mark the
sequence for possible TLS optimization.  The TLSLD or TLSGD relocs are
emitted first.

include/
	* elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
	* elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
bfd/
	* elf32-ppc.c (ppc_elf_howto_raw): Add PLTSEQ and PLTCALL howtos.
	(is_plt_seq_reloc): New function.
	(ppc_elf_check_relocs): Handle PLTSEQ and PLTCALL relocs.
	(ppc_elf_tls_optimize): Handle inline plt call sequence.
	(ppc_elf_relax_section): Handle PLTCALL reloc.
	(ppc_elf_relocate_section): Nop out inline plt call sequence when
	resolving locally.
	* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_PLTSEQ and
	R_PPC64_PLTCALL entries.  Comment R_PPC64_TOCSAVE.
	(has_tls_get_addr_call): Correct comment.
	(is_branch_reloc): Add PLTCALL.
	(is_plt_seq_reloc): New function.
	(ppc64_elf_check_relocs): Handle PLT16_LO_DS reloc.  Set
	has_tls_reloc for R_PPC64_TLSGD and R_PPC64_TLSLD.  Create plt
	entry for R_PPC64_PLTCALL.
	(ppc64_elf_tls_optimize): Handle inline plt call sequence.
	(ppc_type_of_stub): Handle PLTCALL reloc.
	(toc_adjusting_stub_needed): Likewise.
	(ppc64_elf_relocate_section): Set "can_plt_call" for PLTCALL
	reloc insn.  Nop out inline plt call sequence when resolving
	locally.  Handle __tls_get_addr inline plt call optimization.
elfcpp/
	* powerpc.h (R_POWERPC_PLTSEQ, R_POWERPC_PLTCALL): Define.
gold/
	* powerpc.cc (Target_powerpc::Track_tls::maybe_skip_tls_get_addr_call):
	Handle inline plt sequence relocs.
	(Stub_table::Plt_stub_key::Plt_stub_key): Likewise.
	(Target_powerpc::Scan::reloc_needs_plt_for_ifunc): Likewise.
	(Target_powerpc::Relocate::relocate): Likewise.
2018-04-09 17:25:20 +09:30
..
aout Update year range in copyright notice of binutils files 2018-01-03 17:49:56 +10:30
cgen Update year range in copyright notice of binutils files 2018-01-03 17:49:56 +10:30
coff Prevent memory access violations when attempting to parse an x86_64 PE binary containing corrupt unwind information. 2018-03-13 14:02:52 +00:00
elf PowerPC inline PLT call support 2018-04-09 17:25:20 +09:30
gdb Update copyright year range in all GDB files 2018-01-02 07:38:06 +04:00
mach-o Update year range in copyright notice of binutils files 2018-01-03 17:49:56 +10:30
nlm Update year range in copyright notice of binutils files 2018-01-03 17:49:56 +10:30
opcode Enhance the AARCH64 assembler to support LDFF1xx instructions which use REG+REG addressing with an assumed offset register. 2018-03-28 09:44:45 +01:00
som Update year range in copyright notice of binutils files 2018-01-03 17:49:56 +10:30
vms Update year range in copyright notice of binutils files 2018-01-03 17:49:56 +10:30
COPYING
COPYING3
ChangeLog PowerPC inline PLT call support 2018-04-09 17:25:20 +09:30
ChangeLog-0415 binutils ChangeLog rotation 2016-01-01 22:59:17 +10:30
ChangeLog-2016 ChangeLog rotation 2017-01-02 13:55:05 +10:30
ChangeLog-2017 ChangeLog rotation 2018-01-03 17:49:42 +10:30
ChangeLog-9103
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