290 lines
8.0 KiB
C
290 lines
8.0 KiB
C
/* Decode header for fr30bf.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
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This file is part of the GNU Simulators.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#ifndef FR30BF_DECODE_H
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#define FR30BF_DECODE_H
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extern const IDESC *fr30bf_decode (SIM_CPU *, IADDR,
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CGEN_INSN_INT,
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ARGBUF *);
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extern void fr30bf_init_idesc_table (SIM_CPU *);
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/* Enum declaration for instructions in cpu family fr30bf. */
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typedef enum fr30bf_insn_type {
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FR30BF_INSN_X_INVALID, FR30BF_INSN_X_AFTER, FR30BF_INSN_X_BEFORE, FR30BF_INSN_X_CTI_CHAIN
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, FR30BF_INSN_X_CHAIN, FR30BF_INSN_X_BEGIN, FR30BF_INSN_ADD, FR30BF_INSN_ADDI
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, FR30BF_INSN_ADD2, FR30BF_INSN_ADDC, FR30BF_INSN_ADDN, FR30BF_INSN_ADDNI
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, FR30BF_INSN_ADDN2, FR30BF_INSN_SUB, FR30BF_INSN_SUBC, FR30BF_INSN_SUBN
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, FR30BF_INSN_CMP, FR30BF_INSN_CMPI, FR30BF_INSN_CMP2, FR30BF_INSN_AND
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, FR30BF_INSN_OR, FR30BF_INSN_EOR, FR30BF_INSN_ANDM, FR30BF_INSN_ANDH
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, FR30BF_INSN_ANDB, FR30BF_INSN_ORM, FR30BF_INSN_ORH, FR30BF_INSN_ORB
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, FR30BF_INSN_EORM, FR30BF_INSN_EORH, FR30BF_INSN_EORB, FR30BF_INSN_BANDL
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, FR30BF_INSN_BORL, FR30BF_INSN_BEORL, FR30BF_INSN_BANDH, FR30BF_INSN_BORH
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, FR30BF_INSN_BEORH, FR30BF_INSN_BTSTL, FR30BF_INSN_BTSTH, FR30BF_INSN_MUL
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, FR30BF_INSN_MULU, FR30BF_INSN_MULH, FR30BF_INSN_MULUH, FR30BF_INSN_DIV0S
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, FR30BF_INSN_DIV0U, FR30BF_INSN_DIV1, FR30BF_INSN_DIV2, FR30BF_INSN_DIV3
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, FR30BF_INSN_DIV4S, FR30BF_INSN_LSL, FR30BF_INSN_LSLI, FR30BF_INSN_LSL2
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, FR30BF_INSN_LSR, FR30BF_INSN_LSRI, FR30BF_INSN_LSR2, FR30BF_INSN_ASR
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, FR30BF_INSN_ASRI, FR30BF_INSN_ASR2, FR30BF_INSN_LDI8, FR30BF_INSN_LDI20
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, FR30BF_INSN_LDI32, FR30BF_INSN_LD, FR30BF_INSN_LDUH, FR30BF_INSN_LDUB
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, FR30BF_INSN_LDR13, FR30BF_INSN_LDR13UH, FR30BF_INSN_LDR13UB, FR30BF_INSN_LDR14
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, FR30BF_INSN_LDR14UH, FR30BF_INSN_LDR14UB, FR30BF_INSN_LDR15, FR30BF_INSN_LDR15GR
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, FR30BF_INSN_LDR15DR, FR30BF_INSN_LDR15PS, FR30BF_INSN_ST, FR30BF_INSN_STH
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, FR30BF_INSN_STB, FR30BF_INSN_STR13, FR30BF_INSN_STR13H, FR30BF_INSN_STR13B
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, FR30BF_INSN_STR14, FR30BF_INSN_STR14H, FR30BF_INSN_STR14B, FR30BF_INSN_STR15
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, FR30BF_INSN_STR15GR, FR30BF_INSN_STR15DR, FR30BF_INSN_STR15PS, FR30BF_INSN_MOV
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, FR30BF_INSN_MOVDR, FR30BF_INSN_MOVPS, FR30BF_INSN_MOV2DR, FR30BF_INSN_MOV2PS
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, FR30BF_INSN_JMP, FR30BF_INSN_JMPD, FR30BF_INSN_CALLR, FR30BF_INSN_CALLRD
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, FR30BF_INSN_CALL, FR30BF_INSN_CALLD, FR30BF_INSN_RET, FR30BF_INSN_RET_D
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, FR30BF_INSN_INT, FR30BF_INSN_INTE, FR30BF_INSN_RETI, FR30BF_INSN_BRAD
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, FR30BF_INSN_BRA, FR30BF_INSN_BNOD, FR30BF_INSN_BNO, FR30BF_INSN_BEQD
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, FR30BF_INSN_BEQ, FR30BF_INSN_BNED, FR30BF_INSN_BNE, FR30BF_INSN_BCD
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, FR30BF_INSN_BC, FR30BF_INSN_BNCD, FR30BF_INSN_BNC, FR30BF_INSN_BND
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, FR30BF_INSN_BN, FR30BF_INSN_BPD, FR30BF_INSN_BP, FR30BF_INSN_BVD
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, FR30BF_INSN_BV, FR30BF_INSN_BNVD, FR30BF_INSN_BNV, FR30BF_INSN_BLTD
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, FR30BF_INSN_BLT, FR30BF_INSN_BGED, FR30BF_INSN_BGE, FR30BF_INSN_BLED
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, FR30BF_INSN_BLE, FR30BF_INSN_BGTD, FR30BF_INSN_BGT, FR30BF_INSN_BLSD
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, FR30BF_INSN_BLS, FR30BF_INSN_BHID, FR30BF_INSN_BHI, FR30BF_INSN_DMOVR13
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, FR30BF_INSN_DMOVR13H, FR30BF_INSN_DMOVR13B, FR30BF_INSN_DMOVR13PI, FR30BF_INSN_DMOVR13PIH
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, FR30BF_INSN_DMOVR13PIB, FR30BF_INSN_DMOVR15PI, FR30BF_INSN_DMOV2R13, FR30BF_INSN_DMOV2R13H
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, FR30BF_INSN_DMOV2R13B, FR30BF_INSN_DMOV2R13PI, FR30BF_INSN_DMOV2R13PIH, FR30BF_INSN_DMOV2R13PIB
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, FR30BF_INSN_DMOV2R15PD, FR30BF_INSN_LDRES, FR30BF_INSN_STRES, FR30BF_INSN_COPOP
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, FR30BF_INSN_COPLD, FR30BF_INSN_COPST, FR30BF_INSN_COPSV, FR30BF_INSN_NOP
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, FR30BF_INSN_ANDCCR, FR30BF_INSN_ORCCR, FR30BF_INSN_STILM, FR30BF_INSN_ADDSP
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, FR30BF_INSN_EXTSB, FR30BF_INSN_EXTUB, FR30BF_INSN_EXTSH, FR30BF_INSN_EXTUH
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, FR30BF_INSN_LDM0, FR30BF_INSN_LDM1, FR30BF_INSN_STM0, FR30BF_INSN_STM1
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, FR30BF_INSN_ENTER, FR30BF_INSN_LEAVE, FR30BF_INSN_XCHB, FR30BF_INSN_MAX
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} FR30BF_INSN_TYPE;
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#if ! WITH_SEM_SWITCH_FULL
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#define SEMFULL(fn) extern SEMANTIC_FN CONCAT3 (fr30bf,_sem_,fn);
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#else
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#define SEMFULL(fn)
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#endif
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#if ! WITH_SEM_SWITCH_FAST
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#define SEMFAST(fn) extern SEMANTIC_FN CONCAT3 (fr30bf,_semf_,fn);
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#else
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#define SEMFAST(fn)
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#endif
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#define SEM(fn) SEMFULL (fn) SEMFAST (fn)
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/* The function version of the before/after handlers is always needed,
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so we always want the SEMFULL declaration of them. */
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extern SEMANTIC_FN CONCAT3 (fr30bf,_sem_,x_before);
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extern SEMANTIC_FN CONCAT3 (fr30bf,_sem_,x_after);
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SEM (x_invalid)
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SEM (x_after)
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SEM (x_before)
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SEM (x_cti_chain)
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SEM (x_chain)
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SEM (x_begin)
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SEM (add)
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SEM (addi)
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SEM (add2)
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SEM (addc)
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SEM (addn)
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SEM (addni)
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SEM (addn2)
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SEM (sub)
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SEM (subc)
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SEM (subn)
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SEM (cmp)
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SEM (cmpi)
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SEM (cmp2)
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SEM (and)
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SEM (or)
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SEM (eor)
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SEM (andm)
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SEM (andh)
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SEM (andb)
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SEM (orm)
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SEM (orh)
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SEM (orb)
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SEM (eorm)
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SEM (eorh)
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SEM (eorb)
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SEM (bandl)
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SEM (borl)
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SEM (beorl)
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SEM (bandh)
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SEM (borh)
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SEM (beorh)
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SEM (btstl)
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SEM (btsth)
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SEM (mul)
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SEM (mulu)
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SEM (mulh)
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SEM (muluh)
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SEM (div0s)
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SEM (div0u)
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SEM (div1)
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SEM (div2)
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SEM (div3)
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SEM (div4s)
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SEM (lsl)
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SEM (lsli)
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SEM (lsl2)
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SEM (lsr)
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SEM (lsri)
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SEM (lsr2)
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SEM (asr)
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SEM (asri)
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SEM (asr2)
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SEM (ldi8)
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SEM (ldi20)
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SEM (ldi32)
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SEM (ld)
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SEM (lduh)
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SEM (ldub)
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SEM (ldr13)
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SEM (ldr13uh)
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SEM (ldr13ub)
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SEM (ldr14)
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SEM (ldr14uh)
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SEM (ldr14ub)
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SEM (ldr15)
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SEM (ldr15gr)
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SEM (ldr15dr)
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SEM (ldr15ps)
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SEM (st)
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SEM (sth)
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SEM (stb)
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SEM (str13)
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SEM (str13h)
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SEM (str13b)
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SEM (str14)
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SEM (str14h)
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SEM (str14b)
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SEM (str15)
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SEM (str15gr)
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SEM (str15dr)
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SEM (str15ps)
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SEM (mov)
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SEM (movdr)
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SEM (movps)
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SEM (mov2dr)
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SEM (mov2ps)
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SEM (jmp)
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SEM (jmpd)
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SEM (callr)
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SEM (callrd)
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SEM (call)
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SEM (calld)
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SEM (ret)
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SEM (ret_d)
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SEM (int)
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SEM (inte)
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SEM (reti)
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SEM (brad)
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SEM (bra)
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SEM (bnod)
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SEM (bno)
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SEM (beqd)
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SEM (beq)
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SEM (bned)
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SEM (bne)
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SEM (bcd)
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SEM (bc)
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SEM (bncd)
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SEM (bnc)
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SEM (bnd)
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SEM (bn)
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SEM (bpd)
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SEM (bp)
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SEM (bvd)
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SEM (bv)
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SEM (bnvd)
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SEM (bnv)
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SEM (bltd)
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SEM (blt)
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SEM (bged)
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SEM (bge)
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SEM (bled)
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SEM (ble)
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SEM (bgtd)
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SEM (bgt)
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SEM (blsd)
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SEM (bls)
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SEM (bhid)
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SEM (bhi)
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SEM (dmovr13)
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SEM (dmovr13h)
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SEM (dmovr13b)
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SEM (dmovr13pi)
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SEM (dmovr13pih)
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SEM (dmovr13pib)
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SEM (dmovr15pi)
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SEM (dmov2r13)
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SEM (dmov2r13h)
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SEM (dmov2r13b)
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SEM (dmov2r13pi)
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SEM (dmov2r13pih)
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SEM (dmov2r13pib)
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SEM (dmov2r15pd)
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SEM (ldres)
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SEM (stres)
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SEM (copop)
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SEM (copld)
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SEM (copst)
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SEM (copsv)
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SEM (nop)
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SEM (andccr)
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SEM (orccr)
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SEM (stilm)
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SEM (addsp)
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SEM (extsb)
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SEM (extub)
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SEM (extsh)
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SEM (extuh)
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SEM (ldm0)
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SEM (ldm1)
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SEM (stm0)
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SEM (stm1)
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SEM (enter)
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SEM (leave)
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SEM (xchb)
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#undef SEMFULL
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#undef SEMFAST
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#undef SEM
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/* Function unit handlers (user written). */
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extern int fr30bf_model_fr30_1_u_stm (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*reglist*/);
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extern int fr30bf_model_fr30_1_u_ldm (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*reglist*/);
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extern int fr30bf_model_fr30_1_u_store (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Ri*/, INT /*Rj*/);
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extern int fr30bf_model_fr30_1_u_load (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Rj*/, INT /*Ri*/);
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extern int fr30bf_model_fr30_1_u_cti (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Ri*/);
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extern int fr30bf_model_fr30_1_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Ri*/, INT /*Rj*/, INT /*Ri*/);
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/* Profiling before/after handlers (user written) */
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extern void fr30bf_model_insn_before (SIM_CPU *, int /*first_p*/);
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extern void fr30bf_model_insn_after (SIM_CPU *, int /*last_p*/, int /*cycles*/);
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#endif /* FR30BF_DECODE_H */
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