891 lines
28 KiB
Groff
891 lines
28 KiB
Groff
.rn '' }`
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''' $RCSfile$$Revision$$Date$
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'''
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''' $Log$
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''' Revision 1.7 2001/03/25 20:32:29 nickc
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''' Automate generate on man pages
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'''
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'''
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.de Sh
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.br
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.if t .Sp
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.ne 5
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.PP
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\fB\\$1\fR
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.PP
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..
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.de Sp
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.if t .sp .5v
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.if n .sp
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..
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.de Ip
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.br
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.ie \\n(.$>=3 .ne \\$3
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.el .ne 3
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.IP "\\$1" \\$2
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..
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.de Vb
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.ft CW
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.nf
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.ne \\$1
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..
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.de Ve
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.ft R
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.fi
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..
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'''
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'''
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''' Set up \*(-- to give an unbreakable dash;
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''' string Tr holds user defined translation string.
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''' Bell System Logo is used as a dummy character.
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'''
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.tr \(*W-|\(bv\*(Tr
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.ie n \{\
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.ds -- \(*W-
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.ds PI pi
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.if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
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.if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
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.ds L" ""
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.ds R" ""
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''' \*(M", \*(S", \*(N" and \*(T" are the equivalent of
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''' \*(L" and \*(R", except that they are used on ".xx" lines,
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''' such as .IP and .SH, which do another additional levels of
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''' double-quote interpretation
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.ds M" """
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.ds S" """
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.ds N" """""
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.ds T" """""
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.ds L' '
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.ds R' '
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.ds M' '
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.ds S' '
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.ds N' '
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.ds T' '
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'br\}
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.el\{\
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.ds -- \(em\|
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.tr \*(Tr
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.ds L" ``
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.ds R" ''
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.ds M" ``
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.ds S" ''
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.ds N" ``
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.ds T" ''
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.ds L' `
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.ds R' '
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.ds M' `
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.ds S' '
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.ds N' `
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.ds T' '
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.ds PI \(*p
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'br\}
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.\" If the F register is turned on, we'll generate
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.\" index entries out stderr for the following things:
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.\" TH Title
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.\" SH Header
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.\" Sh Subsection
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.\" Ip Item
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.\" X<> Xref (embedded
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.\" Of course, you have to process the output yourself
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.\" in some meaninful fashion.
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.if \nF \{
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.de IX
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.tm Index:\\$1\t\\n%\t"\\$2"
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..
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.nr % 0
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.rr F
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.\}
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.TH AS 1 "binutils-2.11.90" "23/Mar/101" "GNU"
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.UC
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.if n .hy 0
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.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
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.de CQ \" put $1 in typewriter font
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.ft CW
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'if n "\c
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'if t \\&\\$1\c
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'if n \\&\\$1\c
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'if n \&"
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\\&\\$2 \\$3 \\$4 \\$5 \\$6 \\$7
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'.ft R
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..
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.\" @(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2
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. \" AM - accent mark definitions
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.bd B 3
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. \" fudge factors for nroff and troff
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.if n \{\
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. ds #H 0
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. ds #V .8m
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. ds #F .3m
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. ds #[ \f1
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. ds #] \fP
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.\}
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.if t \{\
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. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
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. ds #V .6m
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. ds #F 0
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. ds #[ \&
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. ds #] \&
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.\}
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. \" simple accents for nroff and troff
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.if n \{\
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. ds ' \&
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. ds ` \&
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. ds ^ \&
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. ds , \&
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. ds ~ ~
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. ds ? ?
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. ds ! !
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. ds /
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. ds q
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.\}
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.if t \{\
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. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
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. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
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. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
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. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
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. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
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. ds ? \s-2c\h'-\w'c'u*7/10'\u\h'\*(#H'\zi\d\s+2\h'\w'c'u*8/10'
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. ds ! \s-2\(or\s+2\h'-\w'\(or'u'\v'-.8m'.\v'.8m'
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. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
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. ds q o\h'-\w'o'u*8/10'\s-4\v'.4m'\z\(*i\v'-.4m'\s+4\h'\w'o'u*8/10'
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.\}
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. \" troff and (daisy-wheel) nroff accents
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.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
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.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
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.ds v \\k:\h'-(\\n(.wu*9/10-\*(#H)'\v'-\*(#V'\*(#[\s-4v\s0\v'\*(#V'\h'|\\n:u'\*(#]
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.ds _ \\k:\h'-(\\n(.wu*9/10-\*(#H+(\*(#F*2/3))'\v'-.4m'\z\(hy\v'.4m'\h'|\\n:u'
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.ds . \\k:\h'-(\\n(.wu*8/10)'\v'\*(#V*4/10'\z.\v'-\*(#V*4/10'\h'|\\n:u'
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.ds 3 \*(#[\v'.2m'\s-2\&3\s0\v'-.2m'\*(#]
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.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
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.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
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.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
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.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
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.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
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.ds ae a\h'-(\w'a'u*4/10)'e
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.ds Ae A\h'-(\w'A'u*4/10)'E
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.ds oe o\h'-(\w'o'u*4/10)'e
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.ds Oe O\h'-(\w'O'u*4/10)'E
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. \" corrections for vroff
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.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
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.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
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. \" for low resolution devices (crt and lpr)
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.if \n(.H>23 .if \n(.V>19 \
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\{\
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. ds : e
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. ds 8 ss
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. ds v \h'-1'\o'\(aa\(ga'
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. ds _ \h'-1'^
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. ds . \h'-1'.
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. ds 3 3
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. ds o a
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. ds d- d\h'-1'\(ga
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. ds D- D\h'-1'\(hy
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. ds th \o'bp'
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. ds Th \o'LP'
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. ds ae ae
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. ds Ae AE
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. ds oe oe
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. ds Oe OE
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.\}
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.rm #[ #] #H #V #F C
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.SH "NAME"
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AS \- the portable GNU assembler.
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.SH "SYNOPSIS"
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as [ \-a[cdhlns][=file] ] [ \-D ] [ --defsym \fIsym\fR=\fIval\fR ]
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[ \-f ] [ --gstabs ] [ --gdwarf2 ] [ --help ] [ \-I \fIdir\fR ]
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[ \-J ] [ \-K ] [ \-L ]
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[ --listing\*(--lhs-width=NUM ][ --listing-lhs-width2=NUM ]
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[ --listing-rhs-width=NUM ][ --listing-cont-lines=NUM ]
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[ --keep-locals ] [ \-o \fIobjfile\fR ] [ \-R ] [ --statistics ] [ \-v ]
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[ \-version ] [ --version ] [ \-W ] [ --warn ] [ --fatal-warnings ]
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[ \-w ] [ \-x ] [ \-Z ] [ --target-help ]
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[ \-marc[5|6|7|8] ]
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[ \-EB | \-EL ]
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[ \-m[arm]1 | \-m[arm]2 | \-m[arm]250 | \-m[arm]3 |
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\-m[arm]6 | \-m[arm]60 | \-m[arm]600 | \-m[arm]610 |
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\-m[arm]620 | \-m[arm]7[t][[d]m[i]][fe] | \-m[arm]70 |
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\-m[arm]700 | \-m[arm]710[c] | \-m[arm]7100 |
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\-m[arm]7500 | \-m[arm]8 | \-m[arm]810 | \-m[arm]9 |
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\-m[arm]920 | \-m[arm]920t | \-m[arm]9tdmi |
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\-mstrongarm | \-mstrongarm110 | \-mstrongarm1100 ]
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[ \-m[arm]v2 | \-m[arm]v2a | \-m[arm]v3 | \-m[arm]v3m |
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\-m[arm]v4 | \-m[arm]v4t | \-m[arm]v5 | \-[arm]v5t |
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\-[arm]v5te ]
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[ \-mthumb | \-mall ]
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[ \-mfpa10 | \-mfpa11 | \-mfpe-old | \-mno-fpu ]
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[ \-EB | \-EL ]
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[ \-mapcs-32 | \-mapcs-26 | \-mapcs-float |
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\-mapcs-reentrant ]
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[ \-mthumb-interwork ] [ \-moabi ] [ \-k ]
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[ \-O ]
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[ \-O | \-n | \-N ]
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[ \-mb | \-me ]
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[ \-Av6 | \-Av7 | \-Av8 | \-Asparclet | \-Asparclite
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\-Av8plus | \-Av8plusa | \-Av9 | \-Av9a ]
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[ \-xarch=v8plus | \-xarch=v8plusa ] [ \-bump ]
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[ \-32 | \-64 ]
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[ \-ACA | \-ACA_A | \-ACB | \-ACC | \-AKA | \-AKB |
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\-AKC | \-AMC ]
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[ \-b ] [ \-no-relax ]
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[ --m32rx | --[no-]warn-explicit-parallel-conflicts |
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--W[n]p ]
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[ \-l ] [ \-m68000 | \-m68010 | \-m68020 | ... ]
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[ \-jsri2bsr ] [ \-sifilter ] [ \-relax ]
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[ \-mcpu=[210|340] ]
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[ \-m68hc11 | \-m68hc12 ]
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[ --force-long-branchs ] [ --short-branchs ]
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[ --strict-direct-mode ] [ --print-insn-syntax ]
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[ --print-opcodes ] [ --generate-example ]
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[ \-nocpp ] [ \-EL ] [ \-EB ] [ \-G \fInum\fR ] [ \-mcpu=\fICPU\fR ]
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[ \-mips1 ] [ \-mips2 ] [ \-mips3 ] [ \-mips4 ] [ \-mips5 ]
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[ \-mips32 ] [ \-mips64 ]
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[ \-m4650 ] [ \-no-m4650 ]
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[ --trap ] [ --break ]
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[ --emulation=\fIname\fR ]
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[ -- | \fIfiles\fR ... ]
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.SH "DESCRIPTION"
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GNU \f(CWas\fR is really a family of assemblers.
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If you use (or have used) the GNU assembler on one architecture, you
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should find a fairly similar environment when you use it on another
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architecture. Each version has much in common with the others,
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including object file formats, most assembler directives (often called
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\fIpseudo-ops\fR) and assembler syntax.
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.PP
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\f(CWas\fR is primarily intended to assemble the output of the
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GNU C compiler \f(CW\fR for use by the linker
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\f(CW\fR. Nevertheless, we've tried to make \f(CWas\fR
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assemble correctly everything that other assemblers for the same
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machine would assemble.
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Any exceptions are documented explicitly.
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This doesn't mean \f(CWas\fR always uses the same syntax as another
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assembler for the same architecture; for example, we know of several
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incompatible versions of 680x0 assembly language syntax.
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.PP
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Each time you run \f(CWas\fR it assembles exactly one source
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program. The source program is made up of one or more files.
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(The standard input is also a file.)
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.PP
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You give \f(CWas\fR a command line that has zero or more input file
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names. The input files are read (from left file name to right). A
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command line argument (in any position) that has no special meaning
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is taken to be an input file name.
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.PP
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If you give \f(CWas\fR no file names it attempts to read one input file
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from the \f(CWas\fR standard input, which is normally your terminal. You
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may have to type \fBctl-D\fR to tell \f(CWas\fR there is no more program
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to assemble.
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.PP
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Use \fB--\fR if you need to explicitly name the standard input file
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in your command line.
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.PP
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If the source is empty, \f(CWas\fR produces a small, empty object
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file.
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.PP
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\f(CWas\fR may write warnings and error messages to the standard error
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file (usually your terminal). This should not happen when a compiler
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runs \f(CWas\fR automatically. Warnings report an assumption made so
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that \f(CWas\fR could keep assembling a flawed program; errors report a
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grave problem that stops the assembly.
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.PP
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If you are invoking \f(CWas\fR via the GNU C compiler (version 2),
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you can use the \fB\-Wa\fR option to pass arguments through to the assembler.
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The assembler arguments must be separated from each other (and the \fB\-Wa\fR)
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by commas. For example:
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.PP
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.Vb 2
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\&
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\& gcc -c -g -O -Wa,-alh,-L file.c
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.Ve
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This passes two options to the assembler: \fB\-alh\fR (emit a listing to
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standard output with with high-level and assembly source) and \fB\-L\fR (retain
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local symbols in the symbol table).
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.PP
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Usually you do not need to use this \fB\-Wa\fR mechanism, since many compiler
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command-line options are automatically passed to the assembler by the compiler.
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(You can call the GNU compiler driver with the \fB\-v\fR option to see
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precisely what options it passes to each compilation pass, including the
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assembler.)
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.SH "OPTIONS"
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.Ip "\f(CW-a[cdhlmns]\fR" 4
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Turn on listings, in any of a variety of ways:
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.Ip "\f(CW-ac\fR" 8
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omit false conditionals
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.Ip "\f(CW-ad\fR" 8
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omit debugging directives
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.Ip "\f(CW-ah\fR" 8
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include high-level source
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.Ip "\f(CW-al\fR" 8
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include assembly
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.Ip "\f(CW-am\fR" 8
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include macro expansions
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.Ip "\f(CW-an\fR" 8
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omit forms processing
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.Ip "\f(CW-as\fR" 8
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include symbols
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.Ip "\f(CW=file\fR" 8
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set the name of the listing file
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.Sp
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You may combine these options; for example, use \fB\-aln\fR for assembly
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listing without forms processing. The \fB=file\fR option, if used, must be
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the last one. By itself, \fB\-a\fR defaults to \fB\-ahls\fR.
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.Ip "\f(CW-D\fR" 4
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Ignored. This option is accepted for script compatibility with calls to
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other assemblers.
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.Ip "\f(CW--defsym \fIsym\fR=\fIvalue\fR\fR" 4
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Define the symbol \fIsym\fR to be \fIvalue\fR before assembling the input file.
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\fIvalue\fR must be an integer constant. As in C, a leading \fB0x\fR
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indicates a hexadecimal value, and a leading \fB0\fR indicates an octal value.
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.Ip "\f(CW-f\fR" 4
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``fast'\*(R'---skip whitespace and comment preprocessing (assume source is
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compiler output).
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.Ip "\f(CW--gstabs\fR" 4
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Generate stabs debugging information for each assembler line. This
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may help debugging assembler code, if the debugger can handle it.
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.Ip "\f(CW--gdwarf2\fR" 4
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Generate \s-1DWARF2\s0 debugging information for each assembler line. This
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may help debugging assembler code, if the debugger can handle it. Note \- this
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option is only supported by some targets, not all of them.
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.Ip "\f(CW--help\fR" 4
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Print a summary of the command line options and exit.
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.Ip "\f(CW--target-help\fR" 4
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Print a summary of all target specific options and exit.
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.Ip "\f(CW-I \fIdir\fR\fR" 4
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Add directory \fIdir\fR to the search list for \f(CW.include\fR directives.
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.Ip "\f(CW-J\fR" 4
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Don't warn about signed overflow.
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.Ip "\f(CW-K\fR" 4
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This option is accepted but has no effect on the \s-1TARGET\s0 family.
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.Ip "\f(CW-L\fR" 4
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.Ip "\f(CW--keep-locals\fR" 4
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Keep (in the symbol table) local symbols. On traditional a.out systems
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these start with \fBL\fR, but different systems have different local
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label prefixes.
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.Ip "\f(CW--listing-lhs-width=\fInumber\fR\fR" 4
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Set the maximum width, in words, of the output data column for an assembler
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listing to \fInumber\fR.
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.Ip "\f(CW--listing-lhs-width2=\fInumber\fR\fR" 4
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Set the maximum width, in words, of the output data column for continuation
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lines in an assembler listing to \fInumber\fR.
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.Ip "\f(CW--listing-rhs-width=\fInumber\fR\fR" 4
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Set the maximum width of an input source line, as displayed in a listing, to
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\fInumber\fR bytes.
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.Ip "\f(CW--listing-cont-lines=\fInumber\fR\fR" 4
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Set the maximum number of lines printed in a listing for a single line of input
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to \fInumber\fR + 1.
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.Ip "\f(CW-o \fIobjfile\fR\fR" 4
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Name the object-file output from \f(CWas\fR \fIobjfile\fR.
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.Ip "\f(CW-R\fR" 4
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Fold the data section into the text section.
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.Ip "\f(CW--statistics\fR" 4
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Print the maximum space (in bytes) and total time (in seconds) used by
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assembly.
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.Ip "\f(CW--strip-local-absolute\fR" 4
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Remove local absolute symbols from the outgoing symbol table.
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.Ip "\f(CW-v\fR" 4
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.Ip "\f(CW-version\fR" 4
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Print the \f(CWas\fR version.
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.Ip "\f(CW--version\fR" 4
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Print the \f(CWas\fR version and exit.
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.Ip "\f(CW-W\fR" 4
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.Ip "\f(CW--no-warn\fR" 4
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Suppress warning messages.
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.Ip "\f(CW--fatal-warnings\fR" 4
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Treat warnings as errors.
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.Ip "\f(CW--warn\fR" 4
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|
Don't suppress warning messages or treat them as errors.
|
|
.Ip "\f(CW-w\fR" 4
|
|
Ignored.
|
|
.Ip "\f(CW-x\fR" 4
|
|
Ignored.
|
|
.Ip "\f(CW-Z\fR" 4
|
|
Generate an object file even after errors.
|
|
.Ip "\f(CW-- | \fIfiles\fR ...\fR" 4
|
|
Standard input, or source files to assemble.
|
|
.PP
|
|
The following options are available when as is configured for
|
|
an \s-1ARC\s0 processor.
|
|
.Ip "\f(CW-marc[5|6|7|8]\fR" 4
|
|
This option selects the core processor variant.
|
|
.Ip "\f(CW-EB | -EL\fR" 4
|
|
Select either big-endian (\-\s-1EB\s0) or little-endian (\-\s-1EL\s0) output.
|
|
.PP
|
|
The following options are available when as is configured for the \s-1ARM\s0
|
|
processor family.
|
|
.Ip "\f(CW-m[arm][1|2|3|6|7|8|9][...] \fR" 4
|
|
Specify which \s-1ARM\s0 processor variant is the target.
|
|
.Ip "\f(CW-m[arm]v[2|2a|3|3m|4|4t|5|5t]\fR" 4
|
|
Specify which \s-1ARM\s0 architecture variant is used by the target.
|
|
.Ip "\f(CW-mthumb | -mall\fR" 4
|
|
Enable or disable Thumb only instruction decoding.
|
|
.Ip "\f(CW-mfpa10 | -mfpa11 | -mfpe-old | -mno-fpu\fR" 4
|
|
Select which Floating Point architecture is the target.
|
|
.Ip "\f(CW-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant | -moabi\fR" 4
|
|
Select which procedure calling convention is in use.
|
|
.Ip "\f(CW-EB | -EL\fR" 4
|
|
Select either big-endian (\-\s-1EB\s0) or little-endian (\-\s-1EL\s0) output.
|
|
.Ip "\f(CW-mthumb-interwork\fR" 4
|
|
Specify that the code has been generated with interworking between Thumb and
|
|
\s-1ARM\s0 code in mind.
|
|
.Ip "\f(CW-k\fR" 4
|
|
Specify that \s-1PIC\s0 code has been generated.
|
|
.PP
|
|
The following options are available when as is configured for
|
|
a D10V processor.
|
|
.Ip "\f(CW-O\fR" 4
|
|
Optimize output by parallelizing instructions.
|
|
.PP
|
|
The following options are available when as is configured for a D30V
|
|
processor.
|
|
.Ip "\f(CW-O\fR" 4
|
|
Optimize output by parallelizing instructions.
|
|
.Ip "\f(CW-n\fR" 4
|
|
Warn when nops are generated.
|
|
.Ip "\f(CW-N\fR" 4
|
|
Warn when a nop after a 32-bit multiply instruction is generated.
|
|
.PP
|
|
The following options are available when as is configured for the
|
|
Intel 80960 processor.
|
|
.Ip "\f(CW-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC\fR" 4
|
|
Specify which variant of the 960 architecture is the target.
|
|
.Ip "\f(CW-b\fR" 4
|
|
Add code to collect statistics about branches taken.
|
|
.Ip "\f(CW-no-relax\fR" 4
|
|
Do not alter compare-and-branch instructions for long displacements;
|
|
error if necessary.
|
|
.PP
|
|
The following options are available when as is configured for the
|
|
Mitsubishi M32R series.
|
|
.Ip "\f(CW--m32rx\fR" 4
|
|
Specify which processor in the M32R family is the target. The default
|
|
is normally the M32R, but this option changes it to the M32RX.
|
|
.Ip "\f(CW--warn-explicit-parallel-conflicts or --Wp\fR" 4
|
|
Produce warning messages when questionable parallel constructs are
|
|
encountered.
|
|
.Ip "\f(CW--no-warn-explicit-parallel-conflicts or --Wnp\fR" 4
|
|
Do not produce warning messages when questionable parallel constructs are
|
|
encountered.
|
|
.PP
|
|
The following options are available when as is configured for the
|
|
Motorola 68000 series.
|
|
.Ip "\f(CW-l\fR" 4
|
|
Shorten references to undefined symbols, to one word instead of two.
|
|
.Ip "\f(CW-m68000 | -m68008 | -m68010 | -m68020 | -m68030\fR" 4
|
|
.Ip "\f(CW| -m68040 | -m68060 | -m68302 | -m68331 | -m68332\fR" 4
|
|
.Ip "\f(CW| -m68333 | -m68340 | -mcpu32 | -m5200\fR" 4
|
|
Specify what processor in the 68000 family is the target. The default
|
|
is normally the 68020, but this can be changed at configuration time.
|
|
.Ip "\f(CW-m68881 | -m68882 | -mno-68881 | -mno-68882\fR" 4
|
|
The target machine does (or does not) have a floating-point coprocessor.
|
|
The default is to assume a coprocessor for 68020, 68030, and cpu32. Although
|
|
the basic 68000 is not compatible with the 68881, a combination of the
|
|
two can be specified, since it's possible to do emulation of the
|
|
coprocessor instructions with the main processor.
|
|
.Ip "\f(CW-m68851 | -mno-68851\fR" 4
|
|
The target machine does (or does not) have a memory-management
|
|
unit coprocessor. The default is to assume an \s-1MMU\s0 for 68020 and up.
|
|
.PP
|
|
For details about the \s-1PDP\s0\-11 machine dependent features options,
|
|
see \f(CW@ref\fR{\s-1PDP\s0\-11-Options}.
|
|
.Ip "\f(CW-mpic | -mno-pic\fR" 4
|
|
Generate position-independent (or position-dependent) code. The
|
|
default is \f(CW-mpic\fR.
|
|
.Ip "\f(CW-mall\fR" 4
|
|
.Ip "\f(CW-mall-extensions\fR" 4
|
|
Enable all instruction set extensions. This is the default.
|
|
.Ip "\f(CW-mno-extensions\fR" 4
|
|
Disable all instruction set extensions.
|
|
.Ip "\f(CW-m\fIextension\fR | -mno-\fIextension\fR\fR" 4
|
|
Enable (or disable) a particular instruction set extension.
|
|
.Ip "\f(CW-m\fIcpu\fR\fR" 4
|
|
Enable the instruction set extensions supported by a particular \s-1CPU\s0, and
|
|
disable all other extensions.
|
|
.Ip "\f(CW-m\fImachine\fR\fR" 4
|
|
Enable the instruction set extensions supported by a particular machine
|
|
model, and disable all other extensions.
|
|
.PP
|
|
The following options are available when as is configured for
|
|
a picoJava processor.
|
|
.Ip "\f(CW-mb\fR" 4
|
|
Generate ``big endian'\*(R' format output.
|
|
.Ip "\f(CW-ml\fR" 4
|
|
Generate ``little endian'\*(R' format output.
|
|
.PP
|
|
The following options are available when as is configured for the
|
|
Motorola 68HC11 or 68HC12 series.
|
|
.Ip "\f(CW-m68hc11 | -m68hc12\fR" 4
|
|
Specify what processor is the target. The default is
|
|
defined by the configuration option when building the assembler.
|
|
.Ip "\f(CW--force-long-branchs\fR" 4
|
|
Relative branches are turned into absolute ones. This concerns
|
|
conditional branches, unconditional branches and branches to a
|
|
sub routine.
|
|
.Ip "\f(CW-S | --short-branchs\fR" 4
|
|
Do not turn relative branchs into absolute ones
|
|
when the offset is out of range.
|
|
.Ip "\f(CW--strict-direct-mode\fR" 4
|
|
Do not turn the direct addressing mode into extended addressing mode
|
|
when the instruction does not support direct addressing mode.
|
|
.Ip "\f(CW--print-insn-syntax\fR" 4
|
|
Print the syntax of instruction in case of error.
|
|
.Ip "\f(CW--print-opcodes\fR" 4
|
|
print the list of instructions with syntax and then exit.
|
|
.Ip "\f(CW--generate-example\fR" 4
|
|
print an example of instruction for each possible instruction and then exit.
|
|
This option is only useful for testing \f(CWas\fR.
|
|
.PP
|
|
The following options are available when \f(CWas\fR is configured
|
|
for the \s-1SPARC\s0 architecture:
|
|
.Ip "\f(CW-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite\fR" 4
|
|
.Ip "\f(CW-Av8plus | -Av8plusa | -Av9 | -Av9a\fR" 4
|
|
Explicitly select a variant of the \s-1SPARC\s0 architecture.
|
|
.Sp
|
|
\fB\-Av8plus\fR and \fB\-Av8plusa\fR select a 32 bit environment.
|
|
\fB\-Av9\fR and \fB\-Av9a\fR select a 64 bit environment.
|
|
.Sp
|
|
\fB\-Av8plusa\fR and \fB\-Av9a\fR enable the \s-1SPARC\s0 V9 instruction set with
|
|
UltraSPARC extensions.
|
|
.Ip "\f(CW-xarch=v8plus | -xarch=v8plusa\fR" 4
|
|
For compatibility with the Solaris v9 assembler. These options are
|
|
equivalent to \-Av8plus and \-Av8plusa, respectively.
|
|
.Ip "\f(CW-bump\fR" 4
|
|
Warn when the assembler switches to another architecture.
|
|
.PP
|
|
The following options are available when as is configured for
|
|
a \s-1MIPS\s0 processor.
|
|
.Ip "\f(CW-G \fInum\fR\fR" 4
|
|
This option sets the largest size of an object that can be referenced
|
|
implicitly with the \f(CWgp\fR register. It is only accepted for targets that
|
|
use \s-1ECOFF\s0 format, such as a DECstation running Ultrix. The default value is 8.
|
|
.Ip "\f(CW-EB\fR" 4
|
|
Generate ``big endian'\*(R' format output.
|
|
.Ip "\f(CW-EL\fR" 4
|
|
Generate ``little endian'\*(R' format output.
|
|
.Ip "\f(CW-mips1\fR" 4
|
|
.Ip "\f(CW-mips2\fR" 4
|
|
.Ip "\f(CW-mips3\fR" 4
|
|
.Ip "\f(CW-mips4\fR" 4
|
|
.Ip "\f(CW-mips32\fR" 4
|
|
Generate code for a particular \s-1MIPS\s0 Instruction Set Architecture level.
|
|
\fB\-mips1\fR corresponds to the R2000 and R3000 processors,
|
|
\fB\-mips2\fR to the R6000 processor, and \fB\-mips3\fR to the R4000
|
|
processor.
|
|
\fB\-mips5\fR, \fB\-mips32\fR, and \fB\-mips64\fR correspond
|
|
to generic \s-1MIPS\s0 V, \s-1MIPS32\s0, and \s-1MIPS64\s0 \s-1ISA\s0
|
|
processors, respectively.
|
|
.Ip "\f(CW-m4650\fR" 4
|
|
.Ip "\f(CW-no-m4650\fR" 4
|
|
Generate code for the \s-1MIPS\s0 R4650 chip. This tells the assembler to accept
|
|
the \fBmad\fR and \fBmadu\fR instruction, and to not schedule \fBnop\fR
|
|
instructions around accesses to the \fB\s-1HI\s0\fR and \fB\s-1LO\s0\fR registers.
|
|
\fB\-no-m4650\fR turns off this option.
|
|
.Ip "\f(CW-mcpu=\fICPU\fR\fR" 4
|
|
Generate code for a particular \s-1MIPS\s0 cpu. It is exactly equivalent to
|
|
\fB\-m\fR\fIcpu\fR, except that there are more value of \fIcpu\fR
|
|
understood.
|
|
.Ip "\f(CW--emulation=\fIname\fR\fR" 4
|
|
This option causes \f(CWas\fR to emulate \f(CWas\fR configured
|
|
for some other target, in all respects, including output format (choosing
|
|
between \s-1ELF\s0 and \s-1ECOFF\s0 only), handling of pseudo-opcodes which may generate
|
|
debugging information or store symbol table information, and default
|
|
endianness. The available configuration names are: \fBmipsecoff\fR,
|
|
\fBmipself\fR, \fBmipslecoff\fR, \fBmipsbecoff\fR, \fBmipslelf\fR,
|
|
\fBmipsbelf\fR. The first two do not alter the default endianness from that
|
|
of the primary target for which the assembler was configured; the others change
|
|
the default to little- or big-endian as indicated by the \fBb\fR or \fBl\fR
|
|
in the name. Using \fB\-\s-1EB\s0\fR or \fB\-\s-1EL\s0\fR will override the endianness
|
|
selection in any case.
|
|
.Sp
|
|
This option is currently supported only when the primary target
|
|
\f(CWas\fR is configured for is a \s-1MIPS\s0 \s-1ELF\s0 or \s-1ECOFF\s0 target.
|
|
Furthermore, the primary target or others specified with
|
|
\fB--enable-targets=...\fR at configuration time must include support for
|
|
the other format, if both are to be available. For example, the Irix 5
|
|
configuration includes support for both.
|
|
.Sp
|
|
Eventually, this option will support more configurations, with more
|
|
fine-grained control over the assembler's behavior, and will be supported for
|
|
more processors.
|
|
.Ip "\f(CW-nocpp\fR" 4
|
|
\f(CWas\fR ignores this option. It is accepted for compatibility with
|
|
the native tools.
|
|
.Ip "\f(CW--trap\fR" 4
|
|
.Ip "\f(CW--no-trap\fR" 4
|
|
.Ip "\f(CW--break\fR" 4
|
|
.Ip "\f(CW--no-break\fR" 4
|
|
Control how to deal with multiplication overflow and division by zero.
|
|
\fB--trap\fR or \fB--no-break\fR (which are synonyms) take a trap exception
|
|
(and only work for Instruction Set Architecture level 2 and higher);
|
|
\fB--break\fR or \fB--no-trap\fR (also synonyms, and the default) take a
|
|
break exception.
|
|
.PP
|
|
The following options are available when as is configured for
|
|
an MCore processor.
|
|
.Ip "\f(CW-jsri2bsr\fR" 4
|
|
.Ip "\f(CW-nojsri2bsr\fR" 4
|
|
Enable or disable the \s-1JSRI\s0 to \s-1BSR\s0 transformation. By default this is enabled.
|
|
The command line option \fB\-nojsri2bsr\fR can be used to disable it.
|
|
.Ip "\f(CW-sifilter\fR" 4
|
|
.Ip "\f(CW-nosifilter\fR" 4
|
|
Enable or disable the silicon filter behaviour. By default this is disabled.
|
|
The default can be overridden by the \fB\-sifilter\fR command line option.
|
|
.Ip "\f(CW-relax\fR" 4
|
|
Alter jump instructions for long displacements.
|
|
.Ip "\f(CW-mcpu=[210|340]\fR" 4
|
|
Select the cpu type on the target hardware. This controls which instructions
|
|
can be assembled.
|
|
.Ip "\f(CW-EB\fR" 4
|
|
Assemble for a big endian target.
|
|
.Ip "\f(CW-EL\fR" 4
|
|
Assemble for a little endian target.
|
|
.SH "SEE ALSO"
|
|
\fIgcc\fR\|(1), \fIld\fR\|(1), and the Info entries for \fIbinutils\fR and \fIld\fR.
|
|
.SH "COPYRIGHT"
|
|
Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001 Free Software Foundation, Inc.
|
|
.PP
|
|
Permission is granted to copy, distribute and/or modify this document
|
|
under the terms of the GNU Free Documentation License, Version 1.1
|
|
or any later version published by the Free Software Foundation;
|
|
with no Invariant Sections, with no Front-Cover Texts, and with no
|
|
Back-Cover Texts. A copy of the license is included in the
|
|
section entitled \*(L"GNU Free Documentation License\*(R".
|
|
|
|
.rn }` ''
|
|
.IX Title "AS 1"
|
|
.IX Name "AS - the portable GNU assembler."
|
|
|
|
.IX Header "NAME"
|
|
|
|
.IX Header "SYNOPSIS"
|
|
|
|
.IX Header "DESCRIPTION"
|
|
|
|
.IX Header "OPTIONS"
|
|
|
|
.IX Item "\f(CW-a[cdhlmns]\fR"
|
|
|
|
.IX Item "\f(CW-ac\fR"
|
|
|
|
.IX Item "\f(CW-ad\fR"
|
|
|
|
.IX Item "\f(CW-ah\fR"
|
|
|
|
.IX Item "\f(CW-al\fR"
|
|
|
|
.IX Item "\f(CW-am\fR"
|
|
|
|
.IX Item "\f(CW-an\fR"
|
|
|
|
.IX Item "\f(CW-as\fR"
|
|
|
|
.IX Item "\f(CW=file\fR"
|
|
|
|
.IX Item "\f(CW-D\fR"
|
|
|
|
.IX Item "\f(CW--defsym \fIsym\fR=\fIvalue\fR\fR"
|
|
|
|
.IX Item "\f(CW-f\fR"
|
|
|
|
.IX Item "\f(CW--gstabs\fR"
|
|
|
|
.IX Item "\f(CW--gdwarf2\fR"
|
|
|
|
.IX Item "\f(CW--help\fR"
|
|
|
|
.IX Item "\f(CW--target-help\fR"
|
|
|
|
.IX Item "\f(CW-I \fIdir\fR\fR"
|
|
|
|
.IX Item "\f(CW-J\fR"
|
|
|
|
.IX Item "\f(CW-K\fR"
|
|
|
|
.IX Item "\f(CW-L\fR"
|
|
|
|
.IX Item "\f(CW--keep-locals\fR"
|
|
|
|
.IX Item "\f(CW--listing-lhs-width=\fInumber\fR\fR"
|
|
|
|
.IX Item "\f(CW--listing-lhs-width2=\fInumber\fR\fR"
|
|
|
|
.IX Item "\f(CW--listing-rhs-width=\fInumber\fR\fR"
|
|
|
|
.IX Item "\f(CW--listing-cont-lines=\fInumber\fR\fR"
|
|
|
|
.IX Item "\f(CW-o \fIobjfile\fR\fR"
|
|
|
|
.IX Item "\f(CW-R\fR"
|
|
|
|
.IX Item "\f(CW--statistics\fR"
|
|
|
|
.IX Item "\f(CW--strip-local-absolute\fR"
|
|
|
|
.IX Item "\f(CW-v\fR"
|
|
|
|
.IX Item "\f(CW-version\fR"
|
|
|
|
.IX Item "\f(CW--version\fR"
|
|
|
|
.IX Item "\f(CW-W\fR"
|
|
|
|
.IX Item "\f(CW--no-warn\fR"
|
|
|
|
.IX Item "\f(CW--fatal-warnings\fR"
|
|
|
|
.IX Item "\f(CW--warn\fR"
|
|
|
|
.IX Item "\f(CW-w\fR"
|
|
|
|
.IX Item "\f(CW-x\fR"
|
|
|
|
.IX Item "\f(CW-Z\fR"
|
|
|
|
.IX Item "\f(CW-- | \fIfiles\fR ...\fR"
|
|
|
|
.IX Item "\f(CW-marc[5|6|7|8]\fR"
|
|
|
|
.IX Item "\f(CW-EB | -EL\fR"
|
|
|
|
.IX Item "\f(CW-m[arm][1|2|3|6|7|8|9][...] \fR"
|
|
|
|
.IX Item "\f(CW-m[arm]v[2|2a|3|3m|4|4t|5|5t]\fR"
|
|
|
|
.IX Item "\f(CW-mthumb | -mall\fR"
|
|
|
|
.IX Item "\f(CW-mfpa10 | -mfpa11 | -mfpe-old | -mno-fpu\fR"
|
|
|
|
.IX Item "\f(CW-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant | -moabi\fR"
|
|
|
|
.IX Item "\f(CW-EB | -EL\fR"
|
|
|
|
.IX Item "\f(CW-mthumb-interwork\fR"
|
|
|
|
.IX Item "\f(CW-k\fR"
|
|
|
|
.IX Item "\f(CW-O\fR"
|
|
|
|
.IX Item "\f(CW-O\fR"
|
|
|
|
.IX Item "\f(CW-n\fR"
|
|
|
|
.IX Item "\f(CW-N\fR"
|
|
|
|
.IX Item "\f(CW-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC\fR"
|
|
|
|
.IX Item "\f(CW-b\fR"
|
|
|
|
.IX Item "\f(CW-no-relax\fR"
|
|
|
|
.IX Item "\f(CW--m32rx\fR"
|
|
|
|
.IX Item "\f(CW--warn-explicit-parallel-conflicts or --Wp\fR"
|
|
|
|
.IX Item "\f(CW--no-warn-explicit-parallel-conflicts or --Wnp\fR"
|
|
|
|
.IX Item "\f(CW-l\fR"
|
|
|
|
.IX Item "\f(CW-m68000 | -m68008 | -m68010 | -m68020 | -m68030\fR"
|
|
|
|
.IX Item "\f(CW| -m68040 | -m68060 | -m68302 | -m68331 | -m68332\fR"
|
|
|
|
.IX Item "\f(CW| -m68333 | -m68340 | -mcpu32 | -m5200\fR"
|
|
|
|
.IX Item "\f(CW-m68881 | -m68882 | -mno-68881 | -mno-68882\fR"
|
|
|
|
.IX Item "\f(CW-m68851 | -mno-68851\fR"
|
|
|
|
.IX Item "\f(CW-mpic | -mno-pic\fR"
|
|
|
|
.IX Item "\f(CW-mall\fR"
|
|
|
|
.IX Item "\f(CW-mall-extensions\fR"
|
|
|
|
.IX Item "\f(CW-mno-extensions\fR"
|
|
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.IX Item "\f(CW-m\fIextension\fR | -mno-\fIextension\fR\fR"
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.IX Item "\f(CW-m\fIcpu\fR\fR"
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.IX Item "\f(CW-m\fImachine\fR\fR"
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.IX Item "\f(CW-mb\fR"
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.IX Item "\f(CW-ml\fR"
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.IX Item "\f(CW-m68hc11 | -m68hc12\fR"
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.IX Item "\f(CW--force-long-branchs\fR"
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.IX Item "\f(CW-S | --short-branchs\fR"
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.IX Item "\f(CW--strict-direct-mode\fR"
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.IX Item "\f(CW--print-insn-syntax\fR"
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.IX Item "\f(CW--print-opcodes\fR"
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.IX Item "\f(CW--generate-example\fR"
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.IX Item "\f(CW-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite\fR"
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.IX Item "\f(CW-Av8plus | -Av8plusa | -Av9 | -Av9a\fR"
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.IX Item "\f(CW-xarch=v8plus | -xarch=v8plusa\fR"
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.IX Item "\f(CW-bump\fR"
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.IX Item "\f(CW-G \fInum\fR\fR"
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.IX Item "\f(CW-EB\fR"
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.IX Item "\f(CW-EL\fR"
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.IX Item "\f(CW-mips1\fR"
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.IX Item "\f(CW-mips2\fR"
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.IX Item "\f(CW-mips3\fR"
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.IX Item "\f(CW-mips4\fR"
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.IX Item "\f(CW-mips32\fR"
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.IX Item "\f(CW-m4650\fR"
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.IX Item "\f(CW-no-m4650\fR"
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.IX Item "\f(CW-mcpu=\fICPU\fR\fR"
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.IX Item "\f(CW--emulation=\fIname\fR\fR"
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.IX Item "\f(CW-nocpp\fR"
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.IX Item "\f(CW--trap\fR"
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.IX Item "\f(CW--no-trap\fR"
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.IX Item "\f(CW--break\fR"
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.IX Item "\f(CW--no-break\fR"
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.IX Item "\f(CW-jsri2bsr\fR"
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.IX Item "\f(CW-nojsri2bsr\fR"
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.IX Item "\f(CW-sifilter\fR"
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.IX Item "\f(CW-nosifilter\fR"
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.IX Item "\f(CW-relax\fR"
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.IX Item "\f(CW-mcpu=[210|340]\fR"
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.IX Item "\f(CW-EB\fR"
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.IX Item "\f(CW-EL\fR"
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.IX Header "SEE ALSO"
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.IX Header "COPYRIGHT"
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