f3f00e9486
New argument `want'. Update enum cgen_parse_operand_result values. Initialize if CGEN_PARSE_OPERAND_INIT. * config/tc-m32r.c (md_begin): Set cgen_parse_operand_fn. (md_assemble): Call cgen_asm_init_parse. Update call to m32r_cgen_assemble_insn, call as_bad if assembly failed.
528 lines
16 KiB
C
528 lines
16 KiB
C
/* GAS interface for targets using CGEN: Cpu tools GENerator.
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Copyright (C) 1996, 1997 Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to the Free Software
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Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "ansidecl.h"
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#include "bfd.h"
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#include "cgen-opc.h"
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#include "as.h"
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#include "subsegs.h"
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/* Callback to insert a register into the symbol table.
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A target may choose to let GAS parse the registers.
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??? Not currently used. */
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void
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cgen_asm_record_register (name, number)
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char *name;
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int number;
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{
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/* Use symbol_create here instead of symbol_new so we don't try to
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output registers into the object file's symbol table. */
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symbol_table_insert (symbol_create (name, reg_section,
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number, &zero_address_frag));
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}
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/* We need to keep a list of fixups. We can't simply generate them as
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we go, because that would require us to first create the frag, and
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that would screw up references to ``.''.
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This is used by cpu's with simple operands. It keeps knowledge of what
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an `expressionS' is and what a `fixup' is out of CGEN which for the time
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being is preferable.
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OPINDEX is the index in the operand table.
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OPINFO is something the caller chooses to help in reloc determination. */
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struct fixup
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{
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int opindex;
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int opinfo;
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expressionS exp;
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};
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#define MAX_FIXUPS 5
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static struct fixup fixups[MAX_FIXUPS];
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static int num_fixups;
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/* Prepare to parse an instruction.
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??? May wish to make this static and delete calls in md_assemble. */
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void
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cgen_asm_init_parse ()
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{
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num_fixups = 0;
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}
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/* Queue a fixup. */
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void
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cgen_queue_fixup (opindex, opinfo, expP)
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int opindex;
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expressionS *expP;
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{
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/* We need to generate a fixup for this expression. */
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if (num_fixups >= MAX_FIXUPS)
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as_fatal ("too many fixups");
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fixups[num_fixups].exp = *expP;
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fixups[num_fixups].opindex = opindex;
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fixups[num_fixups].opinfo = opinfo;
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++num_fixups;
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}
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/* Default routine to record a fixup.
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This is a cover function to fix_new.
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It exists because we record INSN with the fixup.
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FRAG and WHERE are their respective arguments to fix_new_exp.
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LENGTH is in bits.
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OPINFO is something the caller chooses to help in reloc determination.
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At this point we do not use a bfd_reloc_code_real_type for
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operands residing in the insn, but instead just use the
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operand index. This lets us easily handle fixups for any
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operand type. We pick a BFD reloc type in md_apply_fix. */
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fixS *
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cgen_record_fixup (frag, where, insn, length, operand, opinfo, symbol, offset)
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fragS *frag;
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int where;
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const struct cgen_insn *insn;
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int length;
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const struct cgen_operand *operand;
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int opinfo;
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symbolS *symbol;
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offsetT offset;
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{
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fixS *fixP;
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/* It may seem strange to use operand->attrs and not insn->attrs here,
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but it is the operand that has a pc relative relocation. */
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fixP = fix_new (frag, where, length / 8, symbol, offset,
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CGEN_OPERAND_ATTR (operand, CGEN_OPERAND_PCREL_ADDR) != 0,
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(bfd_reloc_code_real_type) ((int) BFD_RELOC_UNUSED + CGEN_OPERAND_INDEX (operand)));
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fixP->tc_fix_data.insn = (PTR) insn;
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fixP->tc_fix_data.opinfo = opinfo;
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return fixP;
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}
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/* Default routine to record a fixup given an expression.
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This is a cover function to fix_new_exp.
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It exists because we record INSN with the fixup.
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FRAG and WHERE are their respective arguments to fix_new_exp.
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LENGTH is in bits.
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OPINFO is something the caller chooses to help in reloc determination.
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At this point we do not use a bfd_reloc_code_real_type for
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operands residing in the insn, but instead just use the
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operand index. This lets us easily handle fixups for any
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operand type. We pick a BFD reloc type in md_apply_fix. */
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fixS *
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cgen_record_fixup_exp (frag, where, insn, length, operand, opinfo, exp)
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fragS *frag;
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int where;
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const struct cgen_insn *insn;
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int length;
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const struct cgen_operand *operand;
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int opinfo;
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expressionS *exp;
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{
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fixS *fixP;
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/* It may seem strange to use operand->attrs and not insn->attrs here,
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but it is the operand that has a pc relative relocation. */
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fixP = fix_new_exp (frag, where, length / 8, exp,
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CGEN_OPERAND_ATTR (operand, CGEN_OPERAND_PCREL_ADDR) != 0,
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(bfd_reloc_code_real_type) ((int) BFD_RELOC_UNUSED + CGEN_OPERAND_INDEX (operand)));
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fixP->tc_fix_data.insn = (PTR) insn;
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fixP->tc_fix_data.opinfo = opinfo;
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return fixP;
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}
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/* Callback for cgen interface. Parse the expression at *STRP.
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The result is an error message or NULL for success (in which case
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*STRP is advanced past the parsed text).
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WANT is an indication of what the caller is looking for.
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If WANT == CGEN_ASM_PARSE_INIT the caller is beginning to try to match
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a table entry with the insn, reset the queued fixups counter.
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An enum cgen_parse_operand_result is stored in RESULTP.
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OPINDEX is the operand's table entry index.
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OPINFO is something the caller chooses to help in reloc determination.
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The resulting value is stored in VALUEP. */
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const char *
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cgen_parse_operand (want, strP, opindex, opinfo, resultP, valueP)
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enum cgen_parse_operand_type want;
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const char **strP;
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int opindex;
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int opinfo;
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enum cgen_parse_operand_result *resultP;
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bfd_vma *valueP;
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{
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char *hold;
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const char *errmsg = NULL;
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expressionS exp;
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if (want == CGEN_PARSE_OPERAND_INIT)
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{
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cgen_asm_init_parse ();
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return NULL;
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}
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hold = input_line_pointer;
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input_line_pointer = (char *) *strP;
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expression (&exp);
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*strP = input_line_pointer;
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input_line_pointer = hold;
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/* FIXME: Need to check `want'. */
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switch (exp.X_op)
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{
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case O_illegal :
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errmsg = "illegal operand";
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*resultP = CGEN_PARSE_OPERAND_RESULT_ERROR;
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break;
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case O_absent :
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errmsg = "missing operand";
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*resultP = CGEN_PARSE_OPERAND_RESULT_ERROR;
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break;
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case O_constant :
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*valueP = exp.X_add_number;
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*resultP = CGEN_PARSE_OPERAND_RESULT_NUMBER;
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break;
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case O_register :
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*valueP = exp.X_add_number;
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*resultP = CGEN_PARSE_OPERAND_RESULT_REGISTER;
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break;
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default :
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cgen_queue_fixup (opindex, opinfo, &exp);
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*valueP = 0;
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*resultP = CGEN_PARSE_OPERAND_RESULT_QUEUED;
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break;
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}
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return errmsg;
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}
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/* Finish assembling instruction INSN.
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BUF contains what we've built up so far.
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LENGTH is the size of the insn in bits. */
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void
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cgen_asm_finish_insn (insn, buf, length)
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const struct cgen_insn *insn;
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cgen_insn_t *buf;
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unsigned int length;
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{
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int i, relax_operand;
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char *f;
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unsigned int byte_len = length / 8;
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/* ??? Target foo issues various warnings here, so one might want to provide
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a hook here. However, our caller is defined in tc-foo.c so there
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shouldn't be a need for a hook. */
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/* Write out the instruction.
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It is important to fetch enough space in one call to `frag_more'.
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We use (f - frag_now->fr_literal) to compute where we are and we
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don't want frag_now to change between calls.
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Relaxable instructions: We need to ensure we allocate enough
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space for the largest insn. */
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if (CGEN_INSN_ATTR (insn, CGEN_INSN_RELAX) != 0)
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abort (); /* These currently shouldn't get here. */
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/* Is there a relaxable insn with the relaxable operand needing a fixup? */
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relax_operand = -1;
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if (CGEN_INSN_ATTR (insn, CGEN_INSN_RELAXABLE) != 0)
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{
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/* Scan the fixups for the operand affected by relaxing
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(i.e. the branch address). */
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for (i = 0; i < num_fixups; ++i)
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{
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if (CGEN_OPERAND_ATTR (& CGEN_SYM (operand_table) [fixups[i].opindex],
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CGEN_OPERAND_RELAX) != 0)
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{
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relax_operand = i;
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break;
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}
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}
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}
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if (relax_operand != -1)
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{
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int max_len;
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fragS *old_frag;
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#ifdef TC_CGEN_MAX_RELAX
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max_len = TC_CGEN_MAX_RELAX (insn, byte_len);
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#else
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max_len = CGEN_MAX_INSN_SIZE;
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#endif
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/* Ensure variable part and fixed part are in same fragment. */
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/* FIXME: Having to do this seems like a hack. */
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frag_grow (max_len);
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/* Allocate space for the fixed part. */
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f = frag_more (byte_len);
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/* Create a relaxable fragment for this instruction. */
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old_frag = frag_now;
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frag_var (rs_machine_dependent,
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max_len - byte_len /* max chars */,
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0 /* variable part already allocated */,
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/* FIXME: When we machine generate the relax table,
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machine generate a macro to compute subtype. */
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1 /* subtype */,
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fixups[relax_operand].exp.X_add_symbol,
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fixups[relax_operand].exp.X_add_number,
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f);
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/* Record the operand number with the fragment so md_convert_frag
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can use cgen_md_record_fixup to record the appropriate reloc. */
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/* FIXME: fr_targ.cgen is used pending deciding whether to
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allow a target to add members to fragS. For more info
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see the comment above fr_targ in as.h. */
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old_frag->fr_targ.cgen.insn = insn;
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old_frag->fr_targ.cgen.opindex = fixups[relax_operand].opindex;
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old_frag->fr_targ.cgen.opinfo = fixups[relax_operand].opinfo;
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}
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else
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f = frag_more (byte_len);
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/* If we're recording insns as numbers (rather than a string of bytes),
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target byte order handling is deferred until now. */
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#if 0 /*def CGEN_INT_INSN*/
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switch (length)
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{
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case 16:
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if (cgen_big_endian_p)
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bfd_putb16 ((bfd_vma) *buf, f);
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else
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bfd_putl16 ((bfd_vma) *buf, f);
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break;
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case 32:
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if (cgen_big_endian_p)
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bfd_putb32 ((bfd_vma) *buf, f);
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else
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bfd_putl32 ((bfd_vma) *buf, f);
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break;
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default:
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abort ();
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}
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#else
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memcpy (f, buf, byte_len);
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#endif
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/* Create any fixups. */
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for (i = 0; i < num_fixups; ++i)
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{
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/* Don't create fixups for these. That's done during relaxation.
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We don't need to test for CGEN_INSN_RELAX as they can't get here
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(see above). */
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if (CGEN_INSN_ATTR (insn, CGEN_INSN_RELAXABLE) != 0
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&& CGEN_OPERAND_ATTR (& CGEN_SYM (operand_table) [fixups[i].opindex],
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CGEN_OPERAND_RELAX) != 0)
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continue;
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#ifndef md_cgen_record_fixup_exp
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#define md_cgen_record_fixup_exp cgen_record_fixup_exp
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#endif
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md_cgen_record_fixup_exp (frag_now, f - frag_now->fr_literal,
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insn, length,
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& CGEN_SYM (operand_table) [fixups[i].opindex],
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fixups[i].opinfo,
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&fixups[i].exp);
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}
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}
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/* Apply a fixup to the object code. This is called for all the
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fixups we generated by the call to fix_new_exp, above. In the call
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above we used a reloc code which was the largest legal reloc code
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plus the operand index. Here we undo that to recover the operand
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index. At this point all symbol values should be fully resolved,
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and we attempt to completely resolve the reloc. If we can not do
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that, we determine the correct reloc code and put it back in the fixup. */
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/* FIXME: This function handles some of the fixups and bfd_install_relocation
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handles the rest. bfd_install_relocation (or some other bfd function)
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should handle them all. */
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int
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cgen_md_apply_fix3 (fixP, valueP, seg)
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fixS *fixP;
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valueT *valueP;
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segT seg;
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{
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char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
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valueT value;
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/* FIXME FIXME FIXME: The value we are passed in *valuep includes
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the symbol values. Since we are using BFD_ASSEMBLER, if we are
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doing this relocation the code in write.c is going to call
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bfd_install_relocation, which is also going to use the symbol
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value. That means that if the reloc is fully resolved we want to
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use *valuep since bfd_install_relocation is not being used.
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However, if the reloc is not fully resolved we do not want to use
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*valuep, and must use fx_offset instead. However, if the reloc
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is PC relative, we do want to use *valuep since it includes the
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result of md_pcrel_from. This is confusing. */
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if (fixP->fx_addsy == (symbolS *) NULL)
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{
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value = *valueP;
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fixP->fx_done = 1;
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}
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else if (fixP->fx_pcrel)
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value = *valueP;
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else
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{
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value = fixP->fx_offset;
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if (fixP->fx_subsy != (symbolS *) NULL)
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{
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if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section)
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value -= S_GET_VALUE (fixP->fx_subsy);
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else
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{
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/* We don't actually support subtracting a symbol. */
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as_bad_where (fixP->fx_file, fixP->fx_line,
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"expression too complex");
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}
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}
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}
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if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
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{
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int opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
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const struct cgen_operand *operand = & CGEN_SYM (operand_table) [opindex];
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const char *errmsg;
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bfd_reloc_code_real_type reloc_type;
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struct cgen_fields fields;
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const struct cgen_insn *insn = (struct cgen_insn *) fixP->tc_fix_data.insn;
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/* If the reloc has been fully resolved finish the operand here. */
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/* FIXME: This duplicates the capabilities of code in BFD. */
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if (fixP->fx_done
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/* FIXME: If partial_inplace isn't set bfd_install_relocation won't
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finish the job. Testing for pcrel is a temporary hack. */
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|| fixP->fx_pcrel)
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{
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/* This may seem like overkill, and using bfd_install_relocation or
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some such may be preferable, but this is simple. */
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CGEN_FIELDS_BITSIZE (&fields) = CGEN_INSN_BITSIZE (insn);
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CGEN_SYM (set_operand) (opindex, &value, &fields);
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errmsg = CGEN_SYM (validate_operand) (opindex, &fields);
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if (errmsg)
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as_warn_where (fixP->fx_file, fixP->fx_line, "%s\n", errmsg);
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CGEN_SYM (insert_operand) (opindex, &fields, where);
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}
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if (fixP->fx_done)
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return 1;
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/* The operand isn't fully resolved. Determine a BFD reloc value
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based on the operand information and leave it to
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bfd_install_relocation. Note that this doesn't work when
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partial_inplace == false. */
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reloc_type = CGEN_SYM (lookup_reloc) (insn, operand, fixP);
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if (reloc_type != BFD_RELOC_NONE)
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{
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fixP->fx_r_type = reloc_type;
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}
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else
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{
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as_bad_where (fixP->fx_file, fixP->fx_line,
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"unresolved expression that must be resolved");
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fixP->fx_done = 1;
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return 1;
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}
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}
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else if (fixP->fx_done)
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{
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/* We're finished with this fixup. Install it because
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bfd_install_relocation won't be called to do it. */
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switch (fixP->fx_r_type)
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{
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case BFD_RELOC_8:
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md_number_to_chars (where, value, 1);
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break;
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case BFD_RELOC_16:
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md_number_to_chars (where, value, 2);
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break;
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case BFD_RELOC_32:
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md_number_to_chars (where, value, 4);
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break;
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/* FIXME: later add support for 64 bits. */
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|
default:
|
|
abort ();
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* bfd_install_relocation will be called to finish things up. */
|
|
}
|
|
|
|
/* Tuck `value' away for use by tc_gen_reloc.
|
|
See the comment describing fx_addnumber in write.h.
|
|
This field is misnamed (or misused :-). */
|
|
fixP->fx_addnumber = value;
|
|
|
|
return 1;
|
|
}
|
|
|
|
/* Translate internal representation of relocation info to BFD target format.
|
|
|
|
FIXME: To what extent can we get all relevant targets to use this? */
|
|
|
|
arelent *
|
|
cgen_tc_gen_reloc (section, fixP)
|
|
asection *section;
|
|
fixS *fixP;
|
|
{
|
|
arelent *reloc;
|
|
|
|
reloc = (arelent *) bfd_alloc_by_size_t (stdoutput, sizeof (arelent));
|
|
|
|
reloc->howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type);
|
|
if (reloc->howto == (reloc_howto_type *) NULL)
|
|
{
|
|
as_bad_where (fixP->fx_file, fixP->fx_line,
|
|
"internal error: can't export reloc type %d (`%s')",
|
|
fixP->fx_r_type, bfd_get_reloc_code_name (fixP->fx_r_type));
|
|
return NULL;
|
|
}
|
|
|
|
assert (!fixP->fx_pcrel == !reloc->howto->pc_relative);
|
|
|
|
reloc->sym_ptr_ptr = &fixP->fx_addsy->bsym;
|
|
reloc->address = fixP->fx_frag->fr_address + fixP->fx_where;
|
|
reloc->addend = fixP->fx_addnumber;
|
|
|
|
return reloc;
|
|
}
|