OpenE2K/binutils-gdb
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binutils-gdb/sim/d10v
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Andrew Cagney bc6df23d14 For "trap", IBT and RIE exceptions, mask all PSW.SM. NB: Stepping 
through an exception may not work correctly.
For GDB reads/writes to the control registers, ensure the cpu state is
updated correctly.
1997-12-08 03:22:58 +00:00
..
.Sanitize
New file.
1996-11-20 09:28:40 +00:00
ChangeLog
For "trap", IBT and RIE exceptions, mask all PSW.SM. NB: Stepping
1997-12-08 03:22:58 +00:00
config.in
New file.
1996-11-20 09:28:40 +00:00
configure
Remove need to update <targ>/Makefile.in when adding optional options
1997-09-23 01:25:26 +00:00
configure.in
* Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1997-02-04 21:42:27 +00:00
d10v_sim.h
For "trap", IBT and RIE exceptions, mask all PSW.SM. NB: Stepping
1997-12-08 03:22:58 +00:00
endian.c
Make read/write memory functions inlined
1996-10-16 22:16:21 +00:00
gencode.c
Fri Nov 8 16:19:55 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1996-11-09 00:38:07 +00:00
interp.c
* interp.c (sim_resume): Call do_2_short with LEFT_FIRST or
1997-12-02 23:13:56 +00:00
Makefile.in
* configure configure.in Makefile.in: Update to new configure
1997-01-23 22:09:52 +00:00
simops.c
For "trap", IBT and RIE exceptions, mask all PSW.SM. NB: Stepping
1997-12-08 03:22:58 +00:00