232 lines
6.5 KiB
C
232 lines
6.5 KiB
C
/* Target-dependent code for NetBSD/Alpha.
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Copyright 2002, 2003 Free Software Foundation, Inc.
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Contributed by Wasabi Systems, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "gdbcore.h"
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#include "frame.h"
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#include "regcache.h"
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#include "value.h"
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#include "osabi.h"
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#include "solib-svr4.h"
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#include "alpha-tdep.h"
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#include "alphabsd-tdep.h"
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#include "nbsd-tdep.h"
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static void
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fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, int which,
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CORE_ADDR ignore)
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{
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char *regs, *fpregs;
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int regno;
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/* Table to map a gdb register number to a trapframe register index. */
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static const int regmap[] =
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{
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0, 1, 2, 3,
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4, 5, 6, 7,
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8, 9, 10, 11,
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12, 13, 14, 15,
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30, 31, 32, 16,
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17, 18, 19, 20,
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21, 22, 23, 24,
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25, 29, 26
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};
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#define SIZEOF_TRAPFRAME (33 * 8)
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/* We get everything from one section. */
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if (which != 0)
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return;
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regs = core_reg_sect;
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fpregs = core_reg_sect + SIZEOF_TRAPFRAME;
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if (core_reg_size < (SIZEOF_TRAPFRAME + SIZEOF_STRUCT_FPREG))
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{
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warning ("Wrong size register set in core file.");
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return;
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}
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/* Integer registers. */
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for (regno = 0; regno < ALPHA_ZERO_REGNUM; regno++)
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supply_register (regno, regs + (regmap[regno] * 8));
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supply_register (ALPHA_ZERO_REGNUM, NULL);
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supply_register (PC_REGNUM, regs + (28 * 8));
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/* Floating point registers. */
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alphabsd_supply_fpreg (fpregs, -1);
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}
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static void
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fetch_elfcore_registers (char *core_reg_sect, unsigned core_reg_size, int which,
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CORE_ADDR ignore)
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{
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switch (which)
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{
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case 0: /* Integer registers. */
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if (core_reg_size != SIZEOF_STRUCT_REG)
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warning ("Wrong size register set in core file.");
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else
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alphabsd_supply_reg (core_reg_sect, -1);
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break;
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case 2: /* Floating point registers. */
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if (core_reg_size != SIZEOF_STRUCT_FPREG)
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warning ("Wrong size FP register set in core file.");
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else
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alphabsd_supply_fpreg (core_reg_sect, -1);
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break;
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default:
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/* Don't know what kind of register request this is; just ignore it. */
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break;
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}
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}
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static struct core_fns alphanbsd_core_fns =
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{
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bfd_target_unknown_flavour, /* core_flavour */
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default_check_format, /* check_format */
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default_core_sniffer, /* core_sniffer */
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fetch_core_registers, /* core_read_registers */
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NULL /* next */
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};
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static struct core_fns alphanbsd_elfcore_fns =
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{
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bfd_target_elf_flavour, /* core_flavour */
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default_check_format, /* check_format */
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default_core_sniffer, /* core_sniffer */
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fetch_elfcore_registers, /* core_read_registers */
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NULL /* next */
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};
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/* Under NetBSD/alpha, signal handler invocations can be identified by the
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designated code sequence that is used to return from a signal handler.
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In particular, the return address of a signal handler points to the
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following code sequence:
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ldq a0, 0(sp)
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lda sp, 16(sp)
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lda v0, 295(zero) # __sigreturn14
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call_pal callsys
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Each instruction has a unique encoding, so we simply attempt to match
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the instruction the PC is pointing to with any of the above instructions.
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If there is a hit, we know the offset to the start of the designated
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sequence and can then check whether we really are executing in the
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signal trampoline. If not, -1 is returned, otherwise the offset from the
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start of the return sequence is returned. */
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static const unsigned char sigtramp_retcode[] =
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{
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0x00, 0x00, 0x1e, 0xa6, /* ldq a0, 0(sp) */
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0x10, 0x00, 0xde, 0x23, /* lda sp, 16(sp) */
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0x27, 0x01, 0x1f, 0x20, /* lda v0, 295(zero) */
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0x83, 0x00, 0x00, 0x00, /* call_pal callsys */
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};
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#define RETCODE_NWORDS 4
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#define RETCODE_SIZE (RETCODE_NWORDS * 4)
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LONGEST
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alphanbsd_sigtramp_offset (CORE_ADDR pc)
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{
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unsigned char ret[RETCODE_SIZE], w[4];
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LONGEST off;
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int i;
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if (read_memory_nobpt (pc, (char *) w, 4) != 0)
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return -1;
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for (i = 0; i < RETCODE_NWORDS; i++)
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{
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if (memcmp (w, sigtramp_retcode + (i * 4), 4) == 0)
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break;
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}
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if (i == RETCODE_NWORDS)
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return (-1);
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off = i * 4;
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pc -= off;
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if (read_memory_nobpt (pc, (char *) ret, sizeof (ret)) != 0)
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return -1;
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if (memcmp (ret, sigtramp_retcode, RETCODE_SIZE) == 0)
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return off;
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return -1;
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}
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static int
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alphanbsd_pc_in_sigtramp (CORE_ADDR pc, char *func_name)
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{
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return (nbsd_pc_in_sigtramp (pc, func_name)
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|| alphanbsd_sigtramp_offset (pc) >= 0);
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}
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static CORE_ADDR
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alphanbsd_sigcontext_addr (struct frame_info *frame)
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{
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/* FIXME: This is not correct for all versions of NetBSD/alpha.
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We will probably need to disassemble the trampoline to figure
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out which trampoline frame type we have. */
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return get_frame_base (frame);
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}
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static void
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alphanbsd_init_abi (struct gdbarch_info info,
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struct gdbarch *gdbarch)
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{
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struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
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/* Hook into the DWARF CFI frame unwinder. */
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alpha_dwarf2_init_abi (info, gdbarch);
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/* Hook into the MDEBUG frame unwinder. */
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alpha_mdebug_init_abi (info, gdbarch);
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set_gdbarch_pc_in_sigtramp (gdbarch, alphanbsd_pc_in_sigtramp);
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/* NetBSD/alpha does not provide single step support via ptrace(2); we
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must use software single-stepping. */
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set_gdbarch_software_single_step (gdbarch, alpha_software_single_step);
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set_solib_svr4_fetch_link_map_offsets (gdbarch,
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nbsd_lp64_solib_svr4_fetch_link_map_offsets);
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tdep->dynamic_sigtramp_offset = alphanbsd_sigtramp_offset;
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tdep->sigcontext_addr = alphanbsd_sigcontext_addr;
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tdep->jb_pc = 2;
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tdep->jb_elt_size = 8;
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}
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void
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_initialize_alphanbsd_tdep (void)
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{
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gdbarch_register_osabi (bfd_arch_alpha, 0, GDB_OSABI_NETBSD_ELF,
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alphanbsd_init_abi);
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add_core_fns (&alphanbsd_core_fns);
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add_core_fns (&alphanbsd_elfcore_fns);
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}
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