20bca71d82
Since every target typedefs this the same way, move it to the common code. We have to leave Blackfin behind here for now because of inter-dependencies on types and headers: sim-base.h includes sim-model.h which needs types in machs.h which needs types in bfim-sim.h which needs SIM_CPU.
95 lines
2.3 KiB
C
95 lines
2.3 KiB
C
/* This file is part of the program psim.
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Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
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Copyright (C) 1997-2015 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef SIM_MAIN_H
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#define SIM_MAIN_H
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#define WITH_CORE
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#define WITH_WATCHPOINTS 1
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#define SIM_HANDLES_LMA 1
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#define SIM_ENGINE_HALT_HOOK(SD,LAST_CPU,CIA) 0 /* disable this hook */
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#include "sim-basics.h"
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#include "sim-signal.h"
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#include <signal.h> /* For kill() in insns:do_trap */
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#include <errno.h>
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#ifdef HAVE_UNISTD_H
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#include <unistd.h>
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#endif
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/* These are generated files. */
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#include "itable.h"
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#include "idecode.h"
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#define WITH_WATCHPOINTS 1
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#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
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mn10300_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))
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#include "sim-base.h"
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#include "mn10300_sim.h"
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/* Bring data in from the cold */
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#define IMEM8(EA) \
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(sim_core_read_aligned_1(STATE_CPU(sd, 0), EA, exec_map, (EA)))
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#define IMEM8_IMMED(EA, N) \
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(sim_core_read_aligned_1(STATE_CPU(sd, 0), EA, exec_map, (EA) + (N)))
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/* FIXME: For moment, save/restore PC value found in struct State.
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Struct State will one day go away, being placed in the sim_cpu
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state. */
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struct _sim_cpu {
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sim_event *pending_nmi;
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sim_cia cia;
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sim_cpu_base base;
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};
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struct sim_state {
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/* the processors proper */
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sim_cpu *cpu[MAX_NR_PROCESSORS];
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/* The base class. */
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sim_state_base base;
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};
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/* For compatibility, until all functions converted to passing
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SIM_DESC as an argument */
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extern SIM_DESC simulator;
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/* (re) initialize the simulator */
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extern void engine_init(SIM_DESC sd);
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extern SIM_CORE_SIGNAL_FN mn10300_core_signal;
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#endif
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