da3331ec16
* gdbarch.sh: Add missing opaque declarations. * gdbarch.h: Regnerate. * symtab.h: Add missing opaque declarations. * value.h, target.h, symfile.h, stabsread.h: Ditto. * x86-64-tdep.h, xmodem.h, monitor.h, typeprint.h: Ditto. * srec.h, solib-svr4.h, source.h, inferior.h: Ditto. * ser-unix.h, serial.h, remote-utils.h, gdbcore.h: Ditto. * ppc-tdep.h, ocd.h, mips-tdep.h, gdbtypes.h: Ditto. * buildsym.h, builtin-regs.h, linespec.h, language.h: Ditto. * i387-tdep.h, gdbthread.h, event-top.h, gdb.h: Ditto. * dwarf2cfi.h, doublest.h, disasm.h, cp-abi.h: Ditto. * cli-out.h, c-lang.h, ax-gdb.h, arch-utils.h: Ditto. * ada-lang.h, config/nm-lynx.h, config/nm-linux.h: Ditto. * config/sparc/tm-sp64.h, config/rs6000/tm-rs6000.h: Ditto. * config/pa/tm-hppah.h, config/m68k/tm-delta68.h: Ditto. * cli/cli-setshow.h, cli/cli-script.h: Ditto.
143 lines
4.8 KiB
C
143 lines
4.8 KiB
C
/* Definitions for the Macraigor Systems BDM Wiggler
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Copyright 1996, 1997, 1998, 2000, 2001 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#ifndef OCD_H
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#define OCD_H
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struct mem_attrib;
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struct target_ops;
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/* Wiggler serial protocol definitions */
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#define DLE 020 /* Quote char */
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#define SYN 026 /* Start of packet */
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#define RAW_SYN ((026 << 8) | 026) /* get_quoted_char found a naked SYN */
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/* Status flags */
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#define OCD_FLAG_RESET 0x01 /* Target is being reset */
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#define OCD_FLAG_STOPPED 0x02 /* Target is halted */
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#define OCD_FLAG_BDM 0x04 /* Target is in BDM */
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#define OCD_FLAG_PWF 0x08 /* Power failed */
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#define OCD_FLAG_CABLE_DISC 0x10 /* BDM cable disconnected */
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/* Commands */
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#define OCD_AYT 0x0 /* Are you there? */
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#define OCD_GET_VERSION 0x1 /* Get Version */
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#define OCD_SET_BAUD_RATE 0x2 /* Set Baud Rate */
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#define OCD_INIT 0x10 /* Initialize Wiggler */
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#define OCD_SET_SPEED 0x11 /* Set Speed */
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#define OCD_GET_STATUS_MASK 0x12 /* Get Status Mask */
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#define OCD_GET_CTRS 0x13 /* Get Error Counters */
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#define OCD_SET_FUNC_CODE 0x14 /* Set Function Code */
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#define OCD_SET_CTL_FLAGS 0x15 /* Set Control Flags */
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#define OCD_SET_BUF_ADDR 0x16 /* Set Register Buffer Address */
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#define OCD_RUN 0x20 /* Run Target from PC */
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#define OCD_RUN_ADDR 0x21 /* Run Target from Specified Address */
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#define OCD_STOP 0x22 /* Stop Target */
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#define OCD_RESET_RUN 0x23 /* Reset Target and Run */
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#define OCD_RESET 0x24 /* Reset Target and Halt */
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#define OCD_STEP 0x25 /* Single step */
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#define OCD_READ_REGS 0x30 /* Read Registers */
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#define OCD_WRITE_REGS 0x31 /* Write Registers */
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#define OCD_READ_MEM 0x32 /* Read Memory */
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#define OCD_WRITE_MEM 0x33 /* Write Memory */
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#define OCD_FILL_MEM 0x34 /* Fill Memory */
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#define OCD_MOVE_MEM 0x35 /* Move Memory */
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#define OCD_READ_INT_MEM 0x80 /* Read Internal Memory */
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#define OCD_WRITE_INT_MEM 0x81 /* Write Internal Memory */
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#define OCD_JUMP 0x82 /* Jump to Subroutine */
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#define OCD_ERASE_FLASH 0x90 /* Erase flash memory */
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#define OCD_PROGRAM_FLASH 0x91 /* Write flash memory */
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#define OCD_EXIT_MON 0x93 /* Exit the flash programming monitor */
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#define OCD_ENTER_MON 0x94 /* Enter the flash programming monitor */
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#define OCD_SET_STATUS 0x0a /* Set status */
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#define OCD_SET_CONNECTION 0xf0 /* Set connection (init Wigglers.dll) */
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#define OCD_LOG_FILE 0xf1 /* Cmd to get Wigglers.dll to log cmds */
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#define OCD_FLAG_STOP 0x0 /* Stop the target, enter BDM */
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#define OCD_FLAG_START 0x01 /* Start the target at PC */
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#define OCD_FLAG_RETURN_STATUS 0x04 /* Return async status */
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/* Target type (for OCD_INIT command) */
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enum ocd_target_type
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{
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OCD_TARGET_CPU32 = 0x0, /* Moto cpu32 family */
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OCD_TARGET_CPU16 = 0x1,
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OCD_TARGET_MOTO_PPC = 0x2, /* Motorola PPC 5xx/8xx */
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OCD_TARGET_IBM_PPC = 0x3
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}; /* IBM PPC 4xx */
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void ocd_open (char *name, int from_tty, enum ocd_target_type,
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struct target_ops *ops);
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void ocd_close (int quitting);
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void ocd_detach (char *args, int from_tty);
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void ocd_resume (ptid_t ptid, int step, enum target_signal siggnal);
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void ocd_prepare_to_store (void);
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void ocd_stop (void);
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void ocd_files_info (struct target_ops *ignore);
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int ocd_xfer_memory (CORE_ADDR memaddr, char *myaddr,
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int len, int should_write,
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struct mem_attrib *attrib,
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struct target_ops *target);
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void ocd_mourn (void);
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void ocd_create_inferior (char *exec_file, char *args, char **env);
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int ocd_thread_alive (ptid_t th);
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void ocd_error (char *s, int error_code);
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void ocd_kill (void);
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void ocd_load (char *args, int from_tty);
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unsigned char *ocd_read_bdm_registers (int first_bdm_regno,
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int last_bdm_regno, int *reglen);
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CORE_ADDR ocd_read_bdm_register (int bdm_regno);
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void ocd_write_bdm_registers (int first_bdm_regno,
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unsigned char *regptr, int reglen);
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void ocd_write_bdm_register (int bdm_regno, CORE_ADDR reg);
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int ocd_wait (void);
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int ocd_insert_breakpoint (CORE_ADDR addr, char *contents_cache);
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int ocd_remove_breakpoint (CORE_ADDR addr, char *contents_cache);
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int ocd_write_bytes (CORE_ADDR memaddr, char *myaddr, int len);
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#endif /* OCD_H */
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