662 lines
21 KiB
C
662 lines
21 KiB
C
/* Target-machine dependent code for Motorola 88000 series, for GDB.
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Copyright 1988, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998,
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2000, 2001, 2002 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "frame.h"
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#include "inferior.h"
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#include "value.h"
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#include "gdbcore.h"
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#include "symtab.h"
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#include "setjmp.h"
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#include "value.h"
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#include "regcache.h"
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/* Size of an instruction */
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#define BYTES_PER_88K_INSN 4
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void frame_find_saved_regs ();
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/* Is this target an m88110? Otherwise assume m88100. This has
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relevance for the ways in which we screw with instruction pointers. */
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int target_is_m88110 = 0;
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void
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m88k_target_write_pc (CORE_ADDR pc, ptid_t ptid)
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{
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/* According to the MC88100 RISC Microprocessor User's Manual,
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section 6.4.3.1.2:
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... can be made to return to a particular instruction by placing
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a valid instruction address in the SNIP and the next sequential
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instruction address in the SFIP (with V bits set and E bits
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clear). The rte resumes execution at the instruction pointed to
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by the SNIP, then the SFIP.
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The E bit is the least significant bit (bit 0). The V (valid)
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bit is bit 1. This is why we logical or 2 into the values we are
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writing below. It turns out that SXIP plays no role when
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returning from an exception so nothing special has to be done
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with it. We could even (presumably) give it a totally bogus
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value.
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-- Kevin Buettner */
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write_register_pid (SXIP_REGNUM, pc, ptid);
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write_register_pid (SNIP_REGNUM, (pc | 2), ptid);
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write_register_pid (SFIP_REGNUM, (pc | 2) + 4, ptid);
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}
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/* The type of a register. */
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struct type *
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m88k_register_type (int regnum)
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{
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if (regnum >= XFP_REGNUM)
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return builtin_type_m88110_ext;
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else if (regnum == PC_REGNUM || regnum == FP_REGNUM || regnum == SP_REGNUM)
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return builtin_type_void_func_ptr;
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else
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return builtin_type_int32;
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}
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/* The m88k kernel aligns all instructions on 4-byte boundaries. The
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kernel also uses the least significant two bits for its own hocus
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pocus. When gdb receives an address from the kernel, it needs to
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preserve those right-most two bits, but gdb also needs to be careful
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to realize that those two bits are not really a part of the address
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of an instruction. Shrug. */
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CORE_ADDR
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m88k_addr_bits_remove (CORE_ADDR addr)
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{
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return ((addr) & ~3);
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}
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/* Given a GDB frame, determine the address of the calling function's frame.
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This will be used to create a new GDB frame struct, and then
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INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
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For us, the frame address is its stack pointer value, so we look up
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the function prologue to determine the caller's sp value, and return it. */
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CORE_ADDR
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frame_chain (struct frame_info *thisframe)
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{
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frame_find_saved_regs (thisframe, (struct frame_saved_regs *) 0);
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/* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
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the ADDRESS, of SP_REGNUM. It also depends on the cache of
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frame_find_saved_regs results. */
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if (thisframe->fsr->regs[SP_REGNUM])
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return thisframe->fsr->regs[SP_REGNUM];
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else
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return thisframe->frame; /* Leaf fn -- next frame up has same SP. */
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}
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int
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frameless_function_invocation (struct frame_info *frame)
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{
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frame_find_saved_regs (frame, (struct frame_saved_regs *) 0);
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/* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
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the ADDRESS, of SP_REGNUM. It also depends on the cache of
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frame_find_saved_regs results. */
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if (frame->fsr->regs[SP_REGNUM])
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return 0; /* Frameful -- return addr saved somewhere */
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else
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return 1; /* Frameless -- no saved return address */
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}
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void
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init_extra_frame_info (int fromleaf, struct frame_info *frame)
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{
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frame->fsr = 0; /* Not yet allocated */
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frame->args_pointer = 0; /* Unknown */
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frame->locals_pointer = 0; /* Unknown */
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}
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/* Examine an m88k function prologue, recording the addresses at which
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registers are saved explicitly by the prologue code, and returning
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the address of the first instruction after the prologue (but not
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after the instruction at address LIMIT, as explained below).
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LIMIT places an upper bound on addresses of the instructions to be
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examined. If the prologue code scan reaches LIMIT, the scan is
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aborted and LIMIT is returned. This is used, when examining the
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prologue for the current frame, to keep examine_prologue () from
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claiming that a given register has been saved when in fact the
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instruction that saves it has not yet been executed. LIMIT is used
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at other times to stop the scan when we hit code after the true
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function prologue (e.g. for the first source line) which might
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otherwise be mistaken for function prologue.
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The format of the function prologue matched by this routine is
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derived from examination of the source to gcc 1.95, particularly
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the routine output_prologue () in config/out-m88k.c.
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subu r31,r31,n # stack pointer update
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(st rn,r31,offset)? # save incoming regs
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(st.d rn,r31,offset)?
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(addu r30,r31,n)? # frame pointer update
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(pic sequence)? # PIC code prologue
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(or rn,rm,0)? # Move parameters to other regs
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*/
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/* Macros for extracting fields from instructions. */
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#define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos))
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#define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width))
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#define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF))
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#define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF))
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#define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5)
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#define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF))
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/*
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* prologue_insn_tbl is a table of instructions which may comprise a
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* function prologue. Associated with each table entry (corresponding
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* to a single instruction or group of instructions), is an action.
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* This action is used by examine_prologue (below) to determine
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* the state of certain machine registers and where the stack frame lives.
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*/
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enum prologue_insn_action
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{
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PIA_SKIP, /* don't care what the instruction does */
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PIA_NOTE_ST, /* note register stored and where */
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PIA_NOTE_STD, /* note pair of registers stored and where */
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PIA_NOTE_SP_ADJUSTMENT, /* note stack pointer adjustment */
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PIA_NOTE_FP_ASSIGNMENT, /* note frame pointer assignment */
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PIA_NOTE_PROLOGUE_END, /* no more prologue */
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};
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struct prologue_insns
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{
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unsigned long insn;
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unsigned long mask;
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enum prologue_insn_action action;
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};
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struct prologue_insns prologue_insn_tbl[] =
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{
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/* Various register move instructions */
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{0x58000000, 0xf800ffff, PIA_SKIP}, /* or/or.u with immed of 0 */
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{0xf4005800, 0xfc1fffe0, PIA_SKIP}, /* or rd, r0, rs */
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{0xf4005800, 0xfc00ffff, PIA_SKIP}, /* or rd, rs, r0 */
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/* Stack pointer setup: "subu sp, sp, n" where n is a multiple of 8 */
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{0x67ff0000, 0xffff0007, PIA_NOTE_SP_ADJUSTMENT},
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/* Frame pointer assignment: "addu r30, r31, n" */
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{0x63df0000, 0xffff0000, PIA_NOTE_FP_ASSIGNMENT},
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/* Store to stack instructions; either "st rx, sp, n" or "st.d rx, sp, n" */
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{0x241f0000, 0xfc1f0000, PIA_NOTE_ST}, /* st rx, sp, n */
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{0x201f0000, 0xfc1f0000, PIA_NOTE_STD}, /* st.d rs, sp, n */
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/* Instructions needed for setting up r25 for pic code. */
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{0x5f200000, 0xffff0000, PIA_SKIP}, /* or.u r25, r0, offset_high */
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{0xcc000002, 0xffffffff, PIA_SKIP}, /* bsr.n Lab */
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{0x5b390000, 0xffff0000, PIA_SKIP}, /* or r25, r25, offset_low */
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{0xf7396001, 0xffffffff, PIA_SKIP}, /* Lab: addu r25, r25, r1 */
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/* Various branch or jump instructions which have a delay slot -- these
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do not form part of the prologue, but the instruction in the delay
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slot might be a store instruction which should be noted. */
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{0xc4000000, 0xe4000000, PIA_NOTE_PROLOGUE_END},
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/* br.n, bsr.n, bb0.n, or bb1.n */
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{0xec000000, 0xfc000000, PIA_NOTE_PROLOGUE_END}, /* bcnd.n */
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{0xf400c400, 0xfffff7e0, PIA_NOTE_PROLOGUE_END} /* jmp.n or jsr.n */
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};
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/* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or
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is not the address of a valid instruction, the address of the next
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instruction beyond ADDR otherwise. *PWORD1 receives the first word
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of the instruction. */
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#define NEXT_PROLOGUE_INSN(addr, lim, pword1) \
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(((addr) < (lim)) ? next_insn (addr, pword1) : 0)
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/* Read the m88k instruction at 'memaddr' and return the address of
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the next instruction after that, or 0 if 'memaddr' is not the
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address of a valid instruction. The instruction
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is stored at 'pword1'. */
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CORE_ADDR
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next_insn (CORE_ADDR memaddr, unsigned long *pword1)
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{
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*pword1 = read_memory_integer (memaddr, BYTES_PER_88K_INSN);
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return memaddr + BYTES_PER_88K_INSN;
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}
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/* Read a register from frames called by us (or from the hardware regs). */
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static int
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read_next_frame_reg (struct frame_info *frame, int regno)
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{
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for (; frame; frame = frame->next)
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{
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if (regno == SP_REGNUM)
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return FRAME_FP (frame);
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else if (frame->fsr->regs[regno])
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return read_memory_integer (frame->fsr->regs[regno], 4);
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}
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return read_register (regno);
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}
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/* Examine the prologue of a function. `ip' points to the first instruction.
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`limit' is the limit of the prologue (e.g. the addr of the first
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linenumber, or perhaps the program counter if we're stepping through).
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`frame_sp' is the stack pointer value in use in this frame.
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`fsr' is a pointer to a frame_saved_regs structure into which we put
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info about the registers saved by this frame.
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`fi' is a struct frame_info pointer; we fill in various fields in it
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to reflect the offsets of the arg pointer and the locals pointer. */
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static CORE_ADDR
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examine_prologue (register CORE_ADDR ip, register CORE_ADDR limit,
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CORE_ADDR frame_sp, struct frame_saved_regs *fsr,
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struct frame_info *fi)
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{
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register CORE_ADDR next_ip;
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register int src;
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unsigned long insn;
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int size, offset;
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char must_adjust[32]; /* If set, must adjust offsets in fsr */
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int sp_offset = -1; /* -1 means not set (valid must be mult of 8) */
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int fp_offset = -1; /* -1 means not set */
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CORE_ADDR frame_fp;
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CORE_ADDR prologue_end = 0;
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memset (must_adjust, '\0', sizeof (must_adjust));
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next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
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while (next_ip)
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{
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struct prologue_insns *pip;
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for (pip = prologue_insn_tbl; (insn & pip->mask) != pip->insn;)
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if (++pip >= prologue_insn_tbl + sizeof prologue_insn_tbl)
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goto end_of_prologue_found; /* not a prologue insn */
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switch (pip->action)
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{
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case PIA_NOTE_ST:
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case PIA_NOTE_STD:
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if (sp_offset != -1)
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{
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src = ST_SRC (insn);
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offset = ST_OFFSET (insn);
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must_adjust[src] = 1;
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fsr->regs[src++] = offset; /* Will be adjusted later */
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if (pip->action == PIA_NOTE_STD && src < 32)
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{
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offset += 4;
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must_adjust[src] = 1;
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fsr->regs[src++] = offset;
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}
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}
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else
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goto end_of_prologue_found;
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break;
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case PIA_NOTE_SP_ADJUSTMENT:
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if (sp_offset == -1)
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sp_offset = -SUBU_OFFSET (insn);
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else
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goto end_of_prologue_found;
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break;
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case PIA_NOTE_FP_ASSIGNMENT:
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if (fp_offset == -1)
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fp_offset = ADDU_OFFSET (insn);
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else
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goto end_of_prologue_found;
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break;
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case PIA_NOTE_PROLOGUE_END:
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if (!prologue_end)
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prologue_end = ip;
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break;
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case PIA_SKIP:
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default:
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/* Do nothing */
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break;
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}
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ip = next_ip;
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next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
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}
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end_of_prologue_found:
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if (prologue_end)
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ip = prologue_end;
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/* We're done with the prologue. If we don't care about the stack
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frame itself, just return. (Note that fsr->regs has been trashed,
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but the one caller who calls with fi==0 passes a dummy there.) */
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if (fi == 0)
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return ip;
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/*
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OK, now we have:
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sp_offset original (before any alloca calls) displacement of SP
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(will be negative).
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fp_offset displacement from original SP to the FP for this frame
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or -1.
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fsr->regs[0..31] displacement from original SP to the stack
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location where reg[0..31] is stored.
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must_adjust[0..31] set if corresponding offset was set.
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If alloca has been called between the function prologue and the current
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IP, then the current SP (frame_sp) will not be the original SP as set by
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the function prologue. If the current SP is not the original SP, then the
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compiler will have allocated an FP for this frame, fp_offset will be set,
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and we can use it to calculate the original SP.
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Then, we figure out where the arguments and locals are, and relocate the
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offsets in fsr->regs to absolute addresses. */
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if (fp_offset != -1)
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{
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/* We have a frame pointer, so get it, and base our calc's on it. */
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frame_fp = (CORE_ADDR) read_next_frame_reg (fi->next, ACTUAL_FP_REGNUM);
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frame_sp = frame_fp - fp_offset;
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}
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else
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{
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/* We have no frame pointer, therefore frame_sp is still the same value
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as set by prologue. But where is the frame itself? */
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if (must_adjust[SRP_REGNUM])
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{
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/* Function header saved SRP (r1), the return address. Frame starts
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4 bytes down from where it was saved. */
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frame_fp = frame_sp + fsr->regs[SRP_REGNUM] - 4;
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fi->locals_pointer = frame_fp;
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}
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else
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{
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/* Function header didn't save SRP (r1), so we are in a leaf fn or
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are otherwise confused. */
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frame_fp = -1;
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}
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}
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/* The locals are relative to the FP (whether it exists as an allocated
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register, or just as an assumed offset from the SP) */
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fi->locals_pointer = frame_fp;
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/* The arguments are just above the SP as it was before we adjusted it
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on entry. */
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fi->args_pointer = frame_sp - sp_offset;
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/* Now that we know the SP value used by the prologue, we know where
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it saved all the registers. */
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for (src = 0; src < 32; src++)
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if (must_adjust[src])
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fsr->regs[src] += frame_sp;
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/* The saved value of the SP is always known. */
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/* (we hope...) */
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if (fsr->regs[SP_REGNUM] != 0
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&& fsr->regs[SP_REGNUM] != frame_sp - sp_offset)
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fprintf_unfiltered (gdb_stderr, "Bad saved SP value %lx != %lx, offset %x!\n",
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fsr->regs[SP_REGNUM],
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frame_sp - sp_offset, sp_offset);
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fsr->regs[SP_REGNUM] = frame_sp - sp_offset;
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return (ip);
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}
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/* Given an ip value corresponding to the start of a function,
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return the ip of the first instruction after the function
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prologue. */
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CORE_ADDR
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m88k_skip_prologue (CORE_ADDR ip)
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{
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struct frame_saved_regs saved_regs_dummy;
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struct symtab_and_line sal;
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CORE_ADDR limit;
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sal = find_pc_line (ip, 0);
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limit = (sal.end) ? sal.end : 0xffffffff;
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return (examine_prologue (ip, limit, (CORE_ADDR) 0, &saved_regs_dummy,
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(struct frame_info *) 0));
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}
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/* Put here the code to store, into a struct frame_saved_regs,
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the addresses of the saved registers of frame described by FRAME_INFO.
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This includes special registers such as pc and fp saved in special
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ways in the stack frame. sp is even more special:
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the address we return for it IS the sp for the next frame.
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We cache the result of doing this in the frame_obstack, since it is
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fairly expensive. */
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void
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frame_find_saved_regs (struct frame_info *fi, struct frame_saved_regs *fsr)
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{
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register struct frame_saved_regs *cache_fsr;
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CORE_ADDR ip;
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struct symtab_and_line sal;
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CORE_ADDR limit;
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if (!fi->fsr)
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{
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cache_fsr = (struct frame_saved_regs *)
|
||
frame_obstack_alloc (sizeof (struct frame_saved_regs));
|
||
memset (cache_fsr, '\0', sizeof (struct frame_saved_regs));
|
||
fi->fsr = cache_fsr;
|
||
|
||
/* Find the start and end of the function prologue. If the PC
|
||
is in the function prologue, we only consider the part that
|
||
has executed already. In the case where the PC is not in
|
||
the function prologue, we set limit to two instructions beyond
|
||
where the prologue ends in case if any of the prologue instructions
|
||
were moved into a delay slot of a branch instruction. */
|
||
|
||
ip = get_pc_function_start (fi->pc);
|
||
sal = find_pc_line (ip, 0);
|
||
limit = (sal.end && sal.end < fi->pc) ? sal.end + 2 * BYTES_PER_88K_INSN
|
||
: fi->pc;
|
||
|
||
/* This will fill in fields in *fi as well as in cache_fsr. */
|
||
#ifdef SIGTRAMP_FRAME_FIXUP
|
||
if (fi->signal_handler_caller)
|
||
SIGTRAMP_FRAME_FIXUP (fi->frame);
|
||
#endif
|
||
examine_prologue (ip, limit, fi->frame, cache_fsr, fi);
|
||
#ifdef SIGTRAMP_SP_FIXUP
|
||
if (fi->signal_handler_caller && fi->fsr->regs[SP_REGNUM])
|
||
SIGTRAMP_SP_FIXUP (fi->fsr->regs[SP_REGNUM]);
|
||
#endif
|
||
}
|
||
|
||
if (fsr)
|
||
*fsr = *fi->fsr;
|
||
}
|
||
|
||
/* Return the address of the locals block for the frame
|
||
described by FI. Returns 0 if the address is unknown.
|
||
NOTE! Frame locals are referred to by negative offsets from the
|
||
argument pointer, so this is the same as frame_args_address(). */
|
||
|
||
CORE_ADDR
|
||
frame_locals_address (struct frame_info *fi)
|
||
{
|
||
struct frame_saved_regs fsr;
|
||
|
||
if (fi->args_pointer) /* Cached value is likely there. */
|
||
return fi->args_pointer;
|
||
|
||
/* Nope, generate it. */
|
||
|
||
get_frame_saved_regs (fi, &fsr);
|
||
|
||
return fi->args_pointer;
|
||
}
|
||
|
||
/* Return the address of the argument block for the frame
|
||
described by FI. Returns 0 if the address is unknown. */
|
||
|
||
CORE_ADDR
|
||
frame_args_address (struct frame_info *fi)
|
||
{
|
||
struct frame_saved_regs fsr;
|
||
|
||
if (fi->args_pointer) /* Cached value is likely there. */
|
||
return fi->args_pointer;
|
||
|
||
/* Nope, generate it. */
|
||
|
||
get_frame_saved_regs (fi, &fsr);
|
||
|
||
return fi->args_pointer;
|
||
}
|
||
|
||
/* Return the saved PC from this frame.
|
||
|
||
If the frame has a memory copy of SRP_REGNUM, use that. If not,
|
||
just use the register SRP_REGNUM itself. */
|
||
|
||
CORE_ADDR
|
||
frame_saved_pc (struct frame_info *frame)
|
||
{
|
||
return read_next_frame_reg (frame, SRP_REGNUM);
|
||
}
|
||
|
||
|
||
#define DUMMY_FRAME_SIZE 192
|
||
|
||
static void
|
||
write_word (CORE_ADDR sp, ULONGEST word)
|
||
{
|
||
register int len = REGISTER_SIZE;
|
||
char buffer[MAX_REGISTER_RAW_SIZE];
|
||
|
||
store_unsigned_integer (buffer, len, word);
|
||
write_memory (sp, buffer, len);
|
||
}
|
||
|
||
void
|
||
m88k_push_dummy_frame (void)
|
||
{
|
||
register CORE_ADDR sp = read_register (SP_REGNUM);
|
||
register int rn;
|
||
int offset;
|
||
|
||
sp -= DUMMY_FRAME_SIZE; /* allocate a bunch of space */
|
||
|
||
for (rn = 0, offset = 0; rn <= SP_REGNUM; rn++, offset += 4)
|
||
write_word (sp + offset, read_register (rn));
|
||
|
||
write_word (sp + offset, read_register (SXIP_REGNUM));
|
||
offset += 4;
|
||
|
||
write_word (sp + offset, read_register (SNIP_REGNUM));
|
||
offset += 4;
|
||
|
||
write_word (sp + offset, read_register (SFIP_REGNUM));
|
||
offset += 4;
|
||
|
||
write_word (sp + offset, read_register (PSR_REGNUM));
|
||
offset += 4;
|
||
|
||
write_word (sp + offset, read_register (FPSR_REGNUM));
|
||
offset += 4;
|
||
|
||
write_word (sp + offset, read_register (FPCR_REGNUM));
|
||
offset += 4;
|
||
|
||
write_register (SP_REGNUM, sp);
|
||
write_register (ACTUAL_FP_REGNUM, sp);
|
||
}
|
||
|
||
void
|
||
pop_frame (void)
|
||
{
|
||
register struct frame_info *frame = get_current_frame ();
|
||
register int regnum;
|
||
struct frame_saved_regs fsr;
|
||
|
||
get_frame_saved_regs (frame, &fsr);
|
||
|
||
if (PC_IN_CALL_DUMMY (read_pc (), read_register (SP_REGNUM), frame->frame))
|
||
{
|
||
/* FIXME: I think get_frame_saved_regs should be handling this so
|
||
that we can deal with the saved registers properly (e.g. frame
|
||
1 is a call dummy, the user types "frame 2" and then "print $ps"). */
|
||
register CORE_ADDR sp = read_register (ACTUAL_FP_REGNUM);
|
||
int offset;
|
||
|
||
for (regnum = 0, offset = 0; regnum <= SP_REGNUM; regnum++, offset += 4)
|
||
(void) write_register (regnum, read_memory_integer (sp + offset, 4));
|
||
|
||
write_register (SXIP_REGNUM, read_memory_integer (sp + offset, 4));
|
||
offset += 4;
|
||
|
||
write_register (SNIP_REGNUM, read_memory_integer (sp + offset, 4));
|
||
offset += 4;
|
||
|
||
write_register (SFIP_REGNUM, read_memory_integer (sp + offset, 4));
|
||
offset += 4;
|
||
|
||
write_register (PSR_REGNUM, read_memory_integer (sp + offset, 4));
|
||
offset += 4;
|
||
|
||
write_register (FPSR_REGNUM, read_memory_integer (sp + offset, 4));
|
||
offset += 4;
|
||
|
||
write_register (FPCR_REGNUM, read_memory_integer (sp + offset, 4));
|
||
offset += 4;
|
||
|
||
}
|
||
else
|
||
{
|
||
for (regnum = FP_REGNUM; regnum > 0; regnum--)
|
||
if (fsr.regs[regnum])
|
||
write_register (regnum,
|
||
read_memory_integer (fsr.regs[regnum], 4));
|
||
write_pc (frame_saved_pc (frame));
|
||
}
|
||
reinit_frame_cache ();
|
||
}
|
||
|
||
void
|
||
_initialize_m88k_tdep (void)
|
||
{
|
||
tm_print_insn = print_insn_m88k;
|
||
}
|