cd4a7468c9
* elf32-spu.c (struct spu_link_hash_table): Add init, line_size_log2,
num_lines_log2.
(struct got_entry): Add br_addr.
(struct call_info): Add priority.
(struct function_info): Add lr_store and sp_adjust.
(spu_elf_setup): Init line_size_log2 and num_lines_log2.
(spu_elf_find_overlays): For soft-icache, mark any section within cache
area as an overlay, and check that no other overlays exist. Look up
icache overlay manager entry sym.
(BRA_STUBS, BRA, BRASL): Define.
(enum _stub_type): Replace ovl_stub with call_ovl_stub and br*_ovl_stub.
(needs_ovl_stub): Adjust for soft-icache. Return priority encoded
in branch insn.
(count_stub, build_stub): Support soft-icache.
(build_spuear_stubs, process_stubs): Adjust build_stub call.
(spu_elf_size_stubs): Size soft-icache stubs.
(overlay_index): New function.
(spu_elf_build_stubs): Make static. Support soft-icache.
(spu_elf_check_vma): Don't turn off auto_overlay if soft-icache.
(find_function_stack_adjust): Save lr store and stack adjust insn
offsets.
(maybe_insert_function): Adjust find_function_stack_adjust call.
(mark_functions_via_relocs): Retrieve priority.
(remove_cycles): Only warn about pruned arcs when stack_analysis.
(sort_calls): Sort by priority first.
(mark_overlay_section): Ignore .ovl.init.
(sum_stack): Only print when stack_analysis.
(print_one_overlay_section): New function, extracted from..
(spu_elf_auto_overlay): ..here. Support soft-icache overlays.
(spu_elf_stack_analysis): Only print when htab->stack_analysis.
(spu_elf_final_link): Call spu_elf_stack_analysis for lrlive
analysis. Call spu_elf_build_stubs.
(spu_elf_relocate_section): For soft-icache encode overlay index
into addresses.
(spu_elf_output_symbol_hook): Support soft-icache.
(spu_elf_modify_program_headers: Likewise.
* elf32-spu.h (struct spu_elf_params): Add lrlive_analysis. Rename
num_regions to num_lines. Add line_size and max_branch.
(enum _ovly_flavour): Add ovly_soft_icache.
(spu_elf_build_stubs): Delete.
gas/
* config/tc-spu.c (md_pseudo_table): Add "brinfo".
(brinfo): New var.
(md_assemble): Poke brinfo into branch instructions.
(spu_brinfo): New function.
(md_apply_fix): Don't assume insn fields start off at zero, mask
them to remove possible brinfo.
ld/
* emultempl/spuelf.em (params): Init new fields.
(num_lines_set, line_size_set, icache_mgr, icache_mgr_stream): New vars.
(spu_place_special_section): Adjust placement for soft-icache. Pad
soft-icache section to a fixed size. Clear addr_tree.
(spu_elf_load_ovl_mgr): Support soft-icache. Map overlay manager
sections a little more intelligently.
(gld${EMULATION_NAME}_finish): Don't call spu_elf_build_stubs.
(OPTION_SPU_NUM_LINES): Rename from OPTION_SPU_NUM_REGIONS.
(OPTION_SPU_SOFT_ICACHE, OPTION_SPU_LINE_SIZE): Define.
(OPTION_SPU_LRLIVE): Define.
(PARSE_AND_LIST_LONGOPTS): Add new soft-icache options.
(PARSE_AND_LIST_OPTIONS): Likewise.
(PARSE_AND_LIST_ARGS_CASES): Handle them.
* emultempl/spu_icache.S: Dummy file.
* emultempl/spu_icache.o_c: Regenerate.
* Makefile.am (eelf32_spu.c): Depend on spu_icache.o_c.
(spu_icache.o_c): Add rule to build.
(CLEANFILES): Zap temp files.
(EXTRA_DIST): Add spu_icache.o_c.
* Makefile.in: Regenerate.
ld/testsuite/
* ld-spu/ovl.d: Allow for absolute branches in stubs.
* ld-spu/ovl2.d: Likewise.
1102 lines
27 KiB
C
1102 lines
27 KiB
C
/* spu.c -- Assembler for the IBM Synergistic Processing Unit (SPU)
|
||
|
||
Copyright 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
|
||
|
||
This file is part of GAS, the GNU Assembler.
|
||
|
||
GAS is free software; you can redistribute it and/or modify
|
||
it under the terms of the GNU General Public License as published by
|
||
the Free Software Foundation; either version 3, or (at your option)
|
||
any later version.
|
||
|
||
GAS is distributed in the hope that it will be useful,
|
||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||
GNU General Public License for more details.
|
||
|
||
You should have received a copy of the GNU General Public License
|
||
along with GAS; see the file COPYING. If not, write to the Free
|
||
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA. */
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#include "as.h"
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#include "safe-ctype.h"
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#include "subsegs.h"
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#include "dwarf2dbg.h"
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const struct spu_opcode spu_opcodes[] = {
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#define APUOP(TAG,MACFORMAT,OPCODE,MNEMONIC,ASMFORMAT,DEP,PIPE) \
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{ MACFORMAT, (OPCODE) << (32-11), MNEMONIC, ASMFORMAT },
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#define APUOPFB(TAG,MACFORMAT,OPCODE,FB,MNEMONIC,ASMFORMAT,DEP,PIPE) \
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{ MACFORMAT, ((OPCODE) << (32-11)) | ((FB) << (32-18)), MNEMONIC, ASMFORMAT },
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#include "opcode/spu-insns.h"
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#undef APUOP
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#undef APUOPFB
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};
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static const int spu_num_opcodes =
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sizeof (spu_opcodes) / sizeof (spu_opcodes[0]);
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#define MAX_RELOCS 2
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struct spu_insn
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{
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unsigned int opcode;
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expressionS exp[MAX_RELOCS];
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int reloc_arg[MAX_RELOCS];
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bfd_reloc_code_real_type reloc[MAX_RELOCS];
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enum spu_insns tag;
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};
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static const char *get_imm (const char *param, struct spu_insn *insn, int arg);
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static const char *get_reg (const char *param, struct spu_insn *insn, int arg,
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int accept_expr);
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static int calcop (struct spu_opcode *format, const char *param,
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struct spu_insn *insn);
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static void spu_brinfo (int);
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static void spu_cons (int);
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extern char *myname;
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static struct hash_control *op_hash = NULL;
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/* These bits should be turned off in the first address of every segment */
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int md_seg_align = 7;
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/* These chars start a comment anywhere in a source file (except inside
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another comment */
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const char comment_chars[] = "#";
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/* These chars only start a comment at the beginning of a line. */
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const char line_comment_chars[] = "#";
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/* gods own line continuation char */
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const char line_separator_chars[] = ";";
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/* Chars that can be used to separate mant from exp in floating point nums */
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const char EXP_CHARS[] = "eE";
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/* Chars that mean this number is a floating point constant */
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/* as in 0f123.456 */
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/* or 0H1.234E-12 (see exp chars above) */
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const char FLT_CHARS[] = "dDfF";
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const pseudo_typeS md_pseudo_table[] =
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{
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{"align", s_align_ptwo, 4},
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{"brinfo", spu_brinfo, 0},
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{"bss", s_lcomm_bytes, 1},
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{"def", s_set, 0},
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{"dfloat", float_cons, 'd'},
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{"ffloat", float_cons, 'f'},
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{"global", s_globl, 0},
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{"half", cons, 2},
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{"int", spu_cons, 4},
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{"long", spu_cons, 4},
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{"quad", spu_cons, 8},
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{"string", stringer, 8 + 1},
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{"word", spu_cons, 4},
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/* Force set to be treated as an instruction. */
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{"set", NULL, 0},
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{".set", s_set, 0},
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/* Likewise for eqv. */
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{"eqv", NULL, 0},
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{".eqv", s_set, -1},
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{"file", (void (*) (int)) dwarf2_directive_file, 0 },
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{"loc", dwarf2_directive_loc, 0},
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{0,0,0}
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};
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/* Bits plugged into branch instruction offset field. */
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unsigned int brinfo;
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void
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md_begin (void)
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{
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const char *retval = NULL;
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int i;
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/* initialize hash table */
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op_hash = hash_new ();
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/* loop until you see the end of the list */
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for (i = 0; i < spu_num_opcodes; i++)
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{
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/* hash each mnemonic and record its position */
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retval = hash_insert (op_hash, spu_opcodes[i].mnemonic,
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(void *) &spu_opcodes[i]);
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if (retval != NULL && strcmp (retval, "exists") != 0)
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as_fatal (_("Can't hash instruction '%s':%s"),
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spu_opcodes[i].mnemonic, retval);
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}
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}
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const char *md_shortopts = "";
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struct option md_longopts[] = {
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#define OPTION_APUASM (OPTION_MD_BASE)
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{"apuasm", no_argument, NULL, OPTION_APUASM},
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#define OPTION_DD2 (OPTION_MD_BASE+1)
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{"mdd2.0", no_argument, NULL, OPTION_DD2},
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#define OPTION_DD1 (OPTION_MD_BASE+2)
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{"mdd1.0", no_argument, NULL, OPTION_DD1},
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#define OPTION_DD3 (OPTION_MD_BASE+3)
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{"mdd3.0", no_argument, NULL, OPTION_DD3},
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{ NULL, no_argument, NULL, 0 }
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};
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size_t md_longopts_size = sizeof (md_longopts);
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/* When set (by -apuasm) our assembler emulates the behaviour of apuasm.
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* e.g. don't add bias to float conversion and don't right shift
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* immediate values. */
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static int emulate_apuasm;
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/* Use the dd2.0 instructions set. The only differences are some new
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* register names and the orx insn */
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static int use_dd2 = 1;
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int
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md_parse_option (int c, char *arg ATTRIBUTE_UNUSED)
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{
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switch (c)
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{
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case OPTION_APUASM:
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emulate_apuasm = 1;
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break;
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case OPTION_DD3:
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use_dd2 = 1;
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break;
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case OPTION_DD2:
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use_dd2 = 1;
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break;
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case OPTION_DD1:
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use_dd2 = 0;
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break;
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default:
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return 0;
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}
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return 1;
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}
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void
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md_show_usage (FILE *stream)
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{
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fputs (_("\
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SPU options:\n\
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--apuasm emulate behaviour of apuasm\n"),
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stream);
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}
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struct arg_encode {
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int size;
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int pos;
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int rshift;
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int lo, hi;
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int wlo, whi;
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bfd_reloc_code_real_type reloc;
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};
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static struct arg_encode arg_encode[A_MAX] = {
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{ 7, 0, 0, 0, 127, 0, -1, 0 }, /* A_T */
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{ 7, 7, 0, 0, 127, 0, -1, 0 }, /* A_A */
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{ 7, 14, 0, 0, 127, 0, -1, 0 }, /* A_B */
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{ 7, 21, 0, 0, 127, 0, -1, 0 }, /* A_C */
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{ 7, 7, 0, 0, 127, 0, -1, 0 }, /* A_S */
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{ 7, 7, 0, 0, 127, 0, -1, 0 }, /* A_H */
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{ 0, 0, 0, 0, -1, 0, -1, 0 }, /* A_P */
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{ 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7 }, /* A_S3 */
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{ 7, 14, 0, -32, 31, -31, 0, BFD_RELOC_SPU_IMM7 }, /* A_S6 */
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{ 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7 }, /* A_S7N */
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{ 7, 14, 0, -64, 63, -63, 0, BFD_RELOC_SPU_IMM7 }, /* A_S7 */
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{ 8, 14, 0, 0, 127, 0, -1, BFD_RELOC_SPU_IMM8 }, /* A_U7A */
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{ 8, 14, 0, 0, 127, 0, -1, BFD_RELOC_SPU_IMM8 }, /* A_U7B */
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{ 10, 14, 0, -512, 511, -128, 255, BFD_RELOC_SPU_IMM10 }, /* A_S10B */
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{ 10, 14, 0, -512, 511, 0, -1, BFD_RELOC_SPU_IMM10 }, /* A_S10 */
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{ 2, 23, 9, -1024, 1023, 0, -1, BFD_RELOC_SPU_PCREL9a }, /* A_S11 */
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{ 2, 14, 9, -1024, 1023, 0, -1, BFD_RELOC_SPU_PCREL9b }, /* A_S11I */
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{ 10, 14, 4, -8192, 8191, 0, -1, BFD_RELOC_SPU_IMM10W }, /* A_S14 */
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{ 16, 7, 0, -32768, 32767, 0, -1, BFD_RELOC_SPU_IMM16 }, /* A_S16 */
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{ 16, 7, 2, -131072, 262143, 0, -1, BFD_RELOC_SPU_IMM16W }, /* A_S18 */
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{ 16, 7, 2, -262144, 262143, 0, -1, BFD_RELOC_SPU_PCREL16 }, /* A_R18 */
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{ 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7 }, /* A_U3 */
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{ 7, 14, 0, 0, 127, 0, 31, BFD_RELOC_SPU_IMM7 }, /* A_U5 */
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{ 7, 14, 0, 0, 127, 0, 63, BFD_RELOC_SPU_IMM7 }, /* A_U6 */
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{ 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7 }, /* A_U7 */
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{ 14, 0, 0, 0, 16383, 0, -1, 0 }, /* A_U14 */
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{ 16, 7, 0, -32768, 65535, 0, -1, BFD_RELOC_SPU_IMM16 }, /* A_X16 */
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{ 18, 7, 0, 0, 262143, 0, -1, BFD_RELOC_SPU_IMM18 }, /* A_U18 */
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||
};
|
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|
||
/* Some flags for handling errors. This is very hackish and added after
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* the fact. */
|
||
static int syntax_error_arg;
|
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static const char *syntax_error_param;
|
||
static int syntax_reg;
|
||
|
||
static char *
|
||
insn_fmt_string (struct spu_opcode *format)
|
||
{
|
||
static char buf[64];
|
||
int len = 0;
|
||
int i;
|
||
|
||
len += sprintf (&buf[len], "%s\t", format->mnemonic);
|
||
for (i = 1; i <= format->arg[0]; i++)
|
||
{
|
||
int arg = format->arg[i];
|
||
char *exp;
|
||
if (i > 1 && arg != A_P && format->arg[i-1] != A_P)
|
||
buf[len++] = ',';
|
||
if (arg == A_P)
|
||
exp = "(";
|
||
else if (arg < A_P)
|
||
exp = i == syntax_error_arg ? "REG" : "reg";
|
||
else
|
||
exp = i == syntax_error_arg ? "IMM" : "imm";
|
||
len += sprintf (&buf[len], "%s", exp);
|
||
if (i > 1 && format->arg[i-1] == A_P)
|
||
buf[len++] = ')';
|
||
}
|
||
buf[len] = 0;
|
||
return buf;
|
||
}
|
||
|
||
void
|
||
md_assemble (char *op)
|
||
{
|
||
char *param, *thisfrag;
|
||
char c;
|
||
struct spu_opcode *format;
|
||
struct spu_insn insn;
|
||
int i;
|
||
|
||
assert (op);
|
||
|
||
/* skip over instruction to find parameters */
|
||
|
||
for (param = op; *param != 0 && !ISSPACE (*param); param++)
|
||
;
|
||
c = *param;
|
||
*param = 0;
|
||
|
||
if (c != 0 && c != '\n')
|
||
param++;
|
||
|
||
/* try to find the instruction in the hash table */
|
||
|
||
if ((format = (struct spu_opcode *) hash_find (op_hash, op)) == NULL)
|
||
{
|
||
as_bad (_("Invalid mnemonic '%s'"), op);
|
||
return;
|
||
}
|
||
|
||
if (!use_dd2 && strcmp (format->mnemonic, "orx") == 0)
|
||
{
|
||
as_bad (_("'%s' is only available in DD2.0 or higher."), op);
|
||
return;
|
||
}
|
||
|
||
while (1)
|
||
{
|
||
/* try parsing this instruction into insn */
|
||
for (i = 0; i < MAX_RELOCS; i++)
|
||
{
|
||
insn.exp[i].X_add_symbol = 0;
|
||
insn.exp[i].X_op_symbol = 0;
|
||
insn.exp[i].X_add_number = 0;
|
||
insn.exp[i].X_op = O_illegal;
|
||
insn.reloc_arg[i] = -1;
|
||
insn.reloc[i] = BFD_RELOC_NONE;
|
||
}
|
||
insn.opcode = format->opcode;
|
||
insn.tag = (enum spu_insns) (format - spu_opcodes);
|
||
|
||
syntax_error_arg = 0;
|
||
syntax_error_param = 0;
|
||
syntax_reg = 0;
|
||
if (calcop (format, param, &insn))
|
||
break;
|
||
|
||
/* if it doesn't parse try the next instruction */
|
||
if (!strcmp (format[0].mnemonic, format[1].mnemonic))
|
||
format++;
|
||
else
|
||
{
|
||
int parg = format[0].arg[syntax_error_arg-1];
|
||
|
||
as_fatal (_("Error in argument %d. Expecting: \"%s\""),
|
||
syntax_error_arg - (parg == A_P),
|
||
insn_fmt_string (format));
|
||
return;
|
||
}
|
||
}
|
||
|
||
if ((syntax_reg & 4)
|
||
&& ! (insn.tag == M_RDCH
|
||
|| insn.tag == M_RCHCNT
|
||
|| insn.tag == M_WRCH))
|
||
as_warn (_("Mixing register syntax, with and without '$'."));
|
||
if (syntax_error_param)
|
||
{
|
||
const char *d = syntax_error_param;
|
||
while (*d != '$')
|
||
d--;
|
||
as_warn (_("Treating '%-*s' as a symbol."), (int)(syntax_error_param - d), d);
|
||
}
|
||
|
||
if (brinfo != 0
|
||
&& (insn.tag <= M_BRASL
|
||
|| (insn.tag >= M_BRZ && insn.tag <= M_BRHNZ))
|
||
&& (insn.opcode & 0x7ff80) == 0
|
||
&& (insn.reloc_arg[0] == A_R18
|
||
|| insn.reloc_arg[0] == A_S18
|
||
|| insn.reloc_arg[1] == A_R18
|
||
|| insn.reloc_arg[1] == A_S18))
|
||
insn.opcode |= brinfo << 7;
|
||
|
||
/* grow the current frag and plop in the opcode */
|
||
|
||
thisfrag = frag_more (4);
|
||
md_number_to_chars (thisfrag, insn.opcode, 4);
|
||
|
||
/* if this instruction requires labels mark it for later */
|
||
|
||
for (i = 0; i < MAX_RELOCS; i++)
|
||
if (insn.reloc_arg[i] >= 0)
|
||
{
|
||
fixS *fixP;
|
||
bfd_reloc_code_real_type reloc = insn.reloc[i];
|
||
int pcrel = 0;
|
||
|
||
if (reloc == BFD_RELOC_SPU_PCREL9a
|
||
|| reloc == BFD_RELOC_SPU_PCREL9b
|
||
|| reloc == BFD_RELOC_SPU_PCREL16)
|
||
pcrel = 1;
|
||
fixP = fix_new_exp (frag_now,
|
||
thisfrag - frag_now->fr_literal,
|
||
4,
|
||
&insn.exp[i],
|
||
pcrel,
|
||
reloc);
|
||
fixP->tc_fix_data.arg_format = insn.reloc_arg[i];
|
||
fixP->tc_fix_data.insn_tag = insn.tag;
|
||
}
|
||
dwarf2_emit_insn (4);
|
||
|
||
/* .brinfo lasts exactly one instruction. */
|
||
brinfo = 0;
|
||
}
|
||
|
||
static int
|
||
calcop (struct spu_opcode *format, const char *param, struct spu_insn *insn)
|
||
{
|
||
int i;
|
||
int paren = 0;
|
||
int arg;
|
||
|
||
for (i = 1; i <= format->arg[0]; i++)
|
||
{
|
||
arg = format->arg[i];
|
||
syntax_error_arg = i;
|
||
|
||
while (ISSPACE (*param))
|
||
param++;
|
||
if (*param == 0 || *param == ',')
|
||
return 0;
|
||
if (arg < A_P)
|
||
param = get_reg (param, insn, arg, 1);
|
||
else if (arg > A_P)
|
||
param = get_imm (param, insn, arg);
|
||
else if (arg == A_P)
|
||
{
|
||
paren++;
|
||
if ('(' != *param++)
|
||
return 0;
|
||
}
|
||
|
||
if (!param)
|
||
return 0;
|
||
|
||
while (ISSPACE (*param))
|
||
param++;
|
||
|
||
if (arg != A_P && paren)
|
||
{
|
||
paren--;
|
||
if (')' != *param++)
|
||
return 0;
|
||
}
|
||
else if (i < format->arg[0]
|
||
&& format->arg[i] != A_P
|
||
&& format->arg[i+1] != A_P)
|
||
{
|
||
if (',' != *param++)
|
||
{
|
||
syntax_error_arg++;
|
||
return 0;
|
||
}
|
||
}
|
||
}
|
||
while (ISSPACE (*param))
|
||
param++;
|
||
return !paren && (*param == 0 || *param == '\n');
|
||
}
|
||
|
||
struct reg_name {
|
||
unsigned int regno;
|
||
unsigned int length;
|
||
char name[32];
|
||
};
|
||
|
||
#define REG_NAME(NO,NM) { NO, sizeof (NM) - 1, NM }
|
||
|
||
static struct reg_name reg_name[] = {
|
||
REG_NAME (0, "lr"), /* link register */
|
||
REG_NAME (1, "sp"), /* stack pointer */
|
||
REG_NAME (0, "rp"), /* link register */
|
||
REG_NAME (127, "fp"), /* frame pointer */
|
||
};
|
||
|
||
static struct reg_name sp_reg_name[] = {
|
||
};
|
||
|
||
static struct reg_name ch_reg_name[] = {
|
||
REG_NAME ( 0, "SPU_RdEventStat"),
|
||
REG_NAME ( 1, "SPU_WrEventMask"),
|
||
REG_NAME ( 2, "SPU_WrEventAck"),
|
||
REG_NAME ( 3, "SPU_RdSigNotify1"),
|
||
REG_NAME ( 4, "SPU_RdSigNotify2"),
|
||
REG_NAME ( 7, "SPU_WrDec"),
|
||
REG_NAME ( 8, "SPU_RdDec"),
|
||
REG_NAME ( 11, "SPU_RdEventMask"), /* DD2.0 only */
|
||
REG_NAME ( 13, "SPU_RdMachStat"),
|
||
REG_NAME ( 14, "SPU_WrSRR0"),
|
||
REG_NAME ( 15, "SPU_RdSRR0"),
|
||
REG_NAME ( 28, "SPU_WrOutMbox"),
|
||
REG_NAME ( 29, "SPU_RdInMbox"),
|
||
REG_NAME ( 30, "SPU_WrOutIntrMbox"),
|
||
REG_NAME ( 9, "MFC_WrMSSyncReq"),
|
||
REG_NAME ( 12, "MFC_RdTagMask"), /* DD2.0 only */
|
||
REG_NAME ( 16, "MFC_LSA"),
|
||
REG_NAME ( 17, "MFC_EAH"),
|
||
REG_NAME ( 18, "MFC_EAL"),
|
||
REG_NAME ( 19, "MFC_Size"),
|
||
REG_NAME ( 20, "MFC_TagID"),
|
||
REG_NAME ( 21, "MFC_Cmd"),
|
||
REG_NAME ( 22, "MFC_WrTagMask"),
|
||
REG_NAME ( 23, "MFC_WrTagUpdate"),
|
||
REG_NAME ( 24, "MFC_RdTagStat"),
|
||
REG_NAME ( 25, "MFC_RdListStallStat"),
|
||
REG_NAME ( 26, "MFC_WrListStallAck"),
|
||
REG_NAME ( 27, "MFC_RdAtomicStat"),
|
||
};
|
||
#undef REG_NAME
|
||
|
||
static const char *
|
||
get_reg (const char *param, struct spu_insn *insn, int arg, int accept_expr)
|
||
{
|
||
unsigned regno;
|
||
int saw_prefix = 0;
|
||
|
||
if (*param == '$')
|
||
{
|
||
saw_prefix = 1;
|
||
param++;
|
||
}
|
||
|
||
if (arg == A_H) /* Channel */
|
||
{
|
||
if ((param[0] == 'c' || param[0] == 'C')
|
||
&& (param[1] == 'h' || param[1] == 'H')
|
||
&& ISDIGIT (param[2]))
|
||
param += 2;
|
||
}
|
||
else if (arg == A_S) /* Special purpose register */
|
||
{
|
||
if ((param[0] == 's' || param[0] == 'S')
|
||
&& (param[1] == 'p' || param[1] == 'P')
|
||
&& ISDIGIT (param[2]))
|
||
param += 2;
|
||
}
|
||
|
||
if (ISDIGIT (*param))
|
||
{
|
||
regno = 0;
|
||
while (ISDIGIT (*param))
|
||
regno = regno * 10 + *param++ - '0';
|
||
}
|
||
else
|
||
{
|
||
struct reg_name *rn;
|
||
unsigned int i, n, l = 0;
|
||
|
||
if (arg == A_H) /* Channel */
|
||
{
|
||
rn = ch_reg_name;
|
||
n = sizeof (ch_reg_name) / sizeof (*ch_reg_name);
|
||
}
|
||
else if (arg == A_S) /* Special purpose register */
|
||
{
|
||
rn = sp_reg_name;
|
||
n = sizeof (sp_reg_name) / sizeof (*sp_reg_name);
|
||
}
|
||
else
|
||
{
|
||
rn = reg_name;
|
||
n = sizeof (reg_name) / sizeof (*reg_name);
|
||
}
|
||
regno = 128;
|
||
for (i = 0; i < n; i++)
|
||
if (rn[i].length > l
|
||
&& 0 == strncasecmp (param, rn[i].name, rn[i].length))
|
||
{
|
||
l = rn[i].length;
|
||
regno = rn[i].regno;
|
||
}
|
||
param += l;
|
||
}
|
||
|
||
if (!use_dd2
|
||
&& arg == A_H)
|
||
{
|
||
if (regno == 11)
|
||
as_bad (_("'SPU_RdEventMask' (channel 11) is only available in DD2.0 or higher."));
|
||
else if (regno == 12)
|
||
as_bad (_("'MFC_RdTagMask' (channel 12) is only available in DD2.0 or higher."));
|
||
}
|
||
|
||
if (regno < 128)
|
||
{
|
||
insn->opcode |= regno << arg_encode[arg].pos;
|
||
if ((!saw_prefix && syntax_reg == 1)
|
||
|| (saw_prefix && syntax_reg == 2))
|
||
syntax_reg |= 4;
|
||
syntax_reg |= saw_prefix ? 1 : 2;
|
||
return param;
|
||
}
|
||
|
||
if (accept_expr)
|
||
{
|
||
char *save_ptr;
|
||
expressionS ex;
|
||
save_ptr = input_line_pointer;
|
||
input_line_pointer = (char *)param;
|
||
expression (&ex);
|
||
param = input_line_pointer;
|
||
input_line_pointer = save_ptr;
|
||
if (ex.X_op == O_register || ex.X_op == O_constant)
|
||
{
|
||
insn->opcode |= ex.X_add_number << arg_encode[arg].pos;
|
||
return param;
|
||
}
|
||
}
|
||
return 0;
|
||
}
|
||
|
||
static const char *
|
||
get_imm (const char *param, struct spu_insn *insn, int arg)
|
||
{
|
||
int val;
|
||
char *save_ptr;
|
||
int low = 0, high = 0;
|
||
int reloc_i = insn->reloc_arg[0] >= 0 ? 1 : 0;
|
||
|
||
if (strncasecmp (param, "%lo(", 4) == 0)
|
||
{
|
||
param += 3;
|
||
low = 1;
|
||
as_warn (_("Using old style, %%lo(expr), please change to PPC style, expr@l."));
|
||
}
|
||
else if (strncasecmp (param, "%hi(", 4) == 0)
|
||
{
|
||
param += 3;
|
||
high = 1;
|
||
as_warn (_("Using old style, %%hi(expr), please change to PPC style, expr@h."));
|
||
}
|
||
else if (strncasecmp (param, "%pic(", 5) == 0)
|
||
{
|
||
/* Currently we expect %pic(expr) == expr, so do nothing here.
|
||
i.e. for code loaded at address 0 $toc will be 0. */
|
||
param += 4;
|
||
}
|
||
|
||
if (*param == '$')
|
||
{
|
||
/* Symbols can start with $, but if this symbol matches a register
|
||
name, it's probably a mistake. The only way to avoid this
|
||
warning is to rename the symbol. */
|
||
struct spu_insn tmp_insn;
|
||
const char *np = get_reg (param, &tmp_insn, arg, 0);
|
||
|
||
if (np)
|
||
syntax_error_param = np;
|
||
}
|
||
|
||
save_ptr = input_line_pointer;
|
||
input_line_pointer = (char *) param;
|
||
expression (&insn->exp[reloc_i]);
|
||
param = input_line_pointer;
|
||
input_line_pointer = save_ptr;
|
||
|
||
/* Similar to ppc_elf_suffix in tc-ppc.c. We have so few cases to
|
||
handle we do it inlined here. */
|
||
if (param[0] == '@' && !ISALNUM (param[2]) && param[2] != '@')
|
||
{
|
||
if (param[1] == 'h' || param[1] == 'H')
|
||
{
|
||
high = 1;
|
||
param += 2;
|
||
}
|
||
else if (param[1] == 'l' || param[1] == 'L')
|
||
{
|
||
low = 1;
|
||
param += 2;
|
||
}
|
||
}
|
||
|
||
if (insn->exp[reloc_i].X_op == O_constant)
|
||
{
|
||
val = insn->exp[reloc_i].X_add_number;
|
||
|
||
if (emulate_apuasm)
|
||
{
|
||
/* Convert the value to a format we expect. */
|
||
val <<= arg_encode[arg].rshift;
|
||
if (arg == A_U7A)
|
||
val = 173 - val;
|
||
else if (arg == A_U7B)
|
||
val = 155 - val;
|
||
}
|
||
|
||
if (high)
|
||
val = val >> 16;
|
||
else if (low)
|
||
val = val & 0xffff;
|
||
|
||
/* Warn about out of range expressions. */
|
||
{
|
||
int hi = arg_encode[arg].hi;
|
||
int lo = arg_encode[arg].lo;
|
||
int whi = arg_encode[arg].whi;
|
||
int wlo = arg_encode[arg].wlo;
|
||
|
||
if (hi > lo && (val < lo || val > hi))
|
||
as_fatal (_("Constant expression %d out of range, [%d, %d]."),
|
||
val, lo, hi);
|
||
else if (whi > wlo && (val < wlo || val > whi))
|
||
as_warn (_("Constant expression %d out of range, [%d, %d]."),
|
||
val, wlo, whi);
|
||
}
|
||
|
||
if (arg == A_U7A)
|
||
val = 173 - val;
|
||
else if (arg == A_U7B)
|
||
val = 155 - val;
|
||
|
||
/* Branch hints have a split encoding. Do the bottom part. */
|
||
if (arg == A_S11 || arg == A_S11I)
|
||
insn->opcode |= ((val >> 2) & 0x7f);
|
||
|
||
insn->opcode |= (((val >> arg_encode[arg].rshift)
|
||
& ((1 << arg_encode[arg].size) - 1))
|
||
<< arg_encode[arg].pos);
|
||
}
|
||
else
|
||
{
|
||
insn->reloc_arg[reloc_i] = arg;
|
||
if (high)
|
||
insn->reloc[reloc_i] = BFD_RELOC_SPU_HI16;
|
||
else if (low)
|
||
insn->reloc[reloc_i] = BFD_RELOC_SPU_LO16;
|
||
else
|
||
insn->reloc[reloc_i] = arg_encode[arg].reloc;
|
||
}
|
||
|
||
return param;
|
||
}
|
||
|
||
char *
|
||
md_atof (int type, char *litP, int *sizeP)
|
||
{
|
||
return ieee_md_atof (type, litP, sizeP, TRUE);
|
||
}
|
||
|
||
#ifndef WORKING_DOT_WORD
|
||
int md_short_jump_size = 4;
|
||
|
||
void
|
||
md_create_short_jump (char *ptr,
|
||
addressT from_addr ATTRIBUTE_UNUSED,
|
||
addressT to_addr ATTRIBUTE_UNUSED,
|
||
fragS *frag,
|
||
symbolS *to_symbol)
|
||
{
|
||
ptr[0] = (char) 0xc0;
|
||
ptr[1] = 0x00;
|
||
ptr[2] = 0x00;
|
||
ptr[3] = 0x00;
|
||
fix_new (frag,
|
||
ptr - frag->fr_literal,
|
||
4,
|
||
to_symbol,
|
||
(offsetT) 0,
|
||
0,
|
||
BFD_RELOC_SPU_PCREL16);
|
||
}
|
||
|
||
int md_long_jump_size = 4;
|
||
|
||
void
|
||
md_create_long_jump (char *ptr,
|
||
addressT from_addr ATTRIBUTE_UNUSED,
|
||
addressT to_addr ATTRIBUTE_UNUSED,
|
||
fragS *frag,
|
||
symbolS *to_symbol)
|
||
{
|
||
ptr[0] = (char) 0xc0;
|
||
ptr[1] = 0x00;
|
||
ptr[2] = 0x00;
|
||
ptr[3] = 0x00;
|
||
fix_new (frag,
|
||
ptr - frag->fr_literal,
|
||
4,
|
||
to_symbol,
|
||
(offsetT) 0,
|
||
0,
|
||
BFD_RELOC_SPU_PCREL16);
|
||
}
|
||
#endif
|
||
|
||
/* Handle .brinfo <priority>,<lrlive>. */
|
||
static void
|
||
spu_brinfo (int ignore ATTRIBUTE_UNUSED)
|
||
{
|
||
addressT priority;
|
||
addressT lrlive;
|
||
|
||
priority = get_absolute_expression ();
|
||
SKIP_WHITESPACE ();
|
||
|
||
lrlive = 0;
|
||
if (*input_line_pointer == ',')
|
||
{
|
||
++input_line_pointer;
|
||
lrlive = get_absolute_expression ();
|
||
}
|
||
|
||
if (priority > 0x1fff)
|
||
{
|
||
as_bad (_("invalid priority '%lu'"), (unsigned long) priority);
|
||
priority = 0;
|
||
}
|
||
|
||
if (lrlive > 7)
|
||
{
|
||
as_bad (_("invalid lrlive '%lu'"), (unsigned long) lrlive);
|
||
lrlive = 0;
|
||
}
|
||
|
||
brinfo = (lrlive << 13) | priority;
|
||
demand_empty_rest_of_line ();
|
||
}
|
||
|
||
/* Support @ppu on symbols referenced in .int/.long/.word/.quad. */
|
||
static void
|
||
spu_cons (int nbytes)
|
||
{
|
||
expressionS exp;
|
||
|
||
if (is_it_end_of_statement ())
|
||
{
|
||
demand_empty_rest_of_line ();
|
||
return;
|
||
}
|
||
|
||
do
|
||
{
|
||
deferred_expression (&exp);
|
||
if ((exp.X_op == O_symbol
|
||
|| exp.X_op == O_constant)
|
||
&& strncasecmp (input_line_pointer, "@ppu", 4) == 0)
|
||
{
|
||
char *p = frag_more (nbytes);
|
||
enum bfd_reloc_code_real reloc;
|
||
|
||
/* Check for identifier@suffix+constant. */
|
||
input_line_pointer += 4;
|
||
if (*input_line_pointer == '-' || *input_line_pointer == '+')
|
||
{
|
||
expressionS new_exp;
|
||
|
||
expression (&new_exp);
|
||
if (new_exp.X_op == O_constant)
|
||
exp.X_add_number += new_exp.X_add_number;
|
||
}
|
||
|
||
reloc = nbytes == 4 ? BFD_RELOC_SPU_PPU32 : BFD_RELOC_SPU_PPU64;
|
||
fix_new_exp (frag_now, p - frag_now->fr_literal, nbytes,
|
||
&exp, 0, reloc);
|
||
}
|
||
else
|
||
emit_expr (&exp, nbytes);
|
||
}
|
||
while (*input_line_pointer++ == ',');
|
||
|
||
/* Put terminator back into stream. */
|
||
input_line_pointer--;
|
||
demand_empty_rest_of_line ();
|
||
}
|
||
|
||
int
|
||
md_estimate_size_before_relax (fragS *fragP ATTRIBUTE_UNUSED,
|
||
segT segment_type ATTRIBUTE_UNUSED)
|
||
{
|
||
as_fatal (_("Relaxation should never occur"));
|
||
return -1;
|
||
}
|
||
|
||
/* If while processing a fixup, a reloc really needs to be created,
|
||
then it is done here. */
|
||
|
||
arelent *
|
||
tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
|
||
{
|
||
arelent *reloc;
|
||
reloc = (arelent *) xmalloc (sizeof (arelent));
|
||
reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
|
||
if (fixp->fx_addsy)
|
||
*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
|
||
else if (fixp->fx_subsy)
|
||
*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy);
|
||
else
|
||
abort ();
|
||
reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
|
||
reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
|
||
if (reloc->howto == (reloc_howto_type *) NULL)
|
||
{
|
||
as_bad_where (fixp->fx_file, fixp->fx_line,
|
||
_("reloc %d not supported by object file format"),
|
||
(int) fixp->fx_r_type);
|
||
return NULL;
|
||
}
|
||
reloc->addend = fixp->fx_addnumber;
|
||
return reloc;
|
||
}
|
||
|
||
/* Round up a section's size to the appropriate boundary. */
|
||
|
||
valueT
|
||
md_section_align (segT seg, valueT size)
|
||
{
|
||
int align = bfd_get_section_alignment (stdoutput, seg);
|
||
valueT mask = ((valueT) 1 << align) - 1;
|
||
|
||
return (size + mask) & ~mask;
|
||
}
|
||
|
||
/* Where a PC relative offset is calculated from. On the spu they
|
||
are calculated from the beginning of the branch instruction. */
|
||
|
||
long
|
||
md_pcrel_from (fixS *fixp)
|
||
{
|
||
return fixp->fx_frag->fr_address + fixp->fx_where;
|
||
}
|
||
|
||
/* Fill in rs_align_code fragments. */
|
||
|
||
void
|
||
spu_handle_align (fragS *fragp)
|
||
{
|
||
static const unsigned char nop_pattern[8] = {
|
||
0x40, 0x20, 0x00, 0x00, /* even nop */
|
||
0x00, 0x20, 0x00, 0x00, /* odd nop */
|
||
};
|
||
|
||
int bytes;
|
||
char *p;
|
||
|
||
if (fragp->fr_type != rs_align_code)
|
||
return;
|
||
|
||
bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
|
||
p = fragp->fr_literal + fragp->fr_fix;
|
||
|
||
if (bytes & 3)
|
||
{
|
||
int fix = bytes & 3;
|
||
memset (p, 0, fix);
|
||
p += fix;
|
||
bytes -= fix;
|
||
fragp->fr_fix += fix;
|
||
}
|
||
if (bytes & 4)
|
||
{
|
||
memcpy (p, &nop_pattern[4], 4);
|
||
p += 4;
|
||
bytes -= 4;
|
||
fragp->fr_fix += 4;
|
||
}
|
||
|
||
memcpy (p, nop_pattern, 8);
|
||
fragp->fr_var = 8;
|
||
}
|
||
|
||
void
|
||
md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
|
||
{
|
||
unsigned int res;
|
||
unsigned int mask;
|
||
valueT val = *valP;
|
||
char *place = fixP->fx_where + fixP->fx_frag->fr_literal;
|
||
|
||
if (fixP->fx_subsy != (symbolS *) NULL)
|
||
{
|
||
/* We can't actually support subtracting a symbol. */
|
||
as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
|
||
}
|
||
|
||
if (fixP->fx_addsy != NULL)
|
||
{
|
||
if (fixP->fx_pcrel)
|
||
{
|
||
/* Hack around bfd_install_relocation brain damage. */
|
||
val += fixP->fx_frag->fr_address + fixP->fx_where;
|
||
|
||
switch (fixP->fx_r_type)
|
||
{
|
||
case BFD_RELOC_32:
|
||
fixP->fx_r_type = BFD_RELOC_32_PCREL;
|
||
break;
|
||
|
||
case BFD_RELOC_SPU_PCREL16:
|
||
case BFD_RELOC_SPU_PCREL9a:
|
||
case BFD_RELOC_SPU_PCREL9b:
|
||
case BFD_RELOC_32_PCREL:
|
||
break;
|
||
|
||
default:
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("expression too complex"));
|
||
break;
|
||
}
|
||
}
|
||
}
|
||
|
||
fixP->fx_addnumber = val;
|
||
|
||
if (fixP->fx_r_type == BFD_RELOC_SPU_PPU32
|
||
|| fixP->fx_r_type == BFD_RELOC_SPU_PPU64)
|
||
return;
|
||
|
||
if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
|
||
{
|
||
fixP->fx_done = 1;
|
||
res = 0;
|
||
mask = 0;
|
||
if (fixP->tc_fix_data.arg_format > A_P)
|
||
{
|
||
int hi = arg_encode[fixP->tc_fix_data.arg_format].hi;
|
||
int lo = arg_encode[fixP->tc_fix_data.arg_format].lo;
|
||
if (hi > lo && ((offsetT) val < lo || (offsetT) val > hi))
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
"Relocation doesn't fit. (relocation value = 0x%lx)",
|
||
(long) val);
|
||
}
|
||
|
||
switch (fixP->fx_r_type)
|
||
{
|
||
case BFD_RELOC_8:
|
||
md_number_to_chars (place, val, 1);
|
||
return;
|
||
|
||
case BFD_RELOC_16:
|
||
md_number_to_chars (place, val, 2);
|
||
return;
|
||
|
||
case BFD_RELOC_32:
|
||
case BFD_RELOC_32_PCREL:
|
||
md_number_to_chars (place, val, 4);
|
||
return;
|
||
|
||
case BFD_RELOC_64:
|
||
md_number_to_chars (place, val, 8);
|
||
return;
|
||
|
||
case BFD_RELOC_SPU_IMM7:
|
||
res = val << 14;
|
||
mask = 0x7f << 14;
|
||
break;
|
||
|
||
case BFD_RELOC_SPU_IMM8:
|
||
res = val << 14;
|
||
mask = 0xff << 14;
|
||
break;
|
||
|
||
case BFD_RELOC_SPU_IMM10:
|
||
res = val << 14;
|
||
mask = 0x3ff << 14;
|
||
break;
|
||
|
||
case BFD_RELOC_SPU_IMM10W:
|
||
res = val << 10;
|
||
mask = 0x3ff0 << 10;
|
||
break;
|
||
|
||
case BFD_RELOC_SPU_IMM16:
|
||
res = val << 7;
|
||
mask = 0xffff << 7;
|
||
break;
|
||
|
||
case BFD_RELOC_SPU_IMM16W:
|
||
res = val << 5;
|
||
mask = 0x3fffc << 5;
|
||
break;
|
||
|
||
case BFD_RELOC_SPU_IMM18:
|
||
res = val << 7;
|
||
mask = 0x3ffff << 7;
|
||
break;
|
||
|
||
case BFD_RELOC_SPU_PCREL9a:
|
||
res = ((val & 0x1fc) >> 2) | ((val & 0x600) << 14);
|
||
mask = (0x1fc >> 2) | (0x600 << 14);
|
||
break;
|
||
|
||
case BFD_RELOC_SPU_PCREL9b:
|
||
res = ((val & 0x1fc) >> 2) | ((val & 0x600) << 5);
|
||
mask = (0x1fc >> 2) | (0x600 << 5);
|
||
break;
|
||
|
||
case BFD_RELOC_SPU_PCREL16:
|
||
res = val << 5;
|
||
mask = 0x3fffc << 5;
|
||
break;
|
||
|
||
case BFD_RELOC_SPU_HI16:
|
||
res = val >> 9;
|
||
mask = 0xffff << 7;
|
||
break;
|
||
|
||
case BFD_RELOC_SPU_LO16:
|
||
res = val << 7;
|
||
mask = 0xffff << 7;
|
||
break;
|
||
|
||
default:
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("reloc %d not supported by object file format"),
|
||
(int) fixP->fx_r_type);
|
||
}
|
||
|
||
res &= mask;
|
||
place[0] = (place[0] & (~mask >> 24)) | ((res >> 24) & 0xff);
|
||
place[1] = (place[1] & (~mask >> 16)) | ((res >> 16) & 0xff);
|
||
place[2] = (place[2] & (~mask >> 8)) | ((res >> 8) & 0xff);
|
||
place[3] = (place[3] & ~mask) | (res & 0xff);
|
||
}
|
||
}
|