e80ae1906b
gas/ PR gas/23219 * config/tc-riscv.c (riscv_frag_align_code): Move frag_more call after !riscv_opts.relax check. (riscv_handle_align): Rewrite !riscv_opts.relax support. * config/tc-riscv (MAX_MEM_FOR_RS_ALIGN_CODE): Update. * testsuite/gas/riscv/no-relax-align.d: New * testsuite/gas/riscv/no-relax-align.s: New * testsuite/gas/riscv/no-relax-align-2.d: New * testsuite/gas/riscv/no-relax-align-2.s: New
124 lines
4.0 KiB
C
124 lines
4.0 KiB
C
/* tc-riscv.h -- header file for tc-riscv.c.
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Copyright (C) 2011-2018 Free Software Foundation, Inc.
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Contributed by Andrew Waterman (andrew@sifive.com).
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Based on MIPS target.
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This file is part of GAS.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING3. If not,
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see <http://www.gnu.org/licenses/>. */
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#ifndef TC_RISCV
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#define TC_RISCV
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#include "opcode/riscv.h"
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struct frag;
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struct expressionS;
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#define TARGET_BYTES_BIG_ENDIAN 0
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#define TARGET_ARCH bfd_arch_riscv
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#define WORKING_DOT_WORD 1
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#define LOCAL_LABELS_FB 1
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/* Symbols named FAKE_LABEL_NAME are emitted when generating DWARF, so make
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sure FAKE_LABEL_NAME is printable. It still must be distinct from any
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real label name. So, append a space, which other labels can't contain. */
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#define FAKE_LABEL_NAME ".L0 "
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/* Changing the special character in FAKE_LABEL_NAME requires changing
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FAKE_LABEL_CHAR too. */
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#define FAKE_LABEL_CHAR ' '
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#define md_relax_frag(segment, fragp, stretch) \
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riscv_relax_frag (segment, fragp, stretch)
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extern int riscv_relax_frag (asection *, struct frag *, long);
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#define md_section_align(seg,size) (size)
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#define md_undefined_symbol(name) (0)
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#define md_operand(x)
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extern bfd_boolean riscv_frag_align_code (int);
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#define md_do_align(N, FILL, LEN, MAX, LABEL) \
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if ((N) != 0 && !(FILL) && !need_pass_2 && subseg_text_p (now_seg)) \
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{ \
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if (riscv_frag_align_code (N)) \
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goto LABEL; \
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}
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extern void riscv_handle_align (fragS *);
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#define HANDLE_ALIGN riscv_handle_align
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#define MAX_MEM_FOR_RS_ALIGN_CODE (3 + 4)
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/* The ISA of the target may change based on command-line arguments. */
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#define TARGET_FORMAT riscv_target_format()
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extern const char * riscv_target_format (void);
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#define md_after_parse_args() riscv_after_parse_args()
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extern void riscv_after_parse_args (void);
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#define md_parse_long_option(arg) riscv_parse_long_option (arg)
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extern int riscv_parse_long_option (const char *);
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#define md_pre_output_hook riscv_pre_output_hook()
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extern void riscv_pre_output_hook (void);
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/* Let the linker resolve all the relocs due to relaxation. */
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#define tc_fix_adjustable(fixp) 0
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#define md_allow_local_subtract(l,r,s) 0
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/* Values passed to md_apply_fix don't include symbol values. */
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#define MD_APPLY_SYM_VALUE(FIX) 0
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/* Global syms must not be resolved, to support ELF shared libraries. */
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#define EXTERN_FORCE_RELOC \
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(OUTPUT_FLAVOR == bfd_target_elf_flavour)
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/* Postpone text-section label subtraction calculation until linking, since
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linker relaxations might change the deltas. */
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#define TC_FORCE_RELOCATION_SUB_SAME(FIX, SEG) \
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(GENERIC_FORCE_RELOCATION_SUB_SAME (FIX, SEG) \
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|| ((SEG)->flags & SEC_CODE) != 0)
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#define TC_FORCE_RELOCATION_SUB_LOCAL(FIX, SEG) 1
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#define TC_VALIDATE_FIX_SUB(FIX, SEG) 1
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#define TC_FORCE_RELOCATION_LOCAL(FIX) 1
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#define DIFF_EXPR_OK 1
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extern void riscv_pop_insert (void);
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#define md_pop_insert() riscv_pop_insert ()
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#define TARGET_USE_CFIPOP 1
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#define tc_cfi_frame_initial_instructions riscv_cfi_frame_initial_instructions
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extern void riscv_cfi_frame_initial_instructions (void);
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#define tc_regname_to_dw2regnum tc_riscv_regname_to_dw2regnum
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extern int tc_riscv_regname_to_dw2regnum (char *);
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#define DWARF2_DEFAULT_RETURN_COLUMN X_RA
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/* Even on RV64, use 4-byte alignment, as F registers may be only 32 bits. */
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#define DWARF2_CIE_DATA_ALIGNMENT -4
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#define elf_tc_final_processing riscv_elf_final_processing
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extern void riscv_elf_final_processing (void);
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/* Adjust debug_line after relaxation. */
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#define DWARF2_USE_FIXED_ADVANCE_PC 1
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#endif /* TC_RISCV */
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