d2159fdc0f
The instruction encoding for the MIPS r6 sigrie instruction seems to be
incorrect. It's currently 0x4170xxxx (which overlaps with ei, di, evp,
and dvp), but should be 0x0417xxxx. See ISA reference[1][2].
References:
[1] "MIPS Architecture for Programmers Volume II-A: The MIPS32
Instruction Set Manual", Imagination Technologies, Inc., Document
Number: MD00086, Revision 6.06, December 15, 2016, Table A.4 "MIPS32
REGIMM Encoding of rt Field", p. 452
[2] "MIPS Architecture For Programmers Volume II-A: The MIPS64
Instruction Set Reference Manual", Imagination Technologies, Inc.,
Document Number: MD00087, Revision 6.06, December 15, 2016, Table
A.4 "MIPS64 REGIMM Encoding of rt Field", p. 581
opcodes/
* mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
gas/
* testsuite/gas/mips/r6.d: Update for "sigrie" encoding fix.
* testsuite/gas/mips/r6-n32.d: Likewise.
* testsuite/gas/mips/r6-n64.d: Likewise.
145 lines
4.1 KiB
Plaintext
145 lines
4.1 KiB
Plaintext
2018-02-12 Henry Wong <henry@stuffedcow.net>
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* mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
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2018-02-05 Nick Clifton <nickc@redhat.com>
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* po/pt_BR.po: Updated Brazilian Portuguese translation.
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2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
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* i386-dis.c (enum): Add pconfig.
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* i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
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(cpu_flags): Add CpuPCONFIG.
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* i386-opc.h (enum): Add CpuPCONFIG.
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(i386_cpu_flags): Add cpupconfig.
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* i386-opc.tbl: Add PCONFIG instruction.
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* i386-init.h: Regenerate.
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* i386-tbl.h: Likewise.
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2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
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* i386-dis.c (enum): Add PREFIX_0F09.
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* i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
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(cpu_flags): Add CpuWBNOINVD.
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* i386-opc.h (enum): Add CpuWBNOINVD.
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(i386_cpu_flags): Add cpuwbnoinvd.
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* i386-opc.tbl: Add WBNOINVD instruction.
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* i386-init.h: Regenerate.
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* i386-tbl.h: Likewise.
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2018-01-17 Jim Wilson <jimw@sifive.com>
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* riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
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2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
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* i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
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Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
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CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
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(cpu_flags): Add CpuIBT, CpuSHSTK.
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* i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
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(i386_cpu_flags): Add cpuibt, cpushstk.
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* i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
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* i386-init.h: Regenerate.
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* i386-tbl.h: Likewise.
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2018-01-16 Nick Clifton <nickc@redhat.com>
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* po/pt_BR.po: Updated Brazilian Portugese translation.
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* po/de.po: Updated German translation.
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2018-01-15 Jim Wilson <jimw@sifive.com>
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* riscv-opc.c (match_c_nop): New.
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(riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
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2018-01-15 Nick Clifton <nickc@redhat.com>
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* po/uk.po: Updated Ukranian translation.
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2018-01-13 Nick Clifton <nickc@redhat.com>
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* po/opcodes.pot: Regenerated.
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2018-01-13 Nick Clifton <nickc@redhat.com>
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* configure: Regenerate.
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2018-01-13 Nick Clifton <nickc@redhat.com>
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2.30 branch created.
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2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
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* i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
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* i386-tbl.h: Regenerate.
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2018-01-10 Jan Beulich <jbeulich@suse.com>
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* i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
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* i386-tbl.h: Re-generate.
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2018-01-10 Jan Beulich <jbeulich@suse.com>
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* i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
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vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
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vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
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vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
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vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
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Disp8MemShift of AVX512VL forms.
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* i386-tbl.h: Re-generate.
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2018-01-09 Jim Wilson <jimw@sifive.com>
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* riscv-dis.c (maybe_print_address): If base_reg is zero,
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then the hi_addr value is zero.
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2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
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* arm-dis.c (arm_opcodes): Add csdb.
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(thumb32_opcodes): Add csdb.
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2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
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* aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
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* aarch64-asm-2.c: Regenerate.
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* aarch64-dis-2.c: Regenerate.
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* aarch64-opc-2.c: Regenerate.
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2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/22681
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* i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
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Remove AVX512 vmovd with 64-bit operands.
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* i386-tbl.h: Regenerated.
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2018-01-05 Jim Wilson <jimw@sifive.com>
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* riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
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jalr.
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2018-01-03 Alan Modra <amodra@gmail.com>
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Update year range in copyright notice of all files.
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2018-01-02 Jan Beulich <jbeulich@suse.com>
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* i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
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and OPERAND_TYPE_REGZMM entries.
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For older changes see ChangeLog-2017
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Copyright (C) 2018 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved.
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