feacfcacaa
For the same reasons outlined in the previous patch, this patch renames gdbserver source files to .cc. I have moved the "-x c++" switch to only those rules that require it. gdbserver/ChangeLog: * Makefile.in: Rename source files from .c to .cc. * %.c: Rename to %.cc. * configure.ac: Rename server.c to server.cc. * configure: Re-generate.
186 lines
5.8 KiB
C++
186 lines
5.8 KiB
C++
/* Copyright (C) 2009-2020 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "server.h"
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#include "lynx-low.h"
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#include <limits.h>
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#include <sys/ptrace.h>
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/* The following two typedefs are defined in a .h file which is not
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in the standard include path (/sys/include/family/ppc/ucontext.h),
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so we just duplicate them here. */
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/* General register context */
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typedef struct usr_econtext_s
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{
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uint32_t uec_iregs[32];
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uint32_t uec_inum;
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uint32_t uec_srr0;
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uint32_t uec_srr1;
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uint32_t uec_lr;
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uint32_t uec_ctr;
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uint32_t uec_cr;
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uint32_t uec_xer;
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uint32_t uec_dar;
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uint32_t uec_mq;
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uint32_t uec_msr;
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uint32_t uec_sregs[16];
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uint32_t uec_ss_count;
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uint32_t uec_ss_addr1;
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uint32_t uec_ss_addr2;
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uint32_t uec_ss_code1;
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uint32_t uec_ss_code2;
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} usr_econtext_t;
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/* Floating point register context */
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typedef struct usr_fcontext_s
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{
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uint64_t ufc_freg[32];
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uint32_t ufc_fpscr[2];
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} usr_fcontext_t;
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/* Index of for various registers inside the regcache. */
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#define R0_REGNUM 0
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#define F0_REGNUM 32
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#define PC_REGNUM 64
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#define MSR_REGNUM 65
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#define CR_REGNUM 66
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#define LR_REGNUM 67
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#define CTR_REGNUM 68
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#define XER_REGNUM 69
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#define FPSCR_REGNUM 70
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/* Defined in auto-generated file powerpc-32.c. */
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extern void init_registers_powerpc_32 (void);
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extern const struct target_desc *tdesc_powerpc_32;
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/* The fill_function for the general-purpose register set. */
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static void
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lynx_ppc_fill_gregset (struct regcache *regcache, char *buf)
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{
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int i;
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/* r0 - r31 */
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for (i = 0; i < 32; i++)
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collect_register (regcache, R0_REGNUM + i,
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buf + offsetof (usr_econtext_t, uec_iregs[i]));
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/* The other registers provided in the GP register context. */
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collect_register (regcache, PC_REGNUM,
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buf + offsetof (usr_econtext_t, uec_srr0));
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collect_register (regcache, MSR_REGNUM,
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buf + offsetof (usr_econtext_t, uec_srr1));
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collect_register (regcache, CR_REGNUM,
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buf + offsetof (usr_econtext_t, uec_cr));
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collect_register (regcache, LR_REGNUM,
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buf + offsetof (usr_econtext_t, uec_lr));
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collect_register (regcache, CTR_REGNUM,
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buf + offsetof (usr_econtext_t, uec_ctr));
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collect_register (regcache, XER_REGNUM,
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buf + offsetof (usr_econtext_t, uec_xer));
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}
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/* The store_function for the general-purpose register set. */
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static void
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lynx_ppc_store_gregset (struct regcache *regcache, const char *buf)
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{
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int i;
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/* r0 - r31 */
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for (i = 0; i < 32; i++)
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supply_register (regcache, R0_REGNUM + i,
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buf + offsetof (usr_econtext_t, uec_iregs[i]));
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/* The other registers provided in the GP register context. */
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supply_register (regcache, PC_REGNUM,
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buf + offsetof (usr_econtext_t, uec_srr0));
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supply_register (regcache, MSR_REGNUM,
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buf + offsetof (usr_econtext_t, uec_srr1));
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supply_register (regcache, CR_REGNUM,
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buf + offsetof (usr_econtext_t, uec_cr));
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supply_register (regcache, LR_REGNUM,
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buf + offsetof (usr_econtext_t, uec_lr));
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supply_register (regcache, CTR_REGNUM,
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buf + offsetof (usr_econtext_t, uec_ctr));
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supply_register (regcache, XER_REGNUM,
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buf + offsetof (usr_econtext_t, uec_xer));
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}
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/* The fill_function for the floating-point register set. */
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static void
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lynx_ppc_fill_fpregset (struct regcache *regcache, char *buf)
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{
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int i;
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/* f0 - f31 */
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for (i = 0; i < 32; i++)
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collect_register (regcache, F0_REGNUM + i,
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buf + offsetof (usr_fcontext_t, ufc_freg[i]));
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/* fpscr */
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collect_register (regcache, FPSCR_REGNUM,
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buf + offsetof (usr_fcontext_t, ufc_fpscr));
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}
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/* The store_function for the floating-point register set. */
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static void
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lynx_ppc_store_fpregset (struct regcache *regcache, const char *buf)
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{
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int i;
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/* f0 - f31 */
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for (i = 0; i < 32; i++)
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supply_register (regcache, F0_REGNUM + i,
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buf + offsetof (usr_fcontext_t, ufc_freg[i]));
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/* fpscr */
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supply_register (regcache, FPSCR_REGNUM,
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buf + offsetof (usr_fcontext_t, ufc_fpscr));
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}
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/* Implements the lynx_target_ops.arch_setup routine. */
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static void
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lynx_ppc_arch_setup (void)
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{
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init_registers_powerpc_32 ();
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lynx_tdesc = tdesc_powerpc_32;
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}
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/* Description of all the powerpc-lynx register sets. */
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struct lynx_regset_info lynx_target_regsets[] = {
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/* General Purpose Registers. */
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{PTRACE_GETREGS, PTRACE_SETREGS, sizeof(usr_econtext_t),
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lynx_ppc_fill_gregset, lynx_ppc_store_gregset},
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/* Floating Point Registers. */
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{ PTRACE_GETFPREGS, PTRACE_SETFPREGS, sizeof(usr_fcontext_t),
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lynx_ppc_fill_fpregset, lynx_ppc_store_fpregset },
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/* End of list marker. */
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{0, 0, -1, NULL, NULL }
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};
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/* The lynx_target_ops vector for powerpc-lynxos. */
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struct lynx_target_ops the_low_target = {
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lynx_ppc_arch_setup,
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};
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