0dd7b52ede
All the linux target ops have been moved into linux_process_target as methods. The 'linux_target_ops' struct and its instantiations are now obsolete. Delete them. gdbserver/ChangeLog: 2020-04-02 Tankut Baris Aktemur <tankut.baris.aktemur@intel.com> * linux-low.h (struct linux_target_ops): Remove. (the_low_target): Remove. * linux-x86-low.cc (the_low_target): Remove. * linux-aarch64-low.cc (the_low_target): Ditto. * linux-arm-low.cc (the_low_target): Ditto. * linux-bfin-low.cc (the_low_target): Ditto. * linux-cris-low.cc (the_low_target): Ditto. * linux-crisv32-low.cc (the_low_target): Ditto. * linux-ia64-low.cc (the_low_target): Ditto. * linux-m32r-low.cc (the_low_target): Ditto. * linux-m68k-low.cc (the_low_target): Ditto. * linux-mips-low.cc (the_low_target): Ditto. * linux-nios2-low.cc (the_low_target): Ditto. * linux-ppc-low.cc (the_low_target): Ditto. * linux-riscv-low.cc (the_low_target): Ditto. * linux-s390-low.cc (the_low_target): Ditto. * linux-sh-low.cc (the_low_target): Ditto. * linux-sparc-low.cc (the_low_target): Ditto. * linux-tic6x-low.cc (the_low_target): Ditto. * linux-tile-low.cc (the_low_target): Ditto. * linux-xtensa-low.cc (the_low_target): Ditto.
322 lines
8.5 KiB
C++
322 lines
8.5 KiB
C++
/* GNU/Linux/RISC-V specific low level interface, for the remote server
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for GDB.
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Copyright (C) 2020 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "server.h"
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#include "linux-low.h"
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#include "tdesc.h"
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#include "elf/common.h"
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#include "nat/riscv-linux-tdesc.h"
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#include "opcode/riscv.h"
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/* Work around glibc header breakage causing ELF_NFPREG not to be usable. */
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#ifndef NFPREG
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# define NFPREG 33
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#endif
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/* Linux target op definitions for the RISC-V architecture. */
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class riscv_target : public linux_process_target
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{
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public:
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const regs_info *get_regs_info () override;
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int breakpoint_kind_from_pc (CORE_ADDR *pcptr) override;
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const gdb_byte *sw_breakpoint_from_kind (int kind, int *size) override;
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protected:
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void low_arch_setup () override;
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bool low_cannot_fetch_register (int regno) override;
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bool low_cannot_store_register (int regno) override;
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bool low_fetch_register (regcache *regcache, int regno) override;
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bool low_supports_breakpoints () override;
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CORE_ADDR low_get_pc (regcache *regcache) override;
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void low_set_pc (regcache *regcache, CORE_ADDR newpc) override;
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bool low_breakpoint_at (CORE_ADDR pc) override;
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};
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/* The singleton target ops object. */
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static riscv_target the_riscv_target;
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bool
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riscv_target::low_cannot_fetch_register (int regno)
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{
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gdb_assert_not_reached ("linux target op low_cannot_fetch_register "
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"is not implemented by the target");
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}
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bool
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riscv_target::low_cannot_store_register (int regno)
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{
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gdb_assert_not_reached ("linux target op low_cannot_store_register "
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"is not implemented by the target");
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}
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/* Implementation of linux target ops method "low_arch_setup". */
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void
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riscv_target::low_arch_setup ()
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{
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static const char *expedite_regs[] = { "sp", "pc", NULL };
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const riscv_gdbarch_features features
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= riscv_linux_read_features (lwpid_of (current_thread));
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target_desc *tdesc = riscv_create_target_description (features);
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if (!tdesc->expedite_regs)
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init_target_desc (tdesc, expedite_regs);
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current_process ()->tdesc = tdesc;
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}
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/* Collect GPRs from REGCACHE into BUF. */
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static void
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riscv_fill_gregset (struct regcache *regcache, void *buf)
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{
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const struct target_desc *tdesc = regcache->tdesc;
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elf_gregset_t *regset = (elf_gregset_t *) buf;
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int regno = find_regno (tdesc, "zero");
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int i;
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collect_register_by_name (regcache, "pc", *regset);
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for (i = 1; i < ARRAY_SIZE (*regset); i++)
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collect_register (regcache, regno + i, *regset + i);
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}
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/* Supply GPRs from BUF into REGCACHE. */
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static void
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riscv_store_gregset (struct regcache *regcache, const void *buf)
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{
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const elf_gregset_t *regset = (const elf_gregset_t *) buf;
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const struct target_desc *tdesc = regcache->tdesc;
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int regno = find_regno (tdesc, "zero");
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int i;
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supply_register_by_name (regcache, "pc", *regset);
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supply_register_zeroed (regcache, regno);
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for (i = 1; i < ARRAY_SIZE (*regset); i++)
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supply_register (regcache, regno + i, *regset + i);
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}
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/* Collect FPRs from REGCACHE into BUF. */
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static void
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riscv_fill_fpregset (struct regcache *regcache, void *buf)
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{
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const struct target_desc *tdesc = regcache->tdesc;
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int regno = find_regno (tdesc, "ft0");
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int flen = register_size (regcache->tdesc, regno);
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gdb_byte *regbuf = (gdb_byte *) buf;
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int i;
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for (i = 0; i < ELF_NFPREG - 1; i++, regbuf += flen)
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collect_register (regcache, regno + i, regbuf);
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collect_register_by_name (regcache, "fcsr", regbuf);
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}
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/* Supply FPRs from BUF into REGCACHE. */
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static void
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riscv_store_fpregset (struct regcache *regcache, const void *buf)
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{
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const struct target_desc *tdesc = regcache->tdesc;
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int regno = find_regno (tdesc, "ft0");
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int flen = register_size (regcache->tdesc, regno);
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const gdb_byte *regbuf = (const gdb_byte *) buf;
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int i;
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for (i = 0; i < ELF_NFPREG - 1; i++, regbuf += flen)
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supply_register (regcache, regno + i, regbuf);
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supply_register_by_name (regcache, "fcsr", regbuf);
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}
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/* RISC-V/Linux regsets. FPRs are optional and come in different sizes,
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so define multiple regsets for them marking them all as OPTIONAL_REGS
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rather than FP_REGS, so that "regsets_fetch_inferior_registers" picks
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the right one according to size. */
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static struct regset_info riscv_regsets[] = {
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{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PRSTATUS,
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sizeof (elf_gregset_t), GENERAL_REGS,
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riscv_fill_gregset, riscv_store_gregset },
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{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_FPREGSET,
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sizeof (struct __riscv_mc_q_ext_state), OPTIONAL_REGS,
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riscv_fill_fpregset, riscv_store_fpregset },
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{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_FPREGSET,
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sizeof (struct __riscv_mc_d_ext_state), OPTIONAL_REGS,
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riscv_fill_fpregset, riscv_store_fpregset },
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{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_FPREGSET,
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sizeof (struct __riscv_mc_f_ext_state), OPTIONAL_REGS,
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riscv_fill_fpregset, riscv_store_fpregset },
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NULL_REGSET
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};
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/* RISC-V/Linux regset information. */
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static struct regsets_info riscv_regsets_info =
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{
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riscv_regsets, /* regsets */
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0, /* num_regsets */
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NULL, /* disabled_regsets */
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};
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/* Definition of linux_target_ops data member "regs_info". */
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static struct regs_info riscv_regs =
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{
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NULL, /* regset_bitmap */
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NULL, /* usrregs */
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&riscv_regsets_info,
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};
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/* Implementation of linux target ops method "get_regs_info". */
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const regs_info *
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riscv_target::get_regs_info ()
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{
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return &riscv_regs;
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}
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/* Implementation of linux target ops method "low_fetch_register". */
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bool
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riscv_target::low_fetch_register (regcache *regcache, int regno)
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{
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const struct target_desc *tdesc = regcache->tdesc;
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if (regno != find_regno (tdesc, "zero"))
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return false;
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supply_register_zeroed (regcache, regno);
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return true;
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}
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bool
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riscv_target::low_supports_breakpoints ()
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{
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return true;
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}
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/* Implementation of linux target ops method "low_get_pc". */
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CORE_ADDR
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riscv_target::low_get_pc (regcache *regcache)
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{
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elf_gregset_t regset;
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if (sizeof (regset[0]) == 8)
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return linux_get_pc_64bit (regcache);
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else
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return linux_get_pc_32bit (regcache);
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}
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/* Implementation of linux target ops method "low_set_pc". */
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void
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riscv_target::low_set_pc (regcache *regcache, CORE_ADDR newpc)
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{
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elf_gregset_t regset;
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if (sizeof (regset[0]) == 8)
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linux_set_pc_64bit (regcache, newpc);
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else
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linux_set_pc_32bit (regcache, newpc);
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}
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/* Correct in either endianness. */
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static const uint16_t riscv_ibreakpoint[] = { 0x0073, 0x0010 };
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static const uint16_t riscv_cbreakpoint = 0x9002;
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/* Implementation of target ops method "breakpoint_kind_from_pc". */
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int
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riscv_target::breakpoint_kind_from_pc (CORE_ADDR *pcptr)
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{
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union
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{
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gdb_byte bytes[2];
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uint16_t insn;
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}
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buf;
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if (target_read_memory (*pcptr, buf.bytes, sizeof (buf.insn)) == 0
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&& riscv_insn_length (buf.insn == sizeof (riscv_ibreakpoint)))
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return sizeof (riscv_ibreakpoint);
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else
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return sizeof (riscv_cbreakpoint);
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}
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/* Implementation of target ops method "sw_breakpoint_from_kind". */
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const gdb_byte *
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riscv_target::sw_breakpoint_from_kind (int kind, int *size)
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{
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*size = kind;
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switch (kind)
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{
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case sizeof (riscv_ibreakpoint):
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return (const gdb_byte *) &riscv_ibreakpoint;
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default:
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return (const gdb_byte *) &riscv_cbreakpoint;
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}
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}
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/* Implementation of linux target ops method "low_breakpoint_at". */
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bool
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riscv_target::low_breakpoint_at (CORE_ADDR pc)
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{
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union
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{
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gdb_byte bytes[2];
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uint16_t insn;
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}
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buf;
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if (target_read_memory (pc, buf.bytes, sizeof (buf.insn)) == 0
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&& (buf.insn == riscv_cbreakpoint
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|| (buf.insn == riscv_ibreakpoint[0]
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&& target_read_memory (pc + sizeof (buf.insn), buf.bytes,
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sizeof (buf.insn)) == 0
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&& buf.insn == riscv_ibreakpoint[1])))
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return true;
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else
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return false;
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}
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/* The linux target ops object. */
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linux_process_target *the_linux_target = &the_riscv_target;
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/* Initialize the RISC-V/Linux target. */
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void
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initialize_low_arch ()
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{
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initialize_regsets_info (&riscv_regsets_info);
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}
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