307 lines
6.9 KiB
C
307 lines
6.9 KiB
C
/* Copyright (C) 1998, Cygnus Solutions */
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#include "pke.h"
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#include <stdlib.h>
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/* Imported functions */
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void device_error (device *me, char* message); /* device.c */
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/* Internal function declarations */
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static int pke_io_read_buffer(device*, void*, int, address_word,
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unsigned, sim_cpu*, sim_cia);
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static int pke_io_write_buffer(device*, const void*, int, address_word,
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unsigned, sim_cpu*, sim_cia);
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static void pke_issue(struct pke_device*);
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/* Static data */
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struct pke_device pke0_device =
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{
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{ "pke0", &pke_io_read_buffer, &pke_io_write_buffer }, /* device */
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0, 0, /* ID, flags */
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PKE0_REGISTER_WINDOW_START, PKE0_FIFO_START, /* memory-mapping addresses */
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{}, /* regs */
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NULL, 0, 0, NULL, /* FIFO */
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0 /* pc */
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};
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struct pke_device pke1_device =
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{
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{ "pke1", &pke_io_read_buffer, &pke_io_write_buffer }, /* device */
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1, 0, /* ID, flags */
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PKE1_REGISTER_WINDOW_START, PKE1_FIFO_START, /* memory-mapping addresses */
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{}, /* regs */
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NULL, 0, 0, NULL, /* FIFO */
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0 /* pc */
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};
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/* External functions */
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/* Attach PKE0 addresses to main memory */
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void
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pke0_attach(SIM_DESC sd)
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{
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sim_core_attach (sd,
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NULL,
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0 /*level*/,
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access_read_write,
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0 /*space ???*/,
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pke0_device.register_memory_addr,
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PKE_REGISTER_WINDOW_SIZE /*nr_bytes*/,
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0 /*modulo*/,
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(device*) &pke0_device,
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NULL /*buffer*/);
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sim_core_attach (sd,
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NULL,
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0 /*level*/,
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access_read_write,
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0 /*space ???*/,
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pke0_device.fifo_memory_addr,
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sizeof(quadword) /*nr_bytes*/,
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0 /*modulo*/,
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(device*) &pke1_device,
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NULL /*buffer*/);
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}
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/* Attach PKE1 addresses to main memory */
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void
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pke1_attach(SIM_DESC sd)
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{
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sim_core_attach (sd,
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NULL,
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0 /*level*/,
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access_read_write,
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0 /*space ???*/,
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pke1_device.register_memory_addr,
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PKE_REGISTER_WINDOW_SIZE /*nr_bytes*/,
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0 /*modulo*/,
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(device*) &pke1_device,
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NULL /*buffer*/);
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sim_core_attach (sd,
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NULL,
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0 /*level*/,
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access_read_write,
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0 /*space ???*/,
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pke1_device.fifo_memory_addr,
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sizeof(quadword) /*nr_bytes*/,
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0 /*modulo*/,
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(device*) &pke1_device,
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NULL /*buffer*/);
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}
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/* Issue a PKE0 instruction if possible */
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void
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pke0_issue()
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{
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pke_issue(& pke0_device);
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}
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/* Issue a PKE1 instruction if possible */
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void
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pke1_issue()
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{
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pke_issue(& pke0_device);
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}
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/* Internal functions */
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/* Handle a PKE read; return no. of bytes read */
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int
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pke_io_read_buffer(device *me_,
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void *dest,
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int space,
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address_word addr,
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unsigned nr_bytes,
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sim_cpu *processor,
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sim_cia cia)
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{
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/* downcast to gather embedding pke_device struct */
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struct pke_device* me = (struct pke_device*) me_;
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/* enforce that an access does not span more than one quadword */
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address_word low = ADDR_TRUNC_QW(addr);
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address_word high = ADDR_TRUNC_QW(addr + nr_bytes - 1);
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if(low != high)
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return 0;
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/* classify address & handle */
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if(addr >= me->register_memory_addr &&
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addr < me->register_memory_addr + PKE_REGISTER_WINDOW_SIZE)
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{
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/* register bank */
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int reg_num = ADDR_TRUNC_QW(addr - me->register_memory_addr) >> 4;
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int readable = 1;
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/* ensure readibility of register: all okay except PKE1-only ones read on PKE0 */
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switch(reg_num)
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{
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case PKE_REG_BASE:
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case PKE_REG_OFST:
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case PKE_REG_TOPS:
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case PKE_REG_TOP:
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case PKE_REG_DBF:
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if(me->pke_number == 0) /* PKE0 cannot access these registers */
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readable = 0;
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}
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/* perform read & return */
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if(readable)
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{
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/* find byte-offset inside register bank */
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int reg_byte = ADDR_OFFSET_QW(addr);
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void* src = ((unsigned_1*) (& me->regs[reg_num])) + reg_byte;
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/* copy the bits */
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memcpy(dest, src, nr_bytes);
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/* okay */
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return nr_bytes;
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}
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else
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{
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/* error */
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return 0;
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}
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/* NOTREACHED */
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}
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else if(addr >= me->fifo_memory_addr &&
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addr < me->fifo_memory_addr + sizeof(quadword))
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{
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/* FIFO */
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/* XXX: FIFO is not readable. */
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return 0;
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}
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/* NOTREACHED */
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}
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/* Handle a PKE read; return no. of bytes written */
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int
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pke_io_write_buffer(device *me_,
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const void *src,
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int space,
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address_word addr,
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unsigned nr_bytes,
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sim_cpu *processor,
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sim_cia cia)
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{
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/* downcast to gather embedding pke_device struct */
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struct pke_device* me = (struct pke_device*) me_;
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/* enforce that an access does not span more than one quadword */
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address_word low = ADDR_TRUNC_QW(addr);
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address_word high = ADDR_TRUNC_QW(addr + nr_bytes - 1);
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if(low != high)
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return 0;
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/* classify address & handle */
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if(addr >= me->register_memory_addr &&
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addr < me->register_memory_addr + PKE_REGISTER_WINDOW_SIZE)
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{
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/* register bank */
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int reg_num = ADDR_TRUNC_QW(addr - me->register_memory_addr) >> 4;
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int writeable = 1;
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/* ensure readibility of register: all okay except PKE1-only ones read on PKE0 */
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switch(reg_num)
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{
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case PKE_REG_BASE:
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case PKE_REG_OFST:
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case PKE_REG_TOPS:
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case PKE_REG_TOP:
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case PKE_REG_DBF:
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if(me->pke_number == 0) /* PKE0 cannot access these registers */
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writeable = 0;
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}
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/* perform write & return */
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if(writeable)
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{
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/* find byte-offset inside register bank */
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int reg_byte = ADDR_OFFSET_QW(addr);
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void* dest = ((unsigned_1*) (& me->regs[reg_num])) + reg_byte;
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/* copy the bits */
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memcpy(dest, src, nr_bytes);
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return nr_bytes;
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}
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else
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{
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/* error */
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return 0;
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}
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/* NOTREACHED */
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}
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else if(addr >= me->fifo_memory_addr &&
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addr < me->fifo_memory_addr + sizeof(quadword))
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{
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/* FIFO */
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/* assert transfer size == 128 bits */
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if(nr_bytes != sizeof(quadword))
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return 0;
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/* ensure FIFO has enough elements */
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if(me->fifo_num_elements == me->fifo_buffer_size)
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{
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/* time to grow */
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int new_fifo_buffer_size = me->fifo_buffer_size + 20;
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void* ptr = realloc((void*) me->fifo, new_fifo_buffer_size*sizeof(quadword));
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if(ptr == NULL)
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{
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/* oops, cannot enlarge FIFO any more */
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device_error(me_, "Cannot enlarge FIFO buffer\n");
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return 0;
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}
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me->fifo_buffer_size = new_fifo_buffer_size;
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}
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/* add new quadword at end of FIFO */
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memcpy(& me->fifo[++me->fifo_num_elements], src, nr_bytes);
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/* okay */
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return nr_bytes;
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}
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/* NOTREACHED */
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}
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/* Issue & swallow one PKE opcode if possible */
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void
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pke_issue(struct pke_device* me)
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{
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}
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