833d299073
* cgen-dis.c,cgen-opc.c,cgen-asm.in,cgen-dis.in: Ditto.
342 lines
9.5 KiB
C
342 lines
9.5 KiB
C
/* Disassembler interface for targets using CGEN. -*- C -*-
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CGEN: Cpu tools GENerator
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This file is used to generate @arch@-dis.c.
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Copyright (C) 1996, 1997 Free Software Foundation, Inc.
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This file is part of the GNU Binutils and GDB, the GNU debugger.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "sysdep.h"
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#include <stdio.h>
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#include "ansidecl.h"
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#include "dis-asm.h"
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#include "bfd.h"
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#include "symcat.h"
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#include "@arch@-opc.h"
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/* ??? The layout of this stuff is still work in progress.
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For speed in assembly/disassembly, we use inline functions. That of course
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will only work for GCC. When this stuff is finished, we can decide whether
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to keep the inline functions (and only get the performance increase when
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compiled with GCC), or switch to macros, or use something else.
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*/
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/* Default text to print if an instruction isn't recognized. */
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#define UNKNOWN_INSN_MSG "*unknown*"
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/* FIXME: Machine generate. */
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#ifndef CGEN_PCREL_OFFSET
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#define CGEN_PCREL_OFFSET 0
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#endif
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static int print_insn PARAMS ((bfd_vma, disassemble_info *, char *, int));
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static int extract_insn_normal
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PARAMS ((const CGEN_INSN *, void *, cgen_insn_t, CGEN_FIELDS *));
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static void print_insn_normal
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PARAMS ((void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int));
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/* Default extraction routine.
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ATTRS is a mask of the boolean attributes. We only need `unsigned',
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but for generality we take a bitmask of all of them. */
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static int
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extract_normal (buf_ctrl, insn_value, attrs, start, length, shift, total_length, valuep)
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PTR buf_ctrl;
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cgen_insn_t insn_value;
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unsigned int attrs;
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int start, length, shift, total_length;
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long *valuep;
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{
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long value;
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#ifdef CGEN_INT_INSN
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#if 0
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value = ((insn_value >> (CGEN_BASE_INSN_BITSIZE - (start + length)))
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& ((1 << length) - 1));
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#else
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value = ((insn_value >> (total_length - (start + length)))
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& ((1 << length) - 1));
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#endif
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if (! (attrs & CGEN_ATTR_MASK (CGEN_OPERAND_UNSIGNED))
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&& (value & (1 << (length - 1))))
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value -= 1 << length;
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#else
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/* FIXME: unfinished */
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#endif
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/* This is backwards as we undo the effects of insert_normal. */
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if (shift < 0)
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value >>= -shift;
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else
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value <<= shift;
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*valuep = value;
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/* FIXME: for now */
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return 1;
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}
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/* Default print handler. */
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static void
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print_normal (dis_info, value, attrs, pc, length)
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PTR dis_info;
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long value;
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unsigned int attrs;
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unsigned long pc; /* FIXME: should be bfd_vma */
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int length;
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{
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disassemble_info *info = dis_info;
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/* Print the operand as directed by the attributes. */
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if (attrs & CGEN_ATTR_MASK (CGEN_OPERAND_FAKE))
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; /* nothing to do (??? at least not yet) */
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else if (attrs & CGEN_ATTR_MASK (CGEN_OPERAND_PCREL_ADDR))
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(*info->print_address_func) (pc + CGEN_PCREL_OFFSET + value, info);
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/* ??? Not all cases of this are currently caught. */
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else if (attrs & CGEN_ATTR_MASK (CGEN_OPERAND_ABS_ADDR))
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/* FIXME: Why & 0xffffffff? */
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(*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
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else if (attrs & CGEN_ATTR_MASK (CGEN_OPERAND_UNSIGNED))
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(*info->fprintf_func) (info->stream, "0x%lx", value);
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else
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(*info->fprintf_func) (info->stream, "%ld", value);
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}
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/* Keyword print handler. */
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static void
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print_keyword (dis_info, keyword_table, value, attrs)
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PTR dis_info;
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CGEN_KEYWORD *keyword_table;
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long value;
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CGEN_ATTR *attrs;
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{
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disassemble_info *info = dis_info;
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const CGEN_KEYWORD_ENTRY *ke;
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ke = cgen_keyword_lookup_value (keyword_table, value);
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if (ke != NULL)
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(*info->fprintf_func) (info->stream, "%s", ke->name);
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else
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(*info->fprintf_func) (info->stream, "???");
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}
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/* -- disassembler routines inserted here */
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/* Default insn extractor.
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The extracted fields are stored in DIS_FLDS.
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BUF_CTRL is used to handle reading variable length insns (FIXME: not done).
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Return the length of the insn in bits, or 0 if no match. */
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static int
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extract_insn_normal (insn, buf_ctrl, insn_value, fields)
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const CGEN_INSN *insn;
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PTR buf_ctrl;
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cgen_insn_t insn_value;
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CGEN_FIELDS *fields;
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{
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const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
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const unsigned char *syn;
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CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
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CGEN_INIT_EXTRACT ();
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for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
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{
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int length;
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if (CGEN_SYNTAX_CHAR_P (*syn))
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continue;
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length = @arch@_cgen_extract_operand (CGEN_SYNTAX_FIELD (*syn),
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buf_ctrl, insn_value, fields);
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if (length == 0)
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return 0;
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}
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/* We recognized and successfully extracted this insn. */
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return CGEN_INSN_BITSIZE (insn);
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}
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/* Default insn printer.
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DIS_INFO is defined as `PTR' so the disassembler needn't know anything
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about disassemble_info.
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*/
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static void
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print_insn_normal (dis_info, insn, fields, pc, length)
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PTR dis_info;
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const CGEN_INSN *insn;
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CGEN_FIELDS *fields;
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bfd_vma pc;
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int length;
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{
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const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
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disassemble_info *info = dis_info;
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const unsigned char *syn;
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CGEN_INIT_PRINT ();
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for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
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{
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if (CGEN_SYNTAX_MNEMONIC_P (*syn))
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{
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(*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
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continue;
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}
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if (CGEN_SYNTAX_CHAR_P (*syn))
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{
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(*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
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continue;
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}
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/* We have an operand. */
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@arch@_cgen_print_operand (CGEN_SYNTAX_FIELD (*syn), info,
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fields, CGEN_INSN_ATTRS (insn), pc, length);
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}
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}
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/* Default value for CGEN_PRINT_INSN.
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Given BUFLEN bits (target byte order) read into BUF, look up the
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insn in the instruction table and disassemble it.
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The result is the size of the insn in bytes. */
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#ifndef CGEN_PRINT_INSN
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#define CGEN_PRINT_INSN print_insn
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#endif
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static int
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print_insn (pc, info, buf, buflen)
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bfd_vma pc;
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disassemble_info *info;
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char *buf;
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int buflen;
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{
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unsigned long insn_value;
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const CGEN_INSN_LIST *insn_list;
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switch (buflen)
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{
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case 8:
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insn_value = buf[0];
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break;
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case 16:
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insn_value = info->endian == BFD_ENDIAN_BIG ? bfd_getb16 (buf) : bfd_getl16 (buf);
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break;
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case 32:
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insn_value = info->endian == BFD_ENDIAN_BIG ? bfd_getb32 (buf) : bfd_getl32 (buf);
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break;
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default:
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abort ();
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}
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/* The instructions are stored in hash lists.
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Pick the first one and keep trying until we find the right one. */
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insn_list = CGEN_DIS_LOOKUP_INSN (buf, insn_value);
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while (insn_list != NULL)
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{
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const CGEN_INSN *insn = insn_list->insn;
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CGEN_FIELDS fields;
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int length;
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#if 0 /* not needed as insn shouldn't be in hash lists if not supported */
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/* Supported by this cpu? */
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if (! @arch@_cgen_insn_supported (insn))
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continue;
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#endif
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/* Basic bit mask must be correct. */
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/* ??? May wish to allow target to defer this check until the extract
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handler. */
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if ((insn_value & CGEN_INSN_MASK (insn)) == CGEN_INSN_VALUE (insn))
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{
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/* Printing is handled in two passes. The first pass parses the
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machine insn and extracts the fields. The second pass prints
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them. */
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length = (*CGEN_EXTRACT_FN (insn)) (insn, NULL, insn_value, &fields);
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if (length > 0)
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{
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(*CGEN_PRINT_FN (insn)) (info, insn, &fields, pc, length);
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/* length is in bits, result is in bytes */
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return length / 8;
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}
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}
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insn_list = CGEN_DIS_NEXT_INSN (insn_list);
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}
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return 0;
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}
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/* Main entry point.
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Print one instruction from PC on INFO->STREAM.
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Return the size of the instruction (in bytes). */
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int
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print_insn_@arch@ (pc, info)
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bfd_vma pc;
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disassemble_info *info;
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{
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char buffer[CGEN_MAX_INSN_SIZE];
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int status, length;
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static int initialized = 0;
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static int current_mach = 0;
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static int current_big_p = 0;
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int mach = info->mach;
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int big_p = info->endian == BFD_ENDIAN_BIG;
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/* If we haven't initialized yet, or if we've switched cpu's, initialize. */
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if (!initialized || mach != current_mach || big_p != current_big_p)
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{
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initialized = 1;
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current_mach = mach;
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current_big_p = big_p;
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@arch@_cgen_init_dis (mach, big_p ? CGEN_ENDIAN_BIG : CGEN_ENDIAN_LITTLE);
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}
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/* Read enough of the insn so we can look it up in the hash lists. */
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status = (*info->read_memory_func) (pc, buffer, CGEN_BASE_INSN_SIZE, info);
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if (status != 0)
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{
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(*info->memory_error_func) (status, pc, info);
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return -1;
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}
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/* We try to have as much common code as possible.
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But at this point some targets need to take over. */
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/* ??? Some targets may need a hook elsewhere. Try to avoid this,
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but if not possible try to move this hook elsewhere rather than
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have two hooks. */
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length = CGEN_PRINT_INSN (pc, info, buffer, CGEN_BASE_INSN_BITSIZE);
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if (length)
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return length;
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(*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
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return CGEN_DEFAULT_INSN_SIZE;
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}
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