12c266ea56
* gdbarch.sh (DEPRECATED_REGISTER_RAW_SIZE): Rename REGISTER_RAW_SIZE. * gdbarch.h, gdbarch.c: Re-generate. * aix-thread.c, alpha-tdep.h, arm-tdep.c, core-sol2.c: Update. * cris-tdep.c, dve3900-rom.c, findvar.c, frame.c: Update. * hppa-tdep.c, hppab-nat.c, hppah-nat.c, hppam3-nat.c: Update. * hpux-thread.c, i386gnu-nat.c, ia64-aix-nat.c: Update. * ia64-linux-nat.c, ia64-tdep.c, infcmd.c, infptrace.c: Update. * infrun.c, irix5-nat.c, lynx-nat.c, mips-linux-tdep.c: Update. * mips-nat.c, mips-tdep.c, mipsv4-nat.c, mn10300-tdep.c: Update. * monitor.c, ns32k-tdep.c, ppc-linux-nat.c, regcache.c: Update. * remote-e7000.c, remote-mips.c, remote-sim.c: Update. * remote-vxmips.c, remote-vxsparc.c, remote.c: Update. * rom68k-rom.c, rs6000-nat.c, rs6000-tdep.c, s390-tdep.c: Update. * sh64-tdep.c, sparc-nat.c, sparc-tdep.c, stack.c: Update. * target.c, tracepoint.c, v850-tdep.c, v850ice.c, valops.c: Update. * vax-tdep.c, vax-tdep.h, x86-64-tdep.c, xstormy16-tdep.c: Update. * config/m68k/tm-delta68.h, config/m68k/tm-vx68.h: Update. * config/sparc/tm-sparc.h, config/sparc/tm-sparclynx.h: Update. 2003-10-02 Andrew Cagney <cagney@redhat.com> * gdbint.texinfo (Target Architecture Definition): Rename REGISTER_RAW_SIZE to DEPRECATED_REGISTER_RAW_SIZE. * gdb.texinfo (Packets, Stop Reply Packets): Ditto. * gdbint.texinfo (Target Architecture Definition): Rename 2003-10-02 Andrew Cagney <cagney@redhat.com> * mi-main.c: Rename REGISTER_RAW_SIZE to DEPRECATED_REGISTER_RAW_SIZE.
253 lines
7.1 KiB
C
253 lines
7.1 KiB
C
/* Low level DECstation interface to ptrace, for GDB when running native.
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Copyright 1988, 1989, 1991, 1992, 1993, 1995, 1996, 1999, 2000, 2001
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Free Software Foundation, Inc.
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Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
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and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "inferior.h"
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#include "gdbcore.h"
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#include "regcache.h"
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#include <sys/ptrace.h>
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/user.h>
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#undef JB_S0
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#undef JB_S1
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#undef JB_S2
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#undef JB_S3
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#undef JB_S4
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#undef JB_S5
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#undef JB_S6
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#undef JB_S7
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#undef JB_SP
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#undef JB_S8
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#undef JB_PC
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#undef JB_SR
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#undef NJBREGS
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#include <setjmp.h> /* For JB_XXX. */
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/* Size of elements in jmpbuf */
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#define JB_ELEMENT_SIZE 4
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/* Map gdb internal register number to ptrace ``address''.
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These ``addresses'' are defined in DECstation <sys/ptrace.h> */
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static int
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register_ptrace_addr (int regno)
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{
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return (regno < 32 ? GPR_BASE + regno
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: regno == PC_REGNUM ? PC
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: regno == CAUSE_REGNUM ? CAUSE
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: regno == HI_REGNUM ? MMHI
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: regno == LO_REGNUM ? MMLO
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: regno == FCRCS_REGNUM ? FPC_CSR
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: regno == FCRIR_REGNUM ? FPC_EIR
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: regno >= FP0_REGNUM ? FPR_BASE + (regno - FP0_REGNUM)
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: 0);
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}
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static void fetch_core_registers (char *, unsigned, int, CORE_ADDR);
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/* Get all registers from the inferior */
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void
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fetch_inferior_registers (int regno)
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{
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unsigned int regaddr;
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char buf[MAX_REGISTER_SIZE];
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int i;
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char zerobuf[MAX_REGISTER_SIZE];
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memset (zerobuf, 0, MAX_REGISTER_SIZE);
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deprecated_registers_fetched ();
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for (regno = 1; regno < NUM_REGS; regno++)
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{
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regaddr = register_ptrace_addr (regno);
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for (i = 0; i < DEPRECATED_REGISTER_RAW_SIZE (regno); i += sizeof (int))
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{
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*(int *) &buf[i] = ptrace (PT_READ_U, PIDGET (inferior_ptid),
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(PTRACE_ARG3_TYPE) regaddr, 0);
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regaddr += sizeof (int);
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}
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supply_register (regno, buf);
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}
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supply_register (ZERO_REGNUM, zerobuf);
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/* Frame ptr reg must appear to be 0; it is faked by stack handling code. */
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supply_register (DEPRECATED_FP_REGNUM, zerobuf);
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}
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/* Store our register values back into the inferior.
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If REGNO is -1, do this for all registers.
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Otherwise, REGNO specifies which register (so we can save time). */
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void
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store_inferior_registers (int regno)
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{
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unsigned int regaddr;
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char buf[80];
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if (regno > 0)
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{
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if (regno == ZERO_REGNUM || regno == PS_REGNUM
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|| regno == BADVADDR_REGNUM || regno == CAUSE_REGNUM
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|| regno == FCRIR_REGNUM || regno == DEPRECATED_FP_REGNUM
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|| (regno >= FIRST_EMBED_REGNUM && regno <= LAST_EMBED_REGNUM))
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return;
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regaddr = register_ptrace_addr (regno);
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errno = 0;
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ptrace (PT_WRITE_U, PIDGET (inferior_ptid), (PTRACE_ARG3_TYPE) regaddr,
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read_register (regno));
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if (errno != 0)
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{
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sprintf (buf, "writing register number %d", regno);
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perror_with_name (buf);
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}
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}
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else
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{
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for (regno = 0; regno < NUM_REGS; regno++)
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store_inferior_registers (regno);
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}
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}
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/* Figure out where the longjmp will land.
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We expect the first arg to be a pointer to the jmp_buf structure from which
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we extract the pc (JB_PC) that we will land at. The pc is copied into PC.
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This routine returns true on success. */
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int
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get_longjmp_target (CORE_ADDR *pc)
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{
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CORE_ADDR jb_addr;
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char *buf;
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buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT);
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jb_addr = read_register (A0_REGNUM);
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if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
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TARGET_PTR_BIT / TARGET_CHAR_BIT))
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return 0;
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*pc = extract_unsigned_integer (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
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return 1;
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}
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/* Extract the register values out of the core file and store
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them where `read_register' will find them.
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CORE_REG_SECT points to the register values themselves, read into memory.
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CORE_REG_SIZE is the size of that area.
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WHICH says which set of registers we are handling (0 = int, 2 = float
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on machines where they are discontiguous).
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REG_ADDR is the offset from u.u_ar0 to the register values relative to
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core_reg_sect. This is used with old-fashioned core files to
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locate the registers in a large upage-plus-stack ".reg" section.
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Original upage address X is at location core_reg_sect+x+reg_addr.
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*/
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static void
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fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, int which,
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CORE_ADDR reg_addr)
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{
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int regno;
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unsigned int addr;
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int bad_reg = -1;
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reg_ptr = -reg_addr; /* Original u.u_ar0 is -reg_addr. */
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char zerobuf[MAX_REGISTER_SIZE];
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memset (zerobuf, 0, MAX_REGISTER_SIZE);
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/* If u.u_ar0 was an absolute address in the core file, relativize it now,
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so we can use it as an offset into core_reg_sect. When we're done,
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"register 0" will be at core_reg_sect+reg_ptr, and we can use
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register_addr to offset to the other registers. If this is a modern
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core file without a upage, reg_ptr will be zero and this is all a big
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NOP. */
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if (reg_ptr > core_reg_size)
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#ifdef KERNEL_U_ADDR
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reg_ptr -= KERNEL_U_ADDR;
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#else
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error ("Old mips core file can't be processed on this machine.");
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#endif
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for (regno = 0; regno < NUM_REGS; regno++)
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{
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addr = register_addr (regno, reg_ptr);
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if (addr >= core_reg_size)
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{
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if (bad_reg < 0)
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bad_reg = regno;
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}
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else
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{
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supply_register (regno, core_reg_sect + addr);
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}
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}
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if (bad_reg >= 0)
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{
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error ("Register %s not found in core file.", REGISTER_NAME (bad_reg));
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}
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supply_register (ZERO_REGNUM, zerobuf);
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/* Frame ptr reg must appear to be 0; it is faked by stack handling code. */
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supply_register (DEPRECATED_FP_REGNUM, zerobuf);
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}
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/* Return the address in the core dump or inferior of register REGNO.
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BLOCKEND is the address of the end of the user structure. */
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CORE_ADDR
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register_addr (int regno, CORE_ADDR blockend)
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{
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CORE_ADDR addr;
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if (regno < 0 || regno >= NUM_REGS)
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error ("Invalid register number %d.", regno);
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REGISTER_U_ADDR (addr, blockend, regno);
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return addr;
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}
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/* Register that we are able to handle mips core file formats.
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FIXME: is this really bfd_target_unknown_flavour? */
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static struct core_fns mips_core_fns =
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{
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bfd_target_unknown_flavour, /* core_flavour */
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default_check_format, /* check_format */
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default_core_sniffer, /* core_sniffer */
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fetch_core_registers, /* core_read_registers */
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NULL /* next */
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};
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void
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_initialize_core_mips (void)
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{
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add_core_fns (&mips_core_fns);
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}
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