148 lines
5.1 KiB
Plaintext
148 lines
5.1 KiB
Plaintext
/* TODO: R/W permissions should be eventually specified for each register in
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the table below. */
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/* ALT_ENTRies below make sense for assembler only to allow for different
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variants of state register names. They are ignored in disassembler. */
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ENTRY(1, "%psr", 0x00, 1, 0)
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ENTRY(1, "%wd", 0x01, 0, 0)
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ENTRY(1, "%core_mode", 0x04, 0, 0)
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ENTRY(1, "%cwd", 0x06, 1, 0)
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ENTRY(1, "%psp.hi", 0x07, 1, 0)
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ENTRY(1, "%psp.lo", 0x09, 1, 0)
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ENTRY(1, "%pshtp", 0x0b, 1, 0)
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ENTRY(1, "%pcsp.hi", 0x0d, 1, 0)
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ENTRY(1, "%pcsp.lo", 0x0f, 1, 0)
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ENTRY(1, "%pcshtp", 0x13, 0, 0)
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ENTRY(1, "%ctpr1", 0x15, 0, 0)
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ENTRY(6, "%ctpr1.lo", 0x15, 0, 0)
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ENTRY(1, "%ctpr2", 0x16, 0, 0)
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ENTRY(6, "%ctpr2.lo", 0x16, 0, 0)
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ENTRY(1, "%ctpr3", 0x17, 0, 0)
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ENTRY(6, "%ctpr3.lo", 0x17, 0, 0)
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ENTRY(6, "%ctpr1.hi", 0x19, 0, 0)
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ENTRY(6, "%ctpr2.hi", 0x1a, 0, 0)
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ENTRY(6, "%ctpr3.hi", 0x1b, 0, 0)
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ENTRY(1, "%usbr", 0x1e, 0, 0)
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/* This flavour of %usbr register name won't be used in disassembler. */
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ALT_ENTRY(1, "%sbr", 0x1e, 0, 0)
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ENTRY(1, "%cutd", 0x21, 1, 0)
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ENTRY(6, "%oscutd", 0x22, 1, 0)
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ENTRY(1, "%eir", 0x23, 0, 0)
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/* Note that `%tsd' register corresponding to 0x24 has been "officially"
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eliminated from all versions of Elbrus instruction set (see Bug #74420
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and Bug #53587). In fact it's not supported starting from elbrus-v3
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only. */
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STALE_ENTRY(1, 2, "%tsd", 0x24, 0, 0)
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ENTRY(1, "%cuir", 0x25, 0, 0)
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ENTRY(1, "%oscud.hi", 0x26, 1, 0)
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ENTRY(1, "%oscud.lo", 0x27, 1, 0)
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ENTRY(1, "%osgd.hi", 0x28, 1, 0)
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ENTRY(1, "%osgd.lo", 0x29, 1, 0)
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ENTRY(1, "%osem", 0x2a, 1, 0)
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ENTRY(6, "%oscuir", 0x2b, 0, 0)
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ENTRY(1, "%usd.hi", 0x2c, 1, 0)
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ENTRY(1, "%usd.lo", 0x2d, 1, 0)
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/* `%tr' register which used to be encoded with 0x2e has been eliminated
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together with `%tsd' (see above). */
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STALE_ENTRY(1, 2, "%tr", 0x2e, 0, 0)
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ENTRY(1, "%osr0", 0x2f, 0, 0)
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ENTRY(1, "%cud.hi", 0x30, 0, 1)
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ENTRY(1, "%cud.lo", 0x31, 0, 1)
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ENTRY(1, "%gd.hi", 0x32, 0, 1)
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ENTRY(1, "%gd.lo", 0x33, 0, 1)
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ENTRY(1, "%cs.hi", 0x34, 1, 0)
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ENTRY(1, "%cs.lo", 0x35, 1, 0)
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ENTRY(1, "%ds.hi", 0x36, 1, 0)
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ENTRY(1, "%ds.lo", 0x37, 1, 0)
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ENTRY(1, "%es.hi", 0x38, 1, 0)
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ENTRY(1, "%es.lo", 0x39, 1, 0)
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ENTRY(1, "%fs.hi", 0x3a, 1, 0)
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ENTRY(1, "%fs.lo", 0x3b, 1, 0)
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ENTRY(1, "%gs.hi", 0x3c, 1, 0)
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ENTRY(1, "%gs.lo", 0x3d, 1, 0)
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ENTRY(1, "%ss.hi", 0x3e, 1, 0)
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ENTRY(1, "%ss.lo", 0x3f, 1, 0)
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ENTRY(1, "%dibcr", 0x40, 0, 0)
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ENTRY(1, "%dimcr", 0x41, 0, 0)
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ENTRY(1, "%dibsr", 0x42, 0, 0)
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ENTRY(1, "%dtcr", 0x43, 0, 0)
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ENTRY(1, "%dibar0", 0x48, 0, 0)
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ENTRY(1, "%dibar1", 0x49, 0, 0)
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ENTRY(1, "%dibar2", 0x4a, 0, 0)
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ENTRY(1, "%dibar3", 0x4b, 0, 0)
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ENTRY(1, "%dimar0", 0x4c, 0, 0)
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ENTRY(1, "%dimar1", 0x4d, 0, 0)
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ENTRY(1, "%dtarf", 0x4e, 0, 0)
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ENTRY(1, "%dtart", 0x4f, 0, 0)
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ENTRY(1, "%cr0.hi", 0x51, 0, 0)
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ENTRY(1, "%cr0.lo", 0x53, 0, 0)
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ENTRY(1, "%cr1.hi", 0x55, 0, 0)
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ENTRY(1, "%cr1.lo", 0x57, 0, 0)
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ENTRY(6, "%sh_psp.hi", 0x58, 0, 0)
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ENTRY(6, "%sh_psp.lo", 0x59, 0, 0)
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ENTRY(6, "%bu_psp.hi", 0x5a, 0, 0)
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ENTRY(6, "%bu_psp.lo", 0x5b, 0, 0)
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ENTRY(6, "%sh_pcsp.hi", 0x5c, 0, 0)
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ENTRY(6, "%sh_pcsp.lo", 0x5d, 0, 0)
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ENTRY(6, "%sh_pshtp", 0x5e, 0, 0)
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ENTRY(6, "%sh_pcshtp", 0x5f, 0, 0)
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ENTRY(6, "%virt_ctrl_cu", 0x60, 0, 0)
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ENTRY(6, "%hceb", 0x61, 0, 0)
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ENTRY(6, "%hcem", 0x62, 0, 0)
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ENTRY(6, "%g_preempt_tmr", 0x63, 0, 0)
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ENTRY(6, "%intc_info_cu", 0x64, 0, 0)
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ENTRY(6, "%intc_ptr_cu", 0x65, 0, 0)
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ENTRY(6, "%sh_psr", 0x66, 0, 0)
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ENTRY(6, "%sh_core_mode", 0x67, 0, 0)
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ENTRY(6, "%sh_oscud.hi", 0x68, 0, 0)
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ENTRY(6, "%sh_oscud.lo", 0x69, 0, 0)
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ENTRY(6, "%sh_osgd.hi", 0x6a, 0, 0)
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ENTRY(6, "%sh_osgd.lo", 0x6b, 0, 0)
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ENTRY(6, "%sh_oscutd", 0x6c, 0, 0)
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ENTRY(6, "%sh_oscuir", 0x6d, 0, 0)
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ENTRY(6, "%sh_osr0", 0x6e, 0, 0)
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ENTRY(6, "%sh_sclkm3", 0x6f, 0, 0)
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ENTRY(3, "%sclkm1", 0x70, 0, 0)
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ENTRY(3, "%sclkm2", 0x71, 0, 0)
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ENTRY(3, "%sclkm3", 0x72, 0, 0)
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ENTRY(6, "%bu_pcsp.hi", 0x74, 0, 0)
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ENTRY(6, "%bu_pcsp.lo", 0x75, 0, 0)
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ENTRY(2, "%cu_hw0", 0x78, 0, 0)
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ENTRY(5, "%cu_hw1", 0x79, 0, 0)
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ENTRY(1, "%upsr", 0x80, 0, 0)
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ENTRY(1, "%ip", 0x81, 0, 0)
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ENTRY(1, "%nip", 0x82, 0, 0)
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ENTRY(1, "%lsr", 0x83, 0, 0)
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ENTRY(1, "%pfpfr", 0x84, 0, 0)
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ENTRY(1, "%fpcr", 0x85, 0, 0)
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ENTRY(1, "%fpsr", 0x86, 0, 0)
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ENTRY(1, "%ilcr", 0x87, 0, 0)
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ENTRY(1, "%br", 0x88, 0, 0)
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ENTRY(1, "%bgr", 0x89, 0, 0)
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ENTRY(1, "%idr", 0x8a, 0, 0)
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ENTRY(1, "%clkr", 0x90, 0, 0)
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ENTRY(3, "%rndpr", 0x91, 0, 0)
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ENTRY(3, "%sclkr", 0x92, 0, 0)
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ENTRY(1, "%tir.hi", 0x9c, 0, 0)
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ENTRY(1, "%tir.lo", 0x9d, 0, 0)
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ENTRY(1, "%rpr.lo", 0xa0, 0, 0)
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/* This flavour of %rpr.lo register name won't be used in disassembler. */
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ALT_ENTRY(1, "%rpr", 0xa0, 0, 0)
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ENTRY(1, "%sbbp", 0xa1, 0, 0)
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ENTRY(1, "%rpr.hi", 0xa2, 0, 0)
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ENTRY(3, "%upsrm", 0xc0, 0, 0)
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ENTRY(5, "%lsr1", 0xc3, 0, 0)
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ENTRY(5, "%ilcr1", 0xc7, 0, 0)
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