148 lines
3.7 KiB
Makefile
148 lines
3.7 KiB
Makefile
# Makefile template for configure for the or1k simulator
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# Copyright (C) 2017-2020 Free Software Foundation, Inc.
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#
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# This file is part of GDB, the GNU debugger.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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## COMMON_PRE_CONFIG_FRAG
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OR1K_OBJS = \
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or1k.o \
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arch.o \
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cpu.o \
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decode.o \
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model.o \
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sem.o \
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mloop.o \
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sim-if.o \
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traps.o
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SIM_OBJS = \
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$(SIM_NEW_COMMON_OBJS) \
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sim-cpu.o \
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sim-hload.o \
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sim-hrw.o \
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sim-reg.o \
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cgen-utils.o \
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cgen-trace.o \
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cgen-scache.o \
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cgen-run.o \
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cgen-fpu.o \
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cgen-accfp.o \
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sim-reason.o \
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sim-engine.o \
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sim-model.o \
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sim-stop.o \
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$(TRAPS_OBJ)
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SIM_OBJS += $(OR1K_OBJS)
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# Extra headers included by sim-main.h.
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SIM_EXTRA_DEPS = \
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$(CGEN_INCLUDE_DEPS) \
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or1k-sim.h \
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$(srcdir)/../../opcodes/or1k-desc.h \
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arch.h \
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cpuall.h \
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decode.h
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SIM_EXTRA_CFLAGS =
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SIM_EXTRA_LIBS = -lm
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SIM_RUN_OBJS = nrun.o
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SIM_EXTRA_CLEAN = or1k-clean
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## COMMON_POST_CONFIG_FRAG
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arch = or1k
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# or1k32bf
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OR1K32BF_INCLUDE_DEPS = \
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$(CGEN_MAIN_CPU_DEPS) \
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cpu.h \
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decode.h \
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eng.h
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mloop.c eng.h: stamp-mloop ; @true
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stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
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$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
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-mono -fast -pbb -switch sem-switch.c \
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-cpu or1k32bf -infile $(srcdir)/mloop.in
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$(SHELL) $(srcroot)/move-if-change eng.hin eng.h
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$(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
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touch stamp-mloop
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mloop.o: mloop.c sem-switch.c $(OR1K32BF_INCLUDE_DEPS)
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or1k.o: or1k.c $(OR1K32BF_INCLUDE_DEPS)
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$(COMPILE) $<
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$(POSTCOMPILE)
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arch.o: arch.c $(SIM_MAIN_DEPS)
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cpu.o: cpu.c $(OR1K32BF_INCLUDE_DEPS)
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decode.o: decode.c $(OR1K32BF_INCLUDE_DEPS)
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sem.o: sem.c $(OR1K32BF_INCLUDE_DEPS)
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sem-switch.o: sem-switch.c $(OR1K32BF_INCLUDE_DEPS)
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model.o: model.c $(OR1K32BF_INCLUDE_DEPS)
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sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h eng.h
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$(COMPILE) $<
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$(POSTCOMPILE)
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traps.o: traps.c $(SIM_MAIN_DEPS) eng.h
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$(COMPILE) $<
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$(POSTCOMPILE)
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or1k-clean:
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rm -f mloop.c eng.h stamp-mloop
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# cgen support, enable with --enable-cgen-maint
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CGEN_MAINT = ; @true
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# The following line is commented in or out depending upon --enable-cgen-maint.
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@CGEN_MAINT@CGEN_MAINT =
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stamps: stamp-arch stamp-cpu stamp-mloop
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# NOTE: Generated source files are specified as full paths,
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# e.g. $(srcdir)/arch.c, because make may decide the files live
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# in objdir otherwise.
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OR1K_CGEN_DEPS = \
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$(CPU_DIR)/or1k.cpu \
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$(CPU_DIR)/or1k.opc \
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$(CPU_DIR)/or1kcommon.cpu \
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$(CPU_DIR)/or1korbis.cpu \
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$(CPU_DIR)/or1korfpx.cpu \
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Makefile
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stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(OR1K_CGEN_DEPS)
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$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) \
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mach=or32,or32nd \
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archfile=$(CPU_DIR)/or1k.cpu \
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FLAGS="with-scache"
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touch $@
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$(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
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@true
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stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(OR1K_CGEN_DEPS)
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$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
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cpu=or1k32bf \
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mach=or32,or32nd \
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archfile=$(CPU_DIR)/or1k.cpu \
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FLAGS="with-scache" \
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EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
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touch $@
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$(srcdir)/cpu.h $(srcdir)/cpu.c $(srcdir)/model.c $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
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@true
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