e2882c8578
gdb/ChangeLog: Update copyright year range in all GDB files
1168 lines
34 KiB
C
1168 lines
34 KiB
C
/* Target-dependent code for the Renesas RX for GDB, the GNU debugger.
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Copyright (C) 2008-2018 Free Software Foundation, Inc.
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Contributed by Red Hat, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "arch-utils.h"
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#include "prologue-value.h"
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#include "target.h"
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#include "regcache.h"
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#include "opcode/rx.h"
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#include "dis-asm.h"
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#include "gdbtypes.h"
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#include "frame.h"
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#include "frame-unwind.h"
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#include "frame-base.h"
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#include "value.h"
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#include "gdbcore.h"
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#include "dwarf2-frame.h"
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#include "elf/rx.h"
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#include "elf-bfd.h"
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#include <algorithm>
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/* Certain important register numbers. */
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enum
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{
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RX_SP_REGNUM = 0,
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RX_R1_REGNUM = 1,
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RX_R4_REGNUM = 4,
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RX_FP_REGNUM = 6,
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RX_R15_REGNUM = 15,
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RX_USP_REGNUM = 16,
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RX_PSW_REGNUM = 18,
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RX_PC_REGNUM = 19,
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RX_BPSW_REGNUM = 21,
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RX_BPC_REGNUM = 22,
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RX_FPSW_REGNUM = 24,
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RX_ACC_REGNUM = 25,
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RX_NUM_REGS = 26
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};
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/* RX frame types. */
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enum rx_frame_type {
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RX_FRAME_TYPE_NORMAL,
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RX_FRAME_TYPE_EXCEPTION,
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RX_FRAME_TYPE_FAST_INTERRUPT
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};
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/* Architecture specific data. */
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struct gdbarch_tdep
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{
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/* The ELF header flags specify the multilib used. */
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int elf_flags;
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/* Type of PSW and BPSW. */
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struct type *rx_psw_type;
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/* Type of FPSW. */
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struct type *rx_fpsw_type;
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};
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/* This structure holds the results of a prologue analysis. */
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struct rx_prologue
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{
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/* Frame type, either a normal frame or one of two types of exception
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frames. */
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enum rx_frame_type frame_type;
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/* The offset from the frame base to the stack pointer --- always
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zero or negative.
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Calling this a "size" is a bit misleading, but given that the
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stack grows downwards, using offsets for everything keeps one
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from going completely sign-crazy: you never change anything's
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sign for an ADD instruction; always change the second operand's
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sign for a SUB instruction; and everything takes care of
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itself. */
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int frame_size;
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/* Non-zero if this function has initialized the frame pointer from
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the stack pointer, zero otherwise. */
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int has_frame_ptr;
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/* If has_frame_ptr is non-zero, this is the offset from the frame
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base to where the frame pointer points. This is always zero or
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negative. */
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int frame_ptr_offset;
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/* The address of the first instruction at which the frame has been
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set up and the arguments are where the debug info says they are
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--- as best as we can tell. */
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CORE_ADDR prologue_end;
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/* reg_offset[R] is the offset from the CFA at which register R is
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saved, or 1 if register R has not been saved. (Real values are
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always zero or negative.) */
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int reg_offset[RX_NUM_REGS];
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};
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/* Implement the "register_name" gdbarch method. */
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static const char *
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rx_register_name (struct gdbarch *gdbarch, int regnr)
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{
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static const char *const reg_names[] = {
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"r0",
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"r1",
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"r2",
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"r3",
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"r4",
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"r5",
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"r6",
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"r7",
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"r8",
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"r9",
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"r10",
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"r11",
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"r12",
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"r13",
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"r14",
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"r15",
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"usp",
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"isp",
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"psw",
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"pc",
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"intb",
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"bpsw",
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"bpc",
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"fintv",
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"fpsw",
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"acc"
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};
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return reg_names[regnr];
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}
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/* Construct the flags type for PSW and BPSW. */
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static struct type *
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rx_psw_type (struct gdbarch *gdbarch)
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{
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struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
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if (tdep->rx_psw_type == NULL)
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{
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tdep->rx_psw_type = arch_flags_type (gdbarch, "rx_psw_type", 32);
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append_flags_type_flag (tdep->rx_psw_type, 0, "C");
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append_flags_type_flag (tdep->rx_psw_type, 1, "Z");
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append_flags_type_flag (tdep->rx_psw_type, 2, "S");
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append_flags_type_flag (tdep->rx_psw_type, 3, "O");
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append_flags_type_flag (tdep->rx_psw_type, 16, "I");
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append_flags_type_flag (tdep->rx_psw_type, 17, "U");
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append_flags_type_flag (tdep->rx_psw_type, 20, "PM");
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append_flags_type_flag (tdep->rx_psw_type, 24, "IPL0");
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append_flags_type_flag (tdep->rx_psw_type, 25, "IPL1");
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append_flags_type_flag (tdep->rx_psw_type, 26, "IPL2");
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append_flags_type_flag (tdep->rx_psw_type, 27, "IPL3");
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}
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return tdep->rx_psw_type;
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}
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/* Construct flags type for FPSW. */
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static struct type *
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rx_fpsw_type (struct gdbarch *gdbarch)
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{
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struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
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if (tdep->rx_fpsw_type == NULL)
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{
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tdep->rx_fpsw_type = arch_flags_type (gdbarch, "rx_fpsw_type", 32);
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append_flags_type_flag (tdep->rx_fpsw_type, 0, "RM0");
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append_flags_type_flag (tdep->rx_fpsw_type, 1, "RM1");
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append_flags_type_flag (tdep->rx_fpsw_type, 2, "CV");
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append_flags_type_flag (tdep->rx_fpsw_type, 3, "CO");
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append_flags_type_flag (tdep->rx_fpsw_type, 4, "CZ");
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append_flags_type_flag (tdep->rx_fpsw_type, 5, "CU");
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append_flags_type_flag (tdep->rx_fpsw_type, 6, "CX");
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append_flags_type_flag (tdep->rx_fpsw_type, 7, "CE");
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append_flags_type_flag (tdep->rx_fpsw_type, 8, "DN");
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append_flags_type_flag (tdep->rx_fpsw_type, 10, "EV");
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append_flags_type_flag (tdep->rx_fpsw_type, 11, "EO");
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append_flags_type_flag (tdep->rx_fpsw_type, 12, "EZ");
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append_flags_type_flag (tdep->rx_fpsw_type, 13, "EU");
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append_flags_type_flag (tdep->rx_fpsw_type, 14, "EX");
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append_flags_type_flag (tdep->rx_fpsw_type, 26, "FV");
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append_flags_type_flag (tdep->rx_fpsw_type, 27, "FO");
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append_flags_type_flag (tdep->rx_fpsw_type, 28, "FZ");
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append_flags_type_flag (tdep->rx_fpsw_type, 29, "FU");
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append_flags_type_flag (tdep->rx_fpsw_type, 30, "FX");
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append_flags_type_flag (tdep->rx_fpsw_type, 31, "FS");
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}
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return tdep->rx_fpsw_type;
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}
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/* Implement the "register_type" gdbarch method. */
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static struct type *
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rx_register_type (struct gdbarch *gdbarch, int reg_nr)
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{
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if (reg_nr == RX_PC_REGNUM)
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return builtin_type (gdbarch)->builtin_func_ptr;
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else if (reg_nr == RX_PSW_REGNUM || reg_nr == RX_BPSW_REGNUM)
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return rx_psw_type (gdbarch);
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else if (reg_nr == RX_FPSW_REGNUM)
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return rx_fpsw_type (gdbarch);
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else if (reg_nr == RX_ACC_REGNUM)
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return builtin_type (gdbarch)->builtin_unsigned_long_long;
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else
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return builtin_type (gdbarch)->builtin_unsigned_long;
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}
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/* Function for finding saved registers in a 'struct pv_area'; this
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function is passed to pv_area::scan.
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If VALUE is a saved register, ADDR says it was saved at a constant
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offset from the frame base, and SIZE indicates that the whole
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register was saved, record its offset. */
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static void
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check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value)
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{
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struct rx_prologue *result = (struct rx_prologue *) result_untyped;
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if (value.kind == pvk_register
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&& value.k == 0
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&& pv_is_register (addr, RX_SP_REGNUM)
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&& size == register_size (target_gdbarch (), value.reg))
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result->reg_offset[value.reg] = addr.k;
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}
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/* Define a "handle" struct for fetching the next opcode. */
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struct rx_get_opcode_byte_handle
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{
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CORE_ADDR pc;
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};
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/* Fetch a byte on behalf of the opcode decoder. HANDLE contains
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the memory address of the next byte to fetch. If successful,
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the address in the handle is updated and the byte fetched is
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returned as the value of the function. If not successful, -1
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is returned. */
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static int
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rx_get_opcode_byte (void *handle)
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{
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struct rx_get_opcode_byte_handle *opcdata
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= (struct rx_get_opcode_byte_handle *) handle;
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int status;
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gdb_byte byte;
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status = target_read_code (opcdata->pc, &byte, 1);
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if (status == 0)
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{
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opcdata->pc += 1;
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return byte;
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}
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else
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return -1;
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}
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/* Analyze a prologue starting at START_PC, going no further than
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LIMIT_PC. Fill in RESULT as appropriate. */
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static void
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rx_analyze_prologue (CORE_ADDR start_pc, CORE_ADDR limit_pc,
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enum rx_frame_type frame_type,
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struct rx_prologue *result)
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{
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CORE_ADDR pc, next_pc;
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int rn;
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pv_t reg[RX_NUM_REGS];
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CORE_ADDR after_last_frame_setup_insn = start_pc;
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memset (result, 0, sizeof (*result));
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result->frame_type = frame_type;
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for (rn = 0; rn < RX_NUM_REGS; rn++)
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{
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reg[rn] = pv_register (rn, 0);
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result->reg_offset[rn] = 1;
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}
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pv_area stack (RX_SP_REGNUM, gdbarch_addr_bit (target_gdbarch ()));
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if (frame_type == RX_FRAME_TYPE_FAST_INTERRUPT)
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{
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/* This code won't do anything useful at present, but this is
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what happens for fast interrupts. */
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reg[RX_BPSW_REGNUM] = reg[RX_PSW_REGNUM];
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reg[RX_BPC_REGNUM] = reg[RX_PC_REGNUM];
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}
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else
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{
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/* When an exception occurs, the PSW is saved to the interrupt stack
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first. */
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if (frame_type == RX_FRAME_TYPE_EXCEPTION)
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{
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reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4);
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stack.store (reg[RX_SP_REGNUM], 4, reg[RX_PSW_REGNUM]);
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}
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/* The call instruction (or an exception/interrupt) has saved the return
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address on the stack. */
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reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4);
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stack.store (reg[RX_SP_REGNUM], 4, reg[RX_PC_REGNUM]);
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}
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pc = start_pc;
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while (pc < limit_pc)
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{
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int bytes_read;
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struct rx_get_opcode_byte_handle opcode_handle;
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RX_Opcode_Decoded opc;
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opcode_handle.pc = pc;
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bytes_read = rx_decode_opcode (pc, &opc, rx_get_opcode_byte,
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&opcode_handle);
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next_pc = pc + bytes_read;
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if (opc.id == RXO_pushm /* pushm r1, r2 */
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&& opc.op[1].type == RX_Operand_Register
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&& opc.op[2].type == RX_Operand_Register)
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{
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int r1, r2;
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int r;
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r1 = opc.op[1].reg;
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r2 = opc.op[2].reg;
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for (r = r2; r >= r1; r--)
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{
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reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4);
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stack.store (reg[RX_SP_REGNUM], 4, reg[r]);
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}
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after_last_frame_setup_insn = next_pc;
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}
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else if (opc.id == RXO_mov /* mov.l rdst, rsrc */
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&& opc.op[0].type == RX_Operand_Register
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&& opc.op[1].type == RX_Operand_Register
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&& opc.size == RX_Long)
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{
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int rdst, rsrc;
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rdst = opc.op[0].reg;
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rsrc = opc.op[1].reg;
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reg[rdst] = reg[rsrc];
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if (rdst == RX_FP_REGNUM && rsrc == RX_SP_REGNUM)
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after_last_frame_setup_insn = next_pc;
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}
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else if (opc.id == RXO_mov /* mov.l rsrc, [-SP] */
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&& opc.op[0].type == RX_Operand_Predec
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&& opc.op[0].reg == RX_SP_REGNUM
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&& opc.op[1].type == RX_Operand_Register
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&& opc.size == RX_Long)
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{
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int rsrc;
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rsrc = opc.op[1].reg;
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reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4);
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stack.store (reg[RX_SP_REGNUM], 4, reg[rsrc]);
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after_last_frame_setup_insn = next_pc;
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}
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else if (opc.id == RXO_add /* add #const, rsrc, rdst */
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&& opc.op[0].type == RX_Operand_Register
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&& opc.op[1].type == RX_Operand_Immediate
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&& opc.op[2].type == RX_Operand_Register)
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{
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int rdst = opc.op[0].reg;
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int addend = opc.op[1].addend;
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int rsrc = opc.op[2].reg;
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reg[rdst] = pv_add_constant (reg[rsrc], addend);
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/* Negative adjustments to the stack pointer or frame pointer
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are (most likely) part of the prologue. */
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if ((rdst == RX_SP_REGNUM || rdst == RX_FP_REGNUM) && addend < 0)
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after_last_frame_setup_insn = next_pc;
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}
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else if (opc.id == RXO_mov
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&& opc.op[0].type == RX_Operand_Indirect
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&& opc.op[1].type == RX_Operand_Register
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&& opc.size == RX_Long
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&& (opc.op[0].reg == RX_SP_REGNUM
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|| opc.op[0].reg == RX_FP_REGNUM)
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&& (RX_R1_REGNUM <= opc.op[1].reg
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&& opc.op[1].reg <= RX_R4_REGNUM))
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{
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/* This moves an argument register to the stack. Don't
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record it, but allow it to be a part of the prologue. */
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}
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else if (opc.id == RXO_branch
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&& opc.op[0].type == RX_Operand_Immediate
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&& next_pc < opc.op[0].addend)
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{
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/* When a loop appears as the first statement of a function
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body, gcc 4.x will use a BRA instruction to branch to the
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loop condition checking code. This BRA instruction is
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marked as part of the prologue. We therefore set next_pc
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to this branch target and also stop the prologue scan.
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The instructions at and beyond the branch target should
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no longer be associated with the prologue.
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Note that we only consider forward branches here. We
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presume that a forward branch is being used to skip over
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a loop body.
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A backwards branch is covered by the default case below.
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If we were to encounter a backwards branch, that would
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most likely mean that we've scanned through a loop body.
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We definitely want to stop the prologue scan when this
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happens and that is precisely what is done by the default
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case below. */
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after_last_frame_setup_insn = opc.op[0].addend;
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break; /* Scan no further if we hit this case. */
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}
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else
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{
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/* Terminate the prologue scan. */
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break;
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}
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pc = next_pc;
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}
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/* Is the frame size (offset, really) a known constant? */
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if (pv_is_register (reg[RX_SP_REGNUM], RX_SP_REGNUM))
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result->frame_size = reg[RX_SP_REGNUM].k;
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/* Was the frame pointer initialized? */
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if (pv_is_register (reg[RX_FP_REGNUM], RX_SP_REGNUM))
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{
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result->has_frame_ptr = 1;
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result->frame_ptr_offset = reg[RX_FP_REGNUM].k;
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}
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/* Record where all the registers were saved. */
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stack.scan (check_for_saved, (void *) result);
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result->prologue_end = after_last_frame_setup_insn;
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}
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/* Implement the "skip_prologue" gdbarch method. */
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static CORE_ADDR
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rx_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
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{
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const char *name;
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CORE_ADDR func_addr, func_end;
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struct rx_prologue p;
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/* Try to find the extent of the function that contains PC. */
|
|
if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
|
|
return pc;
|
|
|
|
/* The frame type doesn't matter here, since we only care about
|
|
where the prologue ends. We'll use RX_FRAME_TYPE_NORMAL. */
|
|
rx_analyze_prologue (pc, func_end, RX_FRAME_TYPE_NORMAL, &p);
|
|
return p.prologue_end;
|
|
}
|
|
|
|
/* Given a frame described by THIS_FRAME, decode the prologue of its
|
|
associated function if there is not cache entry as specified by
|
|
THIS_PROLOGUE_CACHE. Save the decoded prologue in the cache and
|
|
return that struct as the value of this function. */
|
|
|
|
static struct rx_prologue *
|
|
rx_analyze_frame_prologue (struct frame_info *this_frame,
|
|
enum rx_frame_type frame_type,
|
|
void **this_prologue_cache)
|
|
{
|
|
if (!*this_prologue_cache)
|
|
{
|
|
CORE_ADDR func_start, stop_addr;
|
|
|
|
*this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct rx_prologue);
|
|
|
|
func_start = get_frame_func (this_frame);
|
|
stop_addr = get_frame_pc (this_frame);
|
|
|
|
/* If we couldn't find any function containing the PC, then
|
|
just initialize the prologue cache, but don't do anything. */
|
|
if (!func_start)
|
|
stop_addr = func_start;
|
|
|
|
rx_analyze_prologue (func_start, stop_addr, frame_type,
|
|
(struct rx_prologue *) *this_prologue_cache);
|
|
}
|
|
|
|
return (struct rx_prologue *) *this_prologue_cache;
|
|
}
|
|
|
|
/* Determine type of frame by scanning the function for a return
|
|
instruction. */
|
|
|
|
static enum rx_frame_type
|
|
rx_frame_type (struct frame_info *this_frame, void **this_cache)
|
|
{
|
|
const char *name;
|
|
CORE_ADDR pc, start_pc, lim_pc;
|
|
int bytes_read;
|
|
struct rx_get_opcode_byte_handle opcode_handle;
|
|
RX_Opcode_Decoded opc;
|
|
|
|
gdb_assert (this_cache != NULL);
|
|
|
|
/* If we have a cached value, return it. */
|
|
|
|
if (*this_cache != NULL)
|
|
{
|
|
struct rx_prologue *p = (struct rx_prologue *) *this_cache;
|
|
|
|
return p->frame_type;
|
|
}
|
|
|
|
/* No cached value; scan the function. The frame type is cached in
|
|
rx_analyze_prologue / rx_analyze_frame_prologue. */
|
|
|
|
pc = get_frame_pc (this_frame);
|
|
|
|
/* Attempt to find the last address in the function. If it cannot
|
|
be determined, set the limit to be a short ways past the frame's
|
|
pc. */
|
|
if (!find_pc_partial_function (pc, &name, &start_pc, &lim_pc))
|
|
lim_pc = pc + 20;
|
|
|
|
while (pc < lim_pc)
|
|
{
|
|
opcode_handle.pc = pc;
|
|
bytes_read = rx_decode_opcode (pc, &opc, rx_get_opcode_byte,
|
|
&opcode_handle);
|
|
|
|
if (bytes_read <= 0 || opc.id == RXO_rts)
|
|
return RX_FRAME_TYPE_NORMAL;
|
|
else if (opc.id == RXO_rtfi)
|
|
return RX_FRAME_TYPE_FAST_INTERRUPT;
|
|
else if (opc.id == RXO_rte)
|
|
return RX_FRAME_TYPE_EXCEPTION;
|
|
|
|
pc += bytes_read;
|
|
}
|
|
|
|
return RX_FRAME_TYPE_NORMAL;
|
|
}
|
|
|
|
|
|
/* Given the next frame and a prologue cache, return this frame's
|
|
base. */
|
|
|
|
static CORE_ADDR
|
|
rx_frame_base (struct frame_info *this_frame, void **this_cache)
|
|
{
|
|
enum rx_frame_type frame_type = rx_frame_type (this_frame, this_cache);
|
|
struct rx_prologue *p
|
|
= rx_analyze_frame_prologue (this_frame, frame_type, this_cache);
|
|
|
|
/* In functions that use alloca, the distance between the stack
|
|
pointer and the frame base varies dynamically, so we can't use
|
|
the SP plus static information like prologue analysis to find the
|
|
frame base. However, such functions must have a frame pointer,
|
|
to be able to restore the SP on exit. So whenever we do have a
|
|
frame pointer, use that to find the base. */
|
|
if (p->has_frame_ptr)
|
|
{
|
|
CORE_ADDR fp = get_frame_register_unsigned (this_frame, RX_FP_REGNUM);
|
|
return fp - p->frame_ptr_offset;
|
|
}
|
|
else
|
|
{
|
|
CORE_ADDR sp = get_frame_register_unsigned (this_frame, RX_SP_REGNUM);
|
|
return sp - p->frame_size;
|
|
}
|
|
}
|
|
|
|
/* Implement the "frame_this_id" method for unwinding frames. */
|
|
|
|
static void
|
|
rx_frame_this_id (struct frame_info *this_frame, void **this_cache,
|
|
struct frame_id *this_id)
|
|
{
|
|
*this_id = frame_id_build (rx_frame_base (this_frame, this_cache),
|
|
get_frame_func (this_frame));
|
|
}
|
|
|
|
/* Implement the "frame_prev_register" method for unwinding frames. */
|
|
|
|
static struct value *
|
|
rx_frame_prev_register (struct frame_info *this_frame, void **this_cache,
|
|
int regnum)
|
|
{
|
|
enum rx_frame_type frame_type = rx_frame_type (this_frame, this_cache);
|
|
struct rx_prologue *p
|
|
= rx_analyze_frame_prologue (this_frame, frame_type, this_cache);
|
|
CORE_ADDR frame_base = rx_frame_base (this_frame, this_cache);
|
|
|
|
if (regnum == RX_SP_REGNUM)
|
|
{
|
|
if (frame_type == RX_FRAME_TYPE_EXCEPTION)
|
|
{
|
|
struct value *psw_val;
|
|
CORE_ADDR psw;
|
|
|
|
psw_val = rx_frame_prev_register (this_frame, this_cache,
|
|
RX_PSW_REGNUM);
|
|
psw = extract_unsigned_integer (value_contents_all (psw_val), 4,
|
|
gdbarch_byte_order (
|
|
get_frame_arch (this_frame)));
|
|
|
|
if ((psw & 0x20000 /* U bit */) != 0)
|
|
return rx_frame_prev_register (this_frame, this_cache,
|
|
RX_USP_REGNUM);
|
|
|
|
/* Fall through for the case where U bit is zero. */
|
|
}
|
|
|
|
return frame_unwind_got_constant (this_frame, regnum, frame_base);
|
|
}
|
|
|
|
if (frame_type == RX_FRAME_TYPE_FAST_INTERRUPT)
|
|
{
|
|
if (regnum == RX_PC_REGNUM)
|
|
return rx_frame_prev_register (this_frame, this_cache,
|
|
RX_BPC_REGNUM);
|
|
if (regnum == RX_PSW_REGNUM)
|
|
return rx_frame_prev_register (this_frame, this_cache,
|
|
RX_BPSW_REGNUM);
|
|
}
|
|
|
|
/* If prologue analysis says we saved this register somewhere,
|
|
return a description of the stack slot holding it. */
|
|
if (p->reg_offset[regnum] != 1)
|
|
return frame_unwind_got_memory (this_frame, regnum,
|
|
frame_base + p->reg_offset[regnum]);
|
|
|
|
/* Otherwise, presume we haven't changed the value of this
|
|
register, and get it from the next frame. */
|
|
return frame_unwind_got_register (this_frame, regnum, regnum);
|
|
}
|
|
|
|
/* Return TRUE if the frame indicated by FRAME_TYPE is a normal frame. */
|
|
|
|
static int
|
|
normal_frame_p (enum rx_frame_type frame_type)
|
|
{
|
|
return (frame_type == RX_FRAME_TYPE_NORMAL);
|
|
}
|
|
|
|
/* Return TRUE if the frame indicated by FRAME_TYPE is an exception
|
|
frame. */
|
|
|
|
static int
|
|
exception_frame_p (enum rx_frame_type frame_type)
|
|
{
|
|
return (frame_type == RX_FRAME_TYPE_EXCEPTION
|
|
|| frame_type == RX_FRAME_TYPE_FAST_INTERRUPT);
|
|
}
|
|
|
|
/* Common code used by both normal and exception frame sniffers. */
|
|
|
|
static int
|
|
rx_frame_sniffer_common (const struct frame_unwind *self,
|
|
struct frame_info *this_frame,
|
|
void **this_cache,
|
|
int (*sniff_p)(enum rx_frame_type) )
|
|
{
|
|
gdb_assert (this_cache != NULL);
|
|
|
|
if (*this_cache == NULL)
|
|
{
|
|
enum rx_frame_type frame_type = rx_frame_type (this_frame, this_cache);
|
|
|
|
if (sniff_p (frame_type))
|
|
{
|
|
/* The call below will fill in the cache, including the frame
|
|
type. */
|
|
(void) rx_analyze_frame_prologue (this_frame, frame_type, this_cache);
|
|
|
|
return 1;
|
|
}
|
|
else
|
|
return 0;
|
|
}
|
|
else
|
|
{
|
|
struct rx_prologue *p = (struct rx_prologue *) *this_cache;
|
|
|
|
return sniff_p (p->frame_type);
|
|
}
|
|
}
|
|
|
|
/* Frame sniffer for normal (non-exception) frames. */
|
|
|
|
static int
|
|
rx_frame_sniffer (const struct frame_unwind *self,
|
|
struct frame_info *this_frame,
|
|
void **this_cache)
|
|
{
|
|
return rx_frame_sniffer_common (self, this_frame, this_cache,
|
|
normal_frame_p);
|
|
}
|
|
|
|
/* Frame sniffer for exception frames. */
|
|
|
|
static int
|
|
rx_exception_sniffer (const struct frame_unwind *self,
|
|
struct frame_info *this_frame,
|
|
void **this_cache)
|
|
{
|
|
return rx_frame_sniffer_common (self, this_frame, this_cache,
|
|
exception_frame_p);
|
|
}
|
|
|
|
/* Data structure for normal code using instruction-based prologue
|
|
analyzer. */
|
|
|
|
static const struct frame_unwind rx_frame_unwind = {
|
|
NORMAL_FRAME,
|
|
default_frame_unwind_stop_reason,
|
|
rx_frame_this_id,
|
|
rx_frame_prev_register,
|
|
NULL,
|
|
rx_frame_sniffer
|
|
};
|
|
|
|
/* Data structure for exception code using instruction-based prologue
|
|
analyzer. */
|
|
|
|
static const struct frame_unwind rx_exception_unwind = {
|
|
/* SIGTRAMP_FRAME could be used here, but backtraces are less informative. */
|
|
NORMAL_FRAME,
|
|
default_frame_unwind_stop_reason,
|
|
rx_frame_this_id,
|
|
rx_frame_prev_register,
|
|
NULL,
|
|
rx_exception_sniffer
|
|
};
|
|
|
|
/* Implement the "unwind_pc" gdbarch method. */
|
|
static CORE_ADDR
|
|
rx_unwind_pc (struct gdbarch *gdbarch, struct frame_info *this_frame)
|
|
{
|
|
ULONGEST pc;
|
|
|
|
pc = frame_unwind_register_unsigned (this_frame, RX_PC_REGNUM);
|
|
return pc;
|
|
}
|
|
|
|
/* Implement the "unwind_sp" gdbarch method. */
|
|
static CORE_ADDR
|
|
rx_unwind_sp (struct gdbarch *gdbarch, struct frame_info *this_frame)
|
|
{
|
|
ULONGEST sp;
|
|
|
|
sp = frame_unwind_register_unsigned (this_frame, RX_SP_REGNUM);
|
|
return sp;
|
|
}
|
|
|
|
/* Implement the "dummy_id" gdbarch method. */
|
|
static struct frame_id
|
|
rx_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
|
|
{
|
|
return
|
|
frame_id_build (get_frame_register_unsigned (this_frame, RX_SP_REGNUM),
|
|
get_frame_pc (this_frame));
|
|
}
|
|
|
|
/* Implement the "push_dummy_call" gdbarch method. */
|
|
static CORE_ADDR
|
|
rx_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|
struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
|
|
struct value **args, CORE_ADDR sp, int struct_return,
|
|
CORE_ADDR struct_addr)
|
|
{
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
|
int write_pass;
|
|
int sp_off = 0;
|
|
CORE_ADDR cfa;
|
|
int num_register_candidate_args;
|
|
|
|
struct type *func_type = value_type (function);
|
|
|
|
/* Dereference function pointer types. */
|
|
while (TYPE_CODE (func_type) == TYPE_CODE_PTR)
|
|
func_type = TYPE_TARGET_TYPE (func_type);
|
|
|
|
/* The end result had better be a function or a method. */
|
|
gdb_assert (TYPE_CODE (func_type) == TYPE_CODE_FUNC
|
|
|| TYPE_CODE (func_type) == TYPE_CODE_METHOD);
|
|
|
|
/* Functions with a variable number of arguments have all of their
|
|
variable arguments and the last non-variable argument passed
|
|
on the stack.
|
|
|
|
Otherwise, we can pass up to four arguments on the stack.
|
|
|
|
Once computed, we leave this value alone. I.e. we don't update
|
|
it in case of a struct return going in a register or an argument
|
|
requiring multiple registers, etc. We rely instead on the value
|
|
of the ``arg_reg'' variable to get these other details correct. */
|
|
|
|
if (TYPE_VARARGS (func_type))
|
|
num_register_candidate_args = TYPE_NFIELDS (func_type) - 1;
|
|
else
|
|
num_register_candidate_args = 4;
|
|
|
|
/* We make two passes; the first does the stack allocation,
|
|
the second actually stores the arguments. */
|
|
for (write_pass = 0; write_pass <= 1; write_pass++)
|
|
{
|
|
int i;
|
|
int arg_reg = RX_R1_REGNUM;
|
|
|
|
if (write_pass)
|
|
sp = align_down (sp - sp_off, 4);
|
|
sp_off = 0;
|
|
|
|
if (struct_return)
|
|
{
|
|
struct type *return_type = TYPE_TARGET_TYPE (func_type);
|
|
|
|
gdb_assert (TYPE_CODE (return_type) == TYPE_CODE_STRUCT
|
|
|| TYPE_CODE (func_type) == TYPE_CODE_UNION);
|
|
|
|
if (TYPE_LENGTH (return_type) > 16
|
|
|| TYPE_LENGTH (return_type) % 4 != 0)
|
|
{
|
|
if (write_pass)
|
|
regcache_cooked_write_unsigned (regcache, RX_R15_REGNUM,
|
|
struct_addr);
|
|
}
|
|
}
|
|
|
|
/* Push the arguments. */
|
|
for (i = 0; i < nargs; i++)
|
|
{
|
|
struct value *arg = args[i];
|
|
const gdb_byte *arg_bits = value_contents_all (arg);
|
|
struct type *arg_type = check_typedef (value_type (arg));
|
|
ULONGEST arg_size = TYPE_LENGTH (arg_type);
|
|
|
|
if (i == 0 && struct_addr != 0 && !struct_return
|
|
&& TYPE_CODE (arg_type) == TYPE_CODE_PTR
|
|
&& extract_unsigned_integer (arg_bits, 4,
|
|
byte_order) == struct_addr)
|
|
{
|
|
/* This argument represents the address at which C++ (and
|
|
possibly other languages) store their return value.
|
|
Put this value in R15. */
|
|
if (write_pass)
|
|
regcache_cooked_write_unsigned (regcache, RX_R15_REGNUM,
|
|
struct_addr);
|
|
}
|
|
else if (TYPE_CODE (arg_type) != TYPE_CODE_STRUCT
|
|
&& TYPE_CODE (arg_type) != TYPE_CODE_UNION
|
|
&& arg_size <= 8)
|
|
{
|
|
/* Argument is a scalar. */
|
|
if (arg_size == 8)
|
|
{
|
|
if (i < num_register_candidate_args
|
|
&& arg_reg <= RX_R4_REGNUM - 1)
|
|
{
|
|
/* If argument registers are going to be used to pass
|
|
an 8 byte scalar, the ABI specifies that two registers
|
|
must be available. */
|
|
if (write_pass)
|
|
{
|
|
regcache_cooked_write_unsigned (regcache, arg_reg,
|
|
extract_unsigned_integer
|
|
(arg_bits, 4,
|
|
byte_order));
|
|
regcache_cooked_write_unsigned (regcache,
|
|
arg_reg + 1,
|
|
extract_unsigned_integer
|
|
(arg_bits + 4, 4,
|
|
byte_order));
|
|
}
|
|
arg_reg += 2;
|
|
}
|
|
else
|
|
{
|
|
sp_off = align_up (sp_off, 4);
|
|
/* Otherwise, pass the 8 byte scalar on the stack. */
|
|
if (write_pass)
|
|
write_memory (sp + sp_off, arg_bits, 8);
|
|
sp_off += 8;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
ULONGEST u;
|
|
|
|
gdb_assert (arg_size <= 4);
|
|
|
|
u =
|
|
extract_unsigned_integer (arg_bits, arg_size, byte_order);
|
|
|
|
if (i < num_register_candidate_args
|
|
&& arg_reg <= RX_R4_REGNUM)
|
|
{
|
|
if (write_pass)
|
|
regcache_cooked_write_unsigned (regcache, arg_reg, u);
|
|
arg_reg += 1;
|
|
}
|
|
else
|
|
{
|
|
int p_arg_size = 4;
|
|
|
|
if (TYPE_PROTOTYPED (func_type)
|
|
&& i < TYPE_NFIELDS (func_type))
|
|
{
|
|
struct type *p_arg_type =
|
|
TYPE_FIELD_TYPE (func_type, i);
|
|
p_arg_size = TYPE_LENGTH (p_arg_type);
|
|
}
|
|
|
|
sp_off = align_up (sp_off, p_arg_size);
|
|
|
|
if (write_pass)
|
|
write_memory_unsigned_integer (sp + sp_off,
|
|
p_arg_size, byte_order,
|
|
u);
|
|
sp_off += p_arg_size;
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Argument is a struct or union. Pass as much of the struct
|
|
in registers, if possible. Pass the rest on the stack. */
|
|
while (arg_size > 0)
|
|
{
|
|
if (i < num_register_candidate_args
|
|
&& arg_reg <= RX_R4_REGNUM
|
|
&& arg_size <= 4 * (RX_R4_REGNUM - arg_reg + 1)
|
|
&& arg_size % 4 == 0)
|
|
{
|
|
int len = std::min (arg_size, (ULONGEST) 4);
|
|
|
|
if (write_pass)
|
|
regcache_cooked_write_unsigned (regcache, arg_reg,
|
|
extract_unsigned_integer
|
|
(arg_bits, len,
|
|
byte_order));
|
|
arg_bits += len;
|
|
arg_size -= len;
|
|
arg_reg++;
|
|
}
|
|
else
|
|
{
|
|
sp_off = align_up (sp_off, 4);
|
|
if (write_pass)
|
|
write_memory (sp + sp_off, arg_bits, arg_size);
|
|
sp_off += align_up (arg_size, 4);
|
|
arg_size = 0;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Keep track of the stack address prior to pushing the return address.
|
|
This is the value that we'll return. */
|
|
cfa = sp;
|
|
|
|
/* Push the return address. */
|
|
sp = sp - 4;
|
|
write_memory_unsigned_integer (sp, 4, byte_order, bp_addr);
|
|
|
|
/* Update the stack pointer. */
|
|
regcache_cooked_write_unsigned (regcache, RX_SP_REGNUM, sp);
|
|
|
|
return cfa;
|
|
}
|
|
|
|
/* Implement the "return_value" gdbarch method. */
|
|
static enum return_value_convention
|
|
rx_return_value (struct gdbarch *gdbarch,
|
|
struct value *function,
|
|
struct type *valtype,
|
|
struct regcache *regcache,
|
|
gdb_byte *readbuf, const gdb_byte *writebuf)
|
|
{
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
|
ULONGEST valtype_len = TYPE_LENGTH (valtype);
|
|
|
|
if (TYPE_LENGTH (valtype) > 16
|
|
|| ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
|
|
|| TYPE_CODE (valtype) == TYPE_CODE_UNION)
|
|
&& TYPE_LENGTH (valtype) % 4 != 0))
|
|
return RETURN_VALUE_STRUCT_CONVENTION;
|
|
|
|
if (readbuf)
|
|
{
|
|
ULONGEST u;
|
|
int argreg = RX_R1_REGNUM;
|
|
int offset = 0;
|
|
|
|
while (valtype_len > 0)
|
|
{
|
|
int len = std::min (valtype_len, (ULONGEST) 4);
|
|
|
|
regcache_cooked_read_unsigned (regcache, argreg, &u);
|
|
store_unsigned_integer (readbuf + offset, len, byte_order, u);
|
|
valtype_len -= len;
|
|
offset += len;
|
|
argreg++;
|
|
}
|
|
}
|
|
|
|
if (writebuf)
|
|
{
|
|
ULONGEST u;
|
|
int argreg = RX_R1_REGNUM;
|
|
int offset = 0;
|
|
|
|
while (valtype_len > 0)
|
|
{
|
|
int len = std::min (valtype_len, (ULONGEST) 4);
|
|
|
|
u = extract_unsigned_integer (writebuf + offset, len, byte_order);
|
|
regcache_cooked_write_unsigned (regcache, argreg, u);
|
|
valtype_len -= len;
|
|
offset += len;
|
|
argreg++;
|
|
}
|
|
}
|
|
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
|
}
|
|
|
|
constexpr gdb_byte rx_break_insn[] = { 0x00 };
|
|
|
|
typedef BP_MANIPULATION (rx_break_insn) rx_breakpoint;
|
|
|
|
/* Implement the dwarf_reg_to_regnum" gdbarch method. */
|
|
|
|
static int
|
|
rx_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
|
|
{
|
|
if (0 <= reg && reg <= 15)
|
|
return reg;
|
|
else if (reg == 16)
|
|
return RX_PSW_REGNUM;
|
|
else if (reg == 17)
|
|
return RX_PC_REGNUM;
|
|
else
|
|
return -1;
|
|
}
|
|
|
|
/* Allocate and initialize a gdbarch object. */
|
|
static struct gdbarch *
|
|
rx_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
|
{
|
|
struct gdbarch *gdbarch;
|
|
struct gdbarch_tdep *tdep;
|
|
int elf_flags;
|
|
|
|
/* Extract the elf_flags if available. */
|
|
if (info.abfd != NULL
|
|
&& bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
|
|
elf_flags = elf_elfheader (info.abfd)->e_flags;
|
|
else
|
|
elf_flags = 0;
|
|
|
|
|
|
/* Try to find the architecture in the list of already defined
|
|
architectures. */
|
|
for (arches = gdbarch_list_lookup_by_info (arches, &info);
|
|
arches != NULL;
|
|
arches = gdbarch_list_lookup_by_info (arches->next, &info))
|
|
{
|
|
if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags)
|
|
continue;
|
|
|
|
return arches->gdbarch;
|
|
}
|
|
|
|
/* None found, create a new architecture from the information
|
|
provided. */
|
|
tdep = XCNEW (struct gdbarch_tdep);
|
|
gdbarch = gdbarch_alloc (&info, tdep);
|
|
tdep->elf_flags = elf_flags;
|
|
|
|
set_gdbarch_num_regs (gdbarch, RX_NUM_REGS);
|
|
set_gdbarch_num_pseudo_regs (gdbarch, 0);
|
|
set_gdbarch_register_name (gdbarch, rx_register_name);
|
|
set_gdbarch_register_type (gdbarch, rx_register_type);
|
|
set_gdbarch_pc_regnum (gdbarch, RX_PC_REGNUM);
|
|
set_gdbarch_sp_regnum (gdbarch, RX_SP_REGNUM);
|
|
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
|
|
set_gdbarch_decr_pc_after_break (gdbarch, 1);
|
|
set_gdbarch_breakpoint_kind_from_pc (gdbarch, rx_breakpoint::kind_from_pc);
|
|
set_gdbarch_sw_breakpoint_from_kind (gdbarch, rx_breakpoint::bp_from_kind);
|
|
set_gdbarch_skip_prologue (gdbarch, rx_skip_prologue);
|
|
|
|
set_gdbarch_unwind_pc (gdbarch, rx_unwind_pc);
|
|
set_gdbarch_unwind_sp (gdbarch, rx_unwind_sp);
|
|
|
|
/* Target builtin data types. */
|
|
set_gdbarch_char_signed (gdbarch, 0);
|
|
set_gdbarch_short_bit (gdbarch, 16);
|
|
set_gdbarch_int_bit (gdbarch, 32);
|
|
set_gdbarch_long_bit (gdbarch, 32);
|
|
set_gdbarch_long_long_bit (gdbarch, 64);
|
|
set_gdbarch_ptr_bit (gdbarch, 32);
|
|
set_gdbarch_float_bit (gdbarch, 32);
|
|
set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
|
|
if (elf_flags & E_FLAG_RX_64BIT_DOUBLES)
|
|
{
|
|
set_gdbarch_double_bit (gdbarch, 64);
|
|
set_gdbarch_long_double_bit (gdbarch, 64);
|
|
set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
|
|
set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double);
|
|
}
|
|
else
|
|
{
|
|
set_gdbarch_double_bit (gdbarch, 32);
|
|
set_gdbarch_long_double_bit (gdbarch, 32);
|
|
set_gdbarch_double_format (gdbarch, floatformats_ieee_single);
|
|
set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single);
|
|
}
|
|
|
|
/* DWARF register mapping. */
|
|
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, rx_dwarf_reg_to_regnum);
|
|
|
|
/* Frame unwinding. */
|
|
frame_unwind_append_unwinder (gdbarch, &rx_exception_unwind);
|
|
dwarf2_append_unwinders (gdbarch);
|
|
frame_unwind_append_unwinder (gdbarch, &rx_frame_unwind);
|
|
|
|
/* Methods for saving / extracting a dummy frame's ID.
|
|
The ID's stack address must match the SP value returned by
|
|
PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
|
|
set_gdbarch_dummy_id (gdbarch, rx_dummy_id);
|
|
set_gdbarch_push_dummy_call (gdbarch, rx_push_dummy_call);
|
|
set_gdbarch_return_value (gdbarch, rx_return_value);
|
|
|
|
/* Virtual tables. */
|
|
set_gdbarch_vbit_in_delta (gdbarch, 1);
|
|
|
|
return gdbarch;
|
|
}
|
|
|
|
/* Register the above initialization routine. */
|
|
|
|
void
|
|
_initialize_rx_tdep (void)
|
|
{
|
|
register_gdbarch_init (bfd_arch_rx, rx_gdbarch_init);
|
|
}
|