346 lines
9.3 KiB
Plaintext
346 lines
9.3 KiB
Plaintext
# Copyright 2017 Free Software Foundation, Inc.
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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# Test reading/writing variables with non-trivial DWARF locations. In
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# particular the test uses register- and memory locations as well as
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# composite locations with register- and memory pieces.
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load_lib dwarf.exp
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# This test can only be run on targets which support DWARF-2 and use gas.
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if {![dwarf2_support]} {
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return 0
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}
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# Choose suitable integer registers for the test.
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set dwarf_regnum {0 1}
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if { [is_aarch64_target] } {
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set regname {x0 x1}
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} elseif { [is_aarch32_target]
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|| [istarget "s390*-*-*" ]
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|| [istarget "powerpc*-*-*"]
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|| [istarget "rs6000*-*-aix*"] } {
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set regname {r0 r1}
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} elseif { [is_x86_like_target] } {
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set regname {eax ecx}
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} elseif { [is_amd64_regs_target] } {
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set regname {rax rdx}
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} else {
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verbose "Skipping tests for accessing DWARF-described variables."
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return
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}
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standard_testfile .c ${gdb_test_file_name}-dw.S
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# Make some DWARF for the test.
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set asm_file [standard_output_file $srcfile2]
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Dwarf::assemble $asm_file {
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global srcdir subdir srcfile
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global dwarf_regnum regname
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set buf_var [gdb_target_symbol buf]
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cu {} {
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DW_TAG_compile_unit {
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{DW_AT_name var-pieces-dw.c}
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{DW_AT_comp_dir /tmp}
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} {
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declare_labels char_type_label
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declare_labels int_type_label short_type_label
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declare_labels array_a8_label struct_s_label struct_t_label
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declare_labels struct_st_label
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# char
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char_type_label: base_type {
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{name "char"}
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{encoding @DW_ATE_unsigned_char}
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{byte_size 1 DW_FORM_sdata}
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}
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# int
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int_type_label: base_type {
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{name "int"}
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{encoding @DW_ATE_signed}
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{byte_size 4 DW_FORM_sdata}
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}
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# char [8]
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array_a8_label: array_type {
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{type :$char_type_label}
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} {
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subrange_type {
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{type :$int_type_label}
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{upper_bound 7 DW_FORM_udata}
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}
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}
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# struct s { char a, b, c, d; };
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struct_s_label: structure_type {
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{name "s"}
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{byte_size 4 DW_FORM_sdata}
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} {
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member {
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{name "a"}
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{type :$char_type_label}
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{data_member_location 0 DW_FORM_udata}
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}
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member {
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{name "b"}
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{type :$char_type_label}
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{data_member_location 1 DW_FORM_udata}
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}
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member {
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{name "c"}
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{type :$char_type_label}
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{data_member_location 2 DW_FORM_udata}
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}
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member {
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{name "d"}
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{type :$char_type_label}
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{data_member_location 3 DW_FORM_udata}
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}
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}
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# struct t { int u, x:9, y:13, z:10; };
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struct_t_label: structure_type {
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{name "t"}
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{byte_size 8 DW_FORM_sdata}
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} {
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member {
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{name "u"}
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{type :$int_type_label}
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}
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member {
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{name "x"}
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{type :$int_type_label}
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{data_member_location 4 DW_FORM_udata}
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{bit_size 9 DW_FORM_udata}
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}
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member {
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{name "y"}
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{type :$int_type_label}
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{data_bit_offset 41 DW_FORM_udata}
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{bit_size 13 DW_FORM_udata}
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}
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member {
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{name "z"}
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{type :$int_type_label}
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{data_bit_offset 54 DW_FORM_udata}
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{bit_size 10 DW_FORM_udata}
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}
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}
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# struct st { struct s s; struct t t; };
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struct_st_label: structure_type {
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{name "st"}
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{byte_size 12 DW_FORM_udata}
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} {
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member {
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{name "s"}
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{type :$struct_s_label}
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}
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member {
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{name "t"}
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{type :$struct_t_label}
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{data_member_location 4 DW_FORM_udata}
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}
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}
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DW_TAG_subprogram {
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{MACRO_AT_func { main ${srcdir}/${subdir}/${srcfile} }}
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{DW_AT_external 1 flag}
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} {
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# Simple memory location.
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DW_TAG_variable {
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{name "a"}
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{type :$array_a8_label}
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{location {
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addr $buf_var
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} SPECIAL_expr}
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}
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# Memory pieces: two bytes from &buf[2], and two bytes
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# from &buf[0].
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DW_TAG_variable {
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{name "s1"}
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{type :$struct_s_label}
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{location {
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addr $buf_var
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plus_uconst 2
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piece 2
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addr $buf_var
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piece 2
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} SPECIAL_expr}
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}
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# Register- and memory pieces: one byte each from r0,
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# &buf[4], r1, and &buf[5].
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DW_TAG_variable {
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{name "s2"}
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{type :$struct_s_label}
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{location {
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regx [lindex $dwarf_regnum 0]
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piece 1
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addr "$buf_var + 4"
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piece 1
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regx [lindex $dwarf_regnum 1]
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piece 1
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addr "$buf_var + 5"
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piece 1
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} SPECIAL_expr}
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}
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# Memory pieces for bitfield access: 8 bytes optimized
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# out, 3 bytes from &buf[3], and 1 byte from &buf[1].
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DW_TAG_variable {
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{name "st1"}
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{type :$struct_st_label}
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{location {
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piece 8
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addr "$buf_var + 3"
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piece 3
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addr "$buf_var + 1"
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piece 1
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} SPECIAL_expr}
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}
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# Register pieces for bitfield access: 4 bytes optimized
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# out, 3 bytes from r0, and 1 byte from r1.
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DW_TAG_variable {
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{name "t2"}
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{type :$struct_t_label}
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{location {
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piece 4
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regx [lindex $dwarf_regnum 0]
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piece 3
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regx [lindex $dwarf_regnum 1]
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piece 1
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} SPECIAL_expr}
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}
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# One piece per bitfield, using piece offsets: 32 bits of
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# an implicit value, 9 bits of a stack value, 13 bits of
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# r0, and 10 bits of buf.
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DW_TAG_variable {
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{name "t3"}
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{type :$struct_t_label}
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{location {
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implicit_value 0x12 0x34 0x56 0x78 0x9a
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bit_piece 32 4
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const2s -280
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stack_value
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bit_piece 9 2
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regx [lindex $dwarf_regnum 0]
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bit_piece 13 14
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addr $buf_var
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bit_piece 10 42
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} SPECIAL_expr}
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}
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}
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}
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}
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}
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if { [prepare_for_testing ${testfile}.exp ${testfile} \
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[list $srcfile $asm_file] {nodebug}] } {
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return -1
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}
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if ![runto_main] {
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return -1
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}
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# Determine byte order.
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set endian [get_endianness]
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# Byte-aligned memory pieces.
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gdb_test "print/d s1" " = \\{a = 2, b = 3, c = 0, d = 1\\}" \
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"s1 == re-ordered buf"
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gdb_test_no_output "set var s1.a = 63"
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gdb_test "print/d s1" " = \\{a = 63, b = 3, c = 0, d = 1\\}" \
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"verify s1.a"
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gdb_test "print/d a" " = \\{0, 1, 63, 3, 4, 5, 6, 7\\}" \
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"verify s1.a through a"
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gdb_test_no_output "set var s1.b = 42"
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gdb_test "print/d s1" " = \\{a = 63, b = 42, c = 0, d = 1\\}" \
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"verify s1.b"
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gdb_test "print/d a" " = \\{0, 1, 63, 42, 4, 5, 6, 7\\}" \
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"verify s1.b through a"
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# Byte-aligned register- and memory pieces.
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gdb_test_no_output "set var \$[lindex $regname 0] = 81" \
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"init reg for s2.a"
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gdb_test_no_output "set var \$[lindex $regname 1] = 28" \
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"init reg for s2.c"
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gdb_test "print/d s2" " = \\{a = 81, b = 4, c = 28, d = 5\\}" \
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"initialized s2 from mem and regs"
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gdb_test_no_output "set var s2.c += s2.a + s2.b - s2.d"
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gdb_test "print/d s2" " = \\{a = 81, b = 4, c = 108, d = 5\\}" \
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"verify s2.c"
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gdb_test "print/d \$[lindex $regname 1]" " = 108" \
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"verify s2.c through reg"
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gdb_test_no_output "set var s2 = {191, 73, 231, 123}" \
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"re-initialize s2"
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gdb_test "print/d s2" " = \\{a = 191, b = 73, c = 231, d = 123\\}" \
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"verify re-initialized s2"
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# Unaligned bitfield access through byte-aligned pieces.
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gdb_test_no_output "set var a = { 0 }"
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gdb_test_no_output "set var st1.t.x = -7"
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gdb_test_no_output "set var st1.t.z = 340"
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gdb_test_no_output "set var st1.t.y = 1234"
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gdb_test "print st1.t" " = \\{u = <optimized out>, x = -7, y = 1234, z = 340\\}" \
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"verify st1.t"
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switch $endian {
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little {set val "0x55, 0x0, 0xf9, 0xa5, 0x9"}
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big {set val "0x54, 0x0, 0xfc, 0x93, 0x49"}
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}
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# | -- | z:2-9 | -- | x:0-7 | x:8 y:0-6 | y:7-12 z:0-1 | -- | -- |
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# \_______________________________________________/
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# val
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gdb_test "print/x a" " = \\{0x0, ${val}, 0x0, 0x0\\}" \
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"verify st1 through a"
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switch $endian { big {set val 0x7ffc} little {set val 0x3ffe00} }
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gdb_test_no_output "set var \$[lindex $regname 0] = $val" \
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"init t2, first piece"
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gdb_test_no_output "set var \$[lindex $regname 1] = 0" \
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"init t2, second piece"
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gdb_test "print/d t2" " = \\{u = <optimized out>, x = 0, y = -1, z = 0\\}" \
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"initialized t2 from regs"
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gdb_test_no_output "set var t2.y = 2641"
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gdb_test_no_output "set var t2.z = -400"
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gdb_test_no_output "set var t2.x = 200"
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gdb_test "print t2.x + t2.y + t2.z" " = 2441"
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# Bitfield access through pieces with nonzero piece offsets.
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gdb_test_no_output "set var \$[lindex $regname 0] = 0xa8000" \
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"init reg for t3.y"
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gdb_test_no_output "set var *(char \[2\] *) (a + 5) = { 70, 82 }" \
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"init mem for t3.z"
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switch $endian {
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little {set val "u = -1484430527, x = -70, y = 42, z = 145"}
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big {set val "u = 591751049, x = -70, y = 42, z = 101"}
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}
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gdb_test "print t3" " = \\{$val\\}" \
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"initialized t3 from reg and mem"
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gdb_test_no_output "set var t3.y = -1" \
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"overwrite t3.y"
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gdb_test "print/x \$[lindex $regname 0]" " = 0x7ffc000" \
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"verify t3.y through reg"
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gdb_test_no_output "set var t3.z = -614" \
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"overwrite t3.z"
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switch $endian {big {set val "0x59, 0xa2"} little {set val "0x6a, 0x56"}}
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gdb_test "print/x *(char \[2\] *) (a + 5)" " = \\{$val\\}" \
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"verify t3.z through mem"
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