474 lines
16 KiB
C
474 lines
16 KiB
C
/* Target machine sub-parameters for SPARC64, for GDB, the GNU debugger.
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This is included by other tm-*.h files to define SPARC64 cpu-related info.
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Copyright 1994, 1995, 1996, 1998 Free Software Foundation, Inc.
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This is (obviously) based on the SPARC Vn (n<9) port.
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Contributed by Doug Evans (dje@cygnus.com).
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Further modified by Bob Manson (manson@cygnus.com).
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#define GDB_MULTI_ARCH 2
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#ifndef GDB_TARGET_IS_SPARC64
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#define GDB_TARGET_IS_SPARC64 1
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#endif
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#include "sparc/tm-sparc.h"
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/* Eeeew. Ok, we have to assume (for now) that the processor really is
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in sparc64 mode. While this is the same instruction sequence as
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on the Sparc, the stack frames are offset by +2047 (and the arguments
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are 8 bytes instead of 4). */
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/* Instructions are:
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std %f10, [ %fp + 0x7a7 ]
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std %f8, [ %fp + 0x79f ]
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std %f6, [ %fp + 0x797 ]
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std %f4, [ %fp + 0x78f ]
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std %f2, [ %fp + 0x787 ]
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std %f0, [ %fp + 0x77f ]
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std %g6, [ %fp + 0x777 ]
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std %g4, [ %fp + 0x76f ]
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std %g2, [ %fp + 0x767 ]
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std %g0, [ %fp + 0x75f ]
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std %fp, [ %fp + 0x757 ]
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std %i4, [ %fp + 0x74f ]
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std %i2, [ %fp + 0x747 ]
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std %i0, [ %fp + 0x73f ]
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nop
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nop
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nop
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nop
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rd %tbr, %o0
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st %o0, [ %fp + 0x72b ]
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rd %tpc, %o0
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st %o0, [ %fp + 0x727 ]
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rd %psr, %o0
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st %o0, [ %fp + 0x723 ]
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rd %y, %o0
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st %o0, [ %fp + 0x71f ]
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ldx [ %sp + 0x8a7 ], %o5
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ldx [ %sp + 0x89f ], %o4
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ldx [ %sp + 0x897 ], %o3
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ldx [ %sp + 0x88f ], %o2
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ldx [ %sp + 0x887 ], %o1
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call %g0
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ldx [ %sp + 0x87f ], %o0
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nop
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ta 1
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nop
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nop
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*/
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#if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
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/*
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* The following defines must go away for MULTI_ARCH.
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*/
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#ifndef DO_CALL_DUMMY_ON_STACK
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/*
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* These defines will suffice for the AT_ENTRY_POINT call dummy method.
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*/
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#undef CALL_DUMMY
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#define CALL_DUMMY {0}
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#undef CALL_DUMMY_LENGTH
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#define CALL_DUMMY_LENGTH 0
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#undef CALL_DUMMY_CALL_OFFSET
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#define CALL_DUMMY_CALL_OFFSET 0
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#undef CALL_DUMMY_START_OFFSET
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#define CALL_DUMMY_START_OFFSET 0
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#undef CALL_DUMMY_BREAKPOINT_OFFSET
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#define CALL_DUMMY_BREAKPOINT_OFFSET 0
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#undef CALL_DUMMY_BREAKPOINT_OFFSET_P
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#define CALL_DUMMY_BREAKPOINT_OFFSET_P 1
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#undef CALL_DUMMY_LOCATION
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#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
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#undef CALL_DUMMY_STACK_ADJUST
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#define CALL_DUMMY_STACK_ADJUST 128
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#undef SIZEOF_CALL_DUMMY_WORDS
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#define SIZEOF_CALL_DUMMY_WORDS 0
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#undef CALL_DUMMY_ADDRESS
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#define CALL_DUMMY_ADDRESS() entry_point_address()
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#undef FIX_CALL_DUMMY
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#define FIX_CALL_DUMMY(DUMMYNAME, PC, FUN, NARGS, ARGS, TYPE, GCC_P)
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#undef PUSH_RETURN_ADDRESS
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#define PUSH_RETURN_ADDRESS(PC, SP) sparc_at_entry_push_return_address (PC, SP)
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extern CORE_ADDR
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sparc_at_entry_push_return_address (CORE_ADDR pc, CORE_ADDR sp);
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#undef STORE_STRUCT_RETURN
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#define STORE_STRUCT_RETURN(ADDR, SP) \
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sparc_at_entry_store_struct_return (ADDR, SP)
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extern void
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sparc_at_entry_store_struct_return (CORE_ADDR addr, CORE_ADDR sp);
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#else
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/*
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* Old call dummy method, with CALL_DUMMY on the stack.
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*/
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#undef CALL_DUMMY
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#define CALL_DUMMY { 0x9de3bec0fd3fa7f7LL, 0xf93fa7eff53fa7e7LL,\
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0xf13fa7dfed3fa7d7LL, 0xe93fa7cfe53fa7c7LL,\
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0xe13fa7bfdd3fa7b7LL, 0xd93fa7afd53fa7a7LL,\
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0xd13fa79fcd3fa797LL, 0xc93fa78fc53fa787LL,\
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0xc13fa77fcc3fa777LL, 0xc83fa76fc43fa767LL,\
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0xc03fa75ffc3fa757LL, 0xf83fa74ff43fa747LL,\
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0xf03fa73f01000000LL, 0x0100000001000000LL,\
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0x0100000091580000LL, 0xd027a72b93500000LL,\
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0xd027a72791480000LL, 0xd027a72391400000LL,\
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0xd027a71fda5ba8a7LL, 0xd85ba89fd65ba897LL,\
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0xd45ba88fd25ba887LL, 0x9fc02000d05ba87fLL,\
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0x0100000091d02001LL, 0x0100000001000000LL }
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/* 128 is to reserve space to write the %i/%l registers that will be restored
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when we resume. */
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#undef CALL_DUMMY_STACK_ADJUST
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#define CALL_DUMMY_STACK_ADJUST 128
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/* Size of the call dummy in bytes. */
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#undef CALL_DUMMY_LENGTH
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#define CALL_DUMMY_LENGTH 192
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/* Offset within CALL_DUMMY of the 'call' instruction. */
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#undef CALL_DUMMY_START_OFFSET
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#define CALL_DUMMY_START_OFFSET 148
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/* Offset within CALL_DUMMY of the 'call' instruction. */
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#undef CALL_DUMMY_CALL_OFFSET
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#define CALL_DUMMY_CALL_OFFSET (CALL_DUMMY_START_OFFSET + (5 * 4))
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/* Offset within CALL_DUMMY of the 'ta 1' instruction. */
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#undef CALL_DUMMY_BREAKPOINT_OFFSET
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#define CALL_DUMMY_BREAKPOINT_OFFSET (CALL_DUMMY_START_OFFSET + (8 * 4))
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/* Let's GDB know that it can make a call_dummy breakpoint. */
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#undef CALL_DUMMY_BREAKPOINT_OFFSET_P
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#define CALL_DUMMY_BREAKPOINT_OFFSET_P 1
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/* Call dummy will be located on the stack. */
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#undef CALL_DUMMY_LOCATION
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#define CALL_DUMMY_LOCATION ON_STACK
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/* Insert the function address into the call dummy. */
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#undef FIX_CALL_DUMMY
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#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
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sparc_fix_call_dummy (dummyname, pc, fun, type, gcc_p)
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void sparc_fix_call_dummy PARAMS ((char *dummy, CORE_ADDR pc, CORE_ADDR fun,
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struct type * value_type, int using_gcc));
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/* The remainder of these will accept the default definition. */
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#undef SIZEOF_CALL_DUMMY_WORDS
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#undef PUSH_RETURN_ADDRESS
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#undef CALL_DUMMY_ADDRESS
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#undef STORE_STRUCT_RETURN
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#endif
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/* Does the specified function use the "struct returning" convention
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or the "value returning" convention? The "value returning" convention
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almost invariably returns the entire value in registers. The
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"struct returning" convention often returns the entire value in
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memory, and passes a pointer (out of or into the function) saying
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where the value (is or should go).
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Since this sometimes depends on whether it was compiled with GCC,
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this is also an argument. This is used in call_function to build a
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stack, and in value_being_returned to print return values.
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On Sparc64, we only pass pointers to structs if they're larger then
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32 bytes. Otherwise they're stored in %o0-%o3 (floating-point
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values go into %fp0-%fp3). */
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#undef USE_STRUCT_CONVENTION
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#define USE_STRUCT_CONVENTION(gcc_p, type) (TYPE_LENGTH (type) > 32)
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CORE_ADDR sparc64_push_arguments PARAMS ((int,
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struct value **,
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CORE_ADDR,
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int,
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CORE_ADDR));
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#undef PUSH_ARGUMENTS
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#define PUSH_ARGUMENTS(A,B,C,D,E) \
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(sparc64_push_arguments ((A), (B), (C), (D), (E)))
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/* Store the address of the place in which to copy the structure the
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subroutine will return. This is called from call_function. */
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/* FIXME: V9 uses %o0 for this. */
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#undef STORE_STRUCT_RETURN
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#define STORE_STRUCT_RETURN(ADDR, SP) \
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{ target_write_memory ((SP)+(16*8), (char *)&(ADDR), 8); }
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/* Stack must be aligned on 128-bit boundaries when synthesizing
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function calls. */
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#undef STACK_ALIGN
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#define STACK_ALIGN(ADDR) (((ADDR) + 15 ) & -16)
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/* Initializer for an array of names of registers.
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There should be NUM_REGS strings in this initializer. */
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/* Some of these registers are only accessible from priviledged mode.
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They are here for kernel debuggers, etc. */
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/* FIXME: icc and xcc are currently considered separate registers.
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This may have to change and consider them as just one (ccr).
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Let's postpone this as long as we can. It's nice to be able to set
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them individually. */
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/* FIXME: fcc0-3 are currently separate, even though they are also part of
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fsr. May have to remove them but let's postpone this as long as
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possible. It's nice to be able to set them individually. */
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/* FIXME: Whether to include f33, f35, etc. here is not clear.
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There are advantages and disadvantages. */
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#undef REGISTER_NAMES
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#define REGISTER_NAMES \
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{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \
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"o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \
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"l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
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"i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7", \
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\
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"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
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"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
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"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \
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"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \
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"f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46", \
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"f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62", \
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\
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"pc", "npc", "ccr", "fsr", "fprs", "y", "asi", \
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"ver", "tick", "pil", "pstate", \
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"tstate", "tba", "tl", "tt", "tpc", "tnpc", "wstate", \
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"cwp", "cansave", "canrestore", "cleanwin", "otherwin", \
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"asr16", "asr17", "asr18", "asr19", "asr20", "asr21", \
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"asr22", "asr23", "asr24", "asr25", "asr26", "asr27", \
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"asr28", "asr29", "asr30", "asr31", \
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/* These are here at the end to simplify removing them if we have to. */ \
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"icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3" \
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}
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#undef REG_STRUCT_HAS_ADDR
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#define REG_STRUCT_HAS_ADDR(gcc_p,type) (TYPE_LENGTH (type) > 32)
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extern CORE_ADDR sparc64_read_sp ();
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extern CORE_ADDR sparc64_read_fp ();
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extern void sparc64_write_sp PARAMS ((CORE_ADDR));
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extern void sparc64_write_fp PARAMS ((CORE_ADDR));
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#define TARGET_READ_SP() (sparc64_read_sp ())
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#define TARGET_READ_FP() (sparc64_read_fp ())
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#define TARGET_WRITE_SP(X) (sparc64_write_sp (X))
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#define TARGET_WRITE_FP(X) (sparc64_write_fp (X))
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#undef EXTRACT_RETURN_VALUE
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#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
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sp64_extract_return_value(TYPE, REGBUF, VALBUF, 0)
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extern void
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sp64_extract_return_value PARAMS ((struct type *, char[], char *, int));
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/* Register numbers of various important registers.
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Note that some of these values are "real" register numbers,
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and correspond to the general registers of the machine,
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and some are "phony" register numbers which are too large
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to be actual register numbers as far as the user is concerned
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but do serve to get the desired values when passed to read_register. */
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#if 0 /* defined in tm-sparc.h, replicated
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for doc purposes */
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#define G0_REGNUM 0 /* %g0 */
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#define G1_REGNUM 1 /* %g1 */
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#define O0_REGNUM 8 /* %o0 */
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#define SP_REGNUM 14 /* Contains address of top of stack, \
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which is also the bottom of the frame. */
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#define RP_REGNUM 15 /* Contains return address value, *before* \
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any windows get switched. */
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#define O7_REGNUM 15 /* Last local reg not saved on stack frame */
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#define L0_REGNUM 16 /* First local reg that's saved on stack frame
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rather than in machine registers */
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#define I0_REGNUM 24 /* %i0 */
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#define FP_REGNUM 30 /* Contains address of executing stack frame */
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#define I7_REGNUM 31 /* Last local reg saved on stack frame */
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#define FP0_REGNUM 32 /* Floating point register 0 */
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#endif
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/*#define FP_MAX_REGNUM 80*/ /* 1 + last fp reg number */
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/* #undef v8 misc. regs */
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#undef Y_REGNUM
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#undef PS_REGNUM
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#undef WIM_REGNUM
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#undef TBR_REGNUM
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#undef PC_REGNUM
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#undef NPC_REGNUM
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#undef FPS_REGNUM
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#undef CPS_REGNUM
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/* v9 misc. and priv. regs */
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#define C0_REGNUM 80 /* Start of control registers */
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#define PC_REGNUM (C0_REGNUM + 0) /* Current PC */
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#define NPC_REGNUM (C0_REGNUM + 1) /* Next PC */
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#define CCR_REGNUM (C0_REGNUM + 2) /* Condition Code Register (%xcc,%icc) */
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#define FSR_REGNUM (C0_REGNUM + 3) /* Floating Point State */
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#define FPRS_REGNUM (C0_REGNUM + 4) /* Floating Point Registers State */
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#define Y_REGNUM (C0_REGNUM + 5) /* Temp register for multiplication, etc. */
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#define ASI_REGNUM (C0_REGNUM + 6) /* Alternate Space Identifier */
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#define VER_REGNUM (C0_REGNUM + 7) /* Version register */
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#define TICK_REGNUM (C0_REGNUM + 8) /* Tick register */
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#define PIL_REGNUM (C0_REGNUM + 9) /* Processor Interrupt Level */
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#define PSTATE_REGNUM (C0_REGNUM + 10) /* Processor State */
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#define TSTATE_REGNUM (C0_REGNUM + 11) /* Trap State */
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#define TBA_REGNUM (C0_REGNUM + 12) /* Trap Base Address */
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#define TL_REGNUM (C0_REGNUM + 13) /* Trap Level */
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#define TT_REGNUM (C0_REGNUM + 14) /* Trap Type */
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#define TPC_REGNUM (C0_REGNUM + 15) /* Trap pc */
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#define TNPC_REGNUM (C0_REGNUM + 16) /* Trap npc */
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#define WSTATE_REGNUM (C0_REGNUM + 17) /* Window State */
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#define CWP_REGNUM (C0_REGNUM + 18) /* Current Window Pointer */
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#define CANSAVE_REGNUM (C0_REGNUM + 19) /* Savable Windows */
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#define CANRESTORE_REGNUM (C0_REGNUM + 20) /* Restorable Windows */
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#define CLEANWIN_REGNUM (C0_REGNUM + 21) /* Clean Windows */
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#define OTHERWIN_REGNUM (C0_REGNUM + 22) /* Other Windows */
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#define ASR_REGNUM(n) (C0_REGNUM+(23-16)+(n)) /* Ancillary State Register
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(n = 16...31) */
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#define ICC_REGNUM (C0_REGNUM + 39) /* 32 bit condition codes */
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#define XCC_REGNUM (C0_REGNUM + 40) /* 64 bit condition codes */
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#define FCC0_REGNUM (C0_REGNUM + 41) /* fp cc reg 0 */
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#define FCC1_REGNUM (C0_REGNUM + 42) /* fp cc reg 1 */
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#define FCC2_REGNUM (C0_REGNUM + 43) /* fp cc reg 2 */
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#define FCC3_REGNUM (C0_REGNUM + 44) /* fp cc reg 3 */
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/* Number of machine registers. */
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#undef NUM_REGS
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#define NUM_REGS 125
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/* Total amount of space needed to store our copies of the machine's
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register state, the array `registers'.
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Some of the registers aren't 64 bits, but it's a lot simpler just to assume
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they all are (since most of them are). */
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#undef REGISTER_BYTES
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#define REGISTER_BYTES (32*8+32*8+45*8)
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/* Index within `registers' of the first byte of the space for
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register N. */
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#undef REGISTER_BYTE
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#define REGISTER_BYTE(N) \
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((N) < 32 ? (N)*8 \
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: (N) < 64 ? 32*8 + ((N)-32)*4 \
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: (N) < C0_REGNUM ? 32*8 + 32*4 + ((N)-64)*8 \
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: 64*8 + ((N)-C0_REGNUM)*8)
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/* Say how long (ordinary) registers are. This is a piece of bogosity
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used in push_word and a few other places; REGISTER_RAW_SIZE is the
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real way to know how big a register is. */
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#undef REGISTER_SIZE
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#define REGISTER_SIZE 8
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/* Number of bytes of storage in the actual machine representation
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for register N. */
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#undef REGISTER_RAW_SIZE
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#define REGISTER_RAW_SIZE(N) \
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((N) < 32 ? 8 : (N) < 64 ? 4 : 8)
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/* Number of bytes of storage in the program's representation
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for register N. */
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#undef REGISTER_VIRTUAL_SIZE
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#define REGISTER_VIRTUAL_SIZE(N) \
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((N) < 32 ? 8 : (N) < 64 ? 4 : 8)
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/* Largest value REGISTER_RAW_SIZE can have. */
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/* tm-sparc.h defines this as 8, but play it safe. */
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#undef MAX_REGISTER_RAW_SIZE
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#define MAX_REGISTER_RAW_SIZE 8
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/* Largest value REGISTER_VIRTUAL_SIZE can have. */
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/* tm-sparc.h defines this as 8, but play it safe. */
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#undef MAX_REGISTER_VIRTUAL_SIZE
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#define MAX_REGISTER_VIRTUAL_SIZE 8
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/* Return the GDB type object for the "standard" data type
|
||
of data in register N. */
|
||
|
||
#undef REGISTER_VIRTUAL_TYPE
|
||
#define REGISTER_VIRTUAL_TYPE(N) \
|
||
((N) < 32 ? builtin_type_long_long \
|
||
: (N) < 64 ? builtin_type_float \
|
||
: (N) < 80 ? builtin_type_double \
|
||
: builtin_type_long_long)
|
||
|
||
/* We use to support both 32 bit and 64 bit pointers.
|
||
We can't anymore because TARGET_PTR_BIT must now be a constant. */
|
||
#undef TARGET_PTR_BIT
|
||
#define TARGET_PTR_BIT 64
|
||
|
||
/* Longs are 64 bits. */
|
||
#undef TARGET_LONG_BIT
|
||
#define TARGET_LONG_BIT 64
|
||
|
||
#undef TARGET_LONG_LONG_BIT
|
||
#define TARGET_LONG_LONG_BIT 64
|
||
|
||
/* Return number of bytes at start of arglist that are not really args. */
|
||
|
||
#undef FRAME_ARGS_SKIP
|
||
#define FRAME_ARGS_SKIP 136
|
||
|
||
#endif /* GDB_MULTI_ARCH */
|
||
|
||
/* Offsets into jmp_buf.
|
||
FIXME: This was borrowed from the v8 stuff and will probably have to change
|
||
for v9. */
|
||
|
||
#define JB_ELEMENT_SIZE 8 /* Size of each element in jmp_buf */
|
||
|
||
#define JB_ONSSTACK 0
|
||
#define JB_SIGMASK 1
|
||
#define JB_SP 2
|
||
#define JB_PC 3
|
||
#define JB_NPC 4
|
||
#define JB_PSR 5
|
||
#define JB_G1 6
|
||
#define JB_O0 7
|
||
#define JB_WBCNT 8
|
||
|
||
/* Figure out where the longjmp will land. We expect that we have
|
||
just entered longjmp and haven't yet setup the stack frame, so the
|
||
args are still in the output regs. %o0 (O0_REGNUM) points at the
|
||
jmp_buf structure from which we extract the pc (JB_PC) that we will
|
||
land at. The pc is copied into ADDR. This routine returns true on
|
||
success */
|
||
|
||
extern int
|
||
get_longjmp_target PARAMS ((CORE_ADDR *));
|
||
|
||
#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
|
||
|
||
#undef TM_PRINT_INSN_MACH
|
||
#define TM_PRINT_INSN_MACH bfd_mach_sparc_v9a
|
||
|