136 lines
6.0 KiB
C
136 lines
6.0 KiB
C
/* HPPA PA-RISC machine native support for BSD, for GDB.
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Copyright 1991, 1992 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "somsolib.h"
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#define U_REGS_OFFSET 0
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#define KERNEL_U_ADDR 0
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/* What a coincidence! */
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#define REGISTER_U_ADDR(addr, blockend, regno) \
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{ addr = (int)(blockend) + REGISTER_BYTE (regno);}
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/* 3rd argument to ptrace is supposed to be a caddr_t. */
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#define PTRACE_ARG3_TYPE caddr_t
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/* HPUX 8.0, in its infinite wisdom, has chosen to prototype ptrace
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with five arguments, so programs written for normal ptrace lose. */
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#define FIVE_ARG_PTRACE
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/* This macro defines the register numbers (from REGISTER_NAMES) that
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are effectively unavailable to the user through ptrace(). It allows
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us to include the whole register set in REGISTER_NAMES (inorder to
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better support remote debugging). If it is used in
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fetch/store_inferior_registers() gdb will not complain about I/O errors
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on fetching these registers. If all registers in REGISTER_NAMES
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are available, then return false (0). */
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#define CANNOT_STORE_REGISTER(regno) \
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((regno) == 0) || \
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((regno) == PCSQ_HEAD_REGNUM) || \
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((regno) >= PCSQ_TAIL_REGNUM && (regno) < IPSW_REGNUM) || \
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((regno) > IPSW_REGNUM && (regno) < FP4_REGNUM)
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/* fetch_inferior_registers is in hppab-nat.c. */
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#define FETCH_INFERIOR_REGISTERS
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/* attach/detach works to some extent under BSD and HPUX. So long
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as the process you're attaching to isn't blocked waiting on io,
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blocked waiting on a signal, or in a system call things work
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fine. (The problems in those cases are related to the fact that
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the kernel can't provide complete register information for the
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target process... Which really pisses off GDB.) */
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#define ATTACH_DETACH
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/* The PA-BSD kernel has support for using the data memory break bit
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to implement fast watchpoints.
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Watchpoints on the PA act much like traditional page protection
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schemes, but with some notable differences.
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First, a special bit in the page table entry is used to cause
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a trap when a specific page is written to. This avoids having
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to overload watchpoints on the page protection bits. This makes
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it possible for the kernel to easily decide if a trap was caused
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by a watchpoint or by the user writing to protected memory and can
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signal the user program differently in each case.
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Second, the PA has a bit in the processor status word which causes
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data memory breakpoints (aka watchpoints) to be disabled for a single
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instruction. This bit can be used to avoid the overhead of unprotecting
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and reprotecting pages when it becomes necessary to step over a watchpoint.
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When the kernel receives a trap indicating a write to a page which
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is being watched, the kernel performs a couple of simple actions. First
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is sets the magic "disable memory breakpoint" bit in the processor
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status word, it then sends a SIGTRAP to the process which caused the
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trap.
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GDB will take control and catch the signal for the inferior. GDB then
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examines the PSW-X bit to determine if the SIGTRAP was caused by a
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watchpoint firing. If so GDB single steps the inferior over the
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instruction which caused the watchpoint to trigger (note because the
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kernel disabled the data memory break bit for one instruction no trap
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will be taken!). GDB will then determines the appropriate action to
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take. (this may include restarting the inferior if the watchpoint
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fired because of a write to an address on the same page as a watchpoint,
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but no write to the watched address occured). */
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#define TARGET_HAS_HARDWARE_WATCHPOINTS /* Enable the code in procfs.c */
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/* The PA can watch any number of locations, there's no need for it to reject
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anything (generic routines already check that all intermediates are
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in memory). */
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#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) \
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((type) == bp_hardware_watchpoint)
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/* When a hardware watchpoint fires off the PC will be left at the
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instruction which caused the watchpoint. It will be necessary for
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GDB to step over the watchpoint.
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On a PA running BSD, it is trivial to identify when it will be
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necessary to step over a hardware watchpoint as we can examine
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the PSW-X bit. If the bit is on, then we trapped because of a
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watchpoint, else we trapped for some other reason. */
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#define STOPPED_BY_WATCHPOINT(W) \
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((W).kind == TARGET_WAITKIND_STOPPED \
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&& (W).value.sig == TARGET_SIGNAL_TRAP \
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&& ((int) read_register (IPSW_REGNUM) & 0x00100000))
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/* The PA can single step over a watchpoint if the kernel has set the
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"X" bit in the processor status word (disable data memory breakpoint
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for one instruction).
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The kernel will always set this bit before notifying the inferior
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that it hit a watchpoint. Thus, the inferior can single step over
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the instruction which caused the watchpoint to fire. This avoids
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the traditional need to disable the watchpoint, step the inferior,
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then enable the watchpoint again. */
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#define HAVE_STEPPABLE_WATCHPOINT
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/* Use these macros for watchpoint insertion/deletion. */
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/* type can be 0: write watch, 1: read watch, 2: access watch (read/write) */
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#define target_insert_watchpoint(addr, len, type) hppa_set_watchpoint (addr, len, 1)
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#define target_remove_watchpoint(addr, len, type) hppa_set_watchpoint (addr, len, 0)
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