2d62e80754
for remote MIPS by limiting heuristic to 200 byte search. (heuristic_proc_desc): Byte-swapping. (mips_print_register): Cope with failure of read_relative_register_raw_bytes. Byte-swap integers for printing. * mips-pinsn.c (print_insn): Byte-swap instruction.
148 lines
3.6 KiB
C
148 lines
3.6 KiB
C
/* Print mips instructions for GDB, the GNU debugger.
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Copyright 1989, 1991, 1992 Free Software Foundation, Inc.
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Contributed by Nobuyuki Hikichi(hikichi@sra.co.jp)
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include "defs.h"
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#include "symtab.h"
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#include "opcode/mips.h"
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/* Mips instructions are never longer than this many bytes. */
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#define MAXLEN 4
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/* Number of elements in the opcode table. */
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#define NOPCODES (sizeof mips_opcodes / sizeof mips_opcodes[0])
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#define MKLONG(p) *(unsigned long*)p
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extern char *reg_names[];
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/* subroutine */
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static unsigned char *
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print_insn_arg (d, l, stream, pc)
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char *d;
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register unsigned long int *l;
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FILE *stream;
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CORE_ADDR pc;
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{
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switch (*d)
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{
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case ',':
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case '(':
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case ')':
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fputc (*d, stream);
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break;
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case 's':
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fprintf (stream, "$%s", reg_names[((struct op_i_fmt *) l)->rs]);
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break;
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case 't':
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fprintf (stream, "$%s", reg_names[((struct op_i_fmt *) l)->rt]);
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break;
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case 'i':
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fprintf (stream, "%d", ((struct op_i_fmt *) l)->immediate);
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break;
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case 'j': /* same as i, but sign-extended */
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fprintf (stream, "%d", ((struct op_b_fmt *) l)->delta);
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break;
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case 'a':
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print_address ((pc & 0xF0000000) | (((struct op_j_fmt *)l)->target << 2),
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stream);
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break;
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case 'b':
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print_address ((((struct op_b_fmt *) l)->delta << 2) + pc + 4, stream);
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break;
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case 'd':
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fprintf (stream, "$%s", reg_names[((struct op_r_fmt *) l)->rd]);
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break;
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case 'h':
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fprintf (stream, "0x%x", ((struct op_r_fmt *) l)->shamt);
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break;
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case 'S':
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fprintf (stream, "$f%d", ((struct fop_r_fmt *) l)->fs);
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break;
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case 'T':
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fprintf (stream, "$f%d", ((struct fop_r_fmt *) l)->ft);
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break;
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case 'D':
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fprintf (stream, "$f%d", ((struct fop_r_fmt *) l)->fd);
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break;
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default:
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fprintf (stream, "# internal error, undefined modifier(%c)", *d);
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break;
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}
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}
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/* Print the mips instruction at address MEMADDR in debugged memory,
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on STREAM. Returns length of the instruction, in bytes, which
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is always 4. */
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int
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print_insn (memaddr, stream)
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CORE_ADDR memaddr;
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FILE *stream;
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{
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unsigned char buffer[MAXLEN];
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register int i;
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register char *d;
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unsigned long int l;
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read_memory (memaddr, buffer, MAXLEN);
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SWAP_TARGET_AND_HOST (buffer, MAXLEN);
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for (i = 0; i < NOPCODES; i++)
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{
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register unsigned int opcode = mips_opcodes[i].opcode;
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register unsigned int match = mips_opcodes[i].match;
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if ((*(unsigned int*)buffer & match) == opcode)
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break;
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}
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l = MKLONG (buffer);
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/* Handle undefined instructions. */
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if (i == NOPCODES)
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{
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fprintf (stream, "0x%x",l);
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return 4;
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}
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fprintf (stream, "%s", mips_opcodes[i].name);
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if (!(d = mips_opcodes[i].args))
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return 4;
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fputc (' ', stream);
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while (*d)
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print_insn_arg (d++, &l, stream, memaddr);
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return 4;
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}
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