61baf725ec
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195 lines
6.3 KiB
C
195 lines
6.3 KiB
C
/* Ravenscar SPARC target support.
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Copyright (C) 2004-2017 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "gdbcore.h"
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#include "regcache.h"
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#include "sparc-tdep.h"
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#include "inferior.h"
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#include "ravenscar-thread.h"
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#include "sparc-ravenscar-thread.h"
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static void sparc_ravenscar_fetch_registers (struct regcache *regcache,
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int regnum);
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static void sparc_ravenscar_store_registers (struct regcache *regcache,
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int regnum);
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static void sparc_ravenscar_prepare_to_store (struct regcache *regcache);
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/* Register offsets from a referenced address (exempli gratia the
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Thread_Descriptor). The referenced address depends on the register
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number. The Thread_Descriptor layout and the stack layout are documented
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in the GNAT sources, in sparc-bb.h. */
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static const int sparc_register_offsets[] =
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{
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/* G0 - G7 */
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-1, 0x24, 0x28, 0x2C, 0x30, 0x34, 0x38, 0x3C,
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/* O0 - O7 */
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0x00, 0x04, 0x08, 0x0C, 0x10, 0x14, 0x18, 0x1C,
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/* L0 - L7 */
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0x00, 0x04, 0x08, 0x0C, 0x10, 0x14, 0x18, 0x1C,
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/* I0 - I7 */
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0x20, 0x24, 0x28, 0x2C, 0x30, 0x34, 0x38, 0x3C,
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/* F0 - F31 */
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0x50, 0x54, 0x58, 0x5C, 0x60, 0x64, 0x68, 0x6C,
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0x70, 0x74, 0x78, 0x7C, 0x80, 0x84, 0x88, 0x8C,
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0x90, 0x94, 0x99, 0x9C, 0xA0, 0xA4, 0xA8, 0xAC,
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0xB0, 0xB4, 0xBB, 0xBC, 0xC0, 0xC4, 0xC8, 0xCC,
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/* Y PSR WIM TBR PC NPC FPSR CPSR */
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0x40, 0x20, 0x44, -1, 0x1C, -1, 0x4C, -1
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};
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/* supply register REGNUM, which has been saved on REGISTER_ADDR, to the
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regcache. */
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static void
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supply_register_at_address (struct regcache *regcache, int regnum,
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CORE_ADDR register_addr)
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{
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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int buf_size = register_size (gdbarch, regnum);
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gdb_byte *buf;
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buf = (gdb_byte *) alloca (buf_size);
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read_memory (register_addr, buf, buf_size);
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regcache_raw_supply (regcache, regnum, buf);
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}
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/* Return true if, for a non-running thread, REGNUM has been saved on the
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stack. */
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static int
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register_on_stack_p (int regnum)
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{
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return (regnum >= SPARC_L0_REGNUM && regnum <= SPARC_L7_REGNUM)
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|| (regnum >= SPARC_I0_REGNUM && regnum <= SPARC_I7_REGNUM);
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}
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/* Return true if, for a non-running thread, REGNUM has been saved on the
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Thread_Descriptor. */
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static int
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register_in_thread_descriptor_p (int regnum)
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{
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return (regnum >= SPARC_O0_REGNUM && regnum <= SPARC_O7_REGNUM)
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|| (regnum == SPARC32_PSR_REGNUM)
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|| (regnum >= SPARC_G1_REGNUM && regnum <= SPARC_G7_REGNUM)
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|| (regnum == SPARC32_Y_REGNUM)
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|| (regnum == SPARC32_WIM_REGNUM)
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|| (regnum == SPARC32_FSR_REGNUM)
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|| (regnum >= SPARC_F0_REGNUM && regnum <= SPARC_F0_REGNUM + 31)
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|| (regnum == SPARC32_PC_REGNUM);
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}
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/* to_fetch_registers when inferior_ptid is different from the running
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thread. */
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static void
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sparc_ravenscar_fetch_registers (struct regcache *regcache, int regnum)
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{
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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const int sp_regnum = gdbarch_sp_regnum (gdbarch);
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const int num_regs = gdbarch_num_regs (gdbarch);
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int current_regnum;
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CORE_ADDR current_address;
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CORE_ADDR thread_descriptor_address;
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ULONGEST stack_address;
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/* The tid is the thread_id field, which is a pointer to the thread. */
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thread_descriptor_address = (CORE_ADDR) ptid_get_tid (inferior_ptid);
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/* Read the saved SP in the context buffer. */
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current_address = thread_descriptor_address
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+ sparc_register_offsets [sp_regnum];
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supply_register_at_address (regcache, sp_regnum, current_address);
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regcache_cooked_read_unsigned (regcache, sp_regnum, &stack_address);
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/* Read registers. */
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for (current_regnum = 0; current_regnum < num_regs; current_regnum ++)
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{
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if (register_in_thread_descriptor_p (current_regnum))
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{
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current_address = thread_descriptor_address
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+ sparc_register_offsets [current_regnum];
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supply_register_at_address (regcache, current_regnum,
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current_address);
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}
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else if (register_on_stack_p (current_regnum))
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{
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current_address = stack_address
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+ sparc_register_offsets [current_regnum];
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supply_register_at_address (regcache, current_regnum,
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current_address);
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}
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}
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}
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/* to_prepare_to_store when inferior_ptid is different from the running
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thread. */
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static void
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sparc_ravenscar_prepare_to_store (struct regcache *regcache)
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{
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/* Nothing to do. */
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}
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/* to_store_registers when inferior_ptid is different from the running
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thread. */
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static void
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sparc_ravenscar_store_registers (struct regcache *regcache, int regnum)
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{
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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int buf_size = register_size (gdbarch, regnum);
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gdb_byte buf[buf_size];
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ULONGEST register_address;
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if (register_in_thread_descriptor_p (regnum))
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register_address =
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ptid_get_tid (inferior_ptid) + sparc_register_offsets [regnum];
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else if (register_on_stack_p (regnum))
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{
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regcache_cooked_read_unsigned (regcache, SPARC_SP_REGNUM,
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®ister_address);
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register_address += sparc_register_offsets [regnum];
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}
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else
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return;
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regcache_raw_collect (regcache, regnum, buf);
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write_memory (register_address,
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buf,
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buf_size);
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}
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static struct ravenscar_arch_ops sparc_ravenscar_ops =
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{
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sparc_ravenscar_fetch_registers,
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sparc_ravenscar_store_registers,
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sparc_ravenscar_prepare_to_store
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};
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/* Register ravenscar_arch_ops in GDBARCH. */
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void
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register_sparc_ravenscar_ops (struct gdbarch *gdbarch)
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{
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set_gdbarch_ravenscar_ops (gdbarch, &sparc_ravenscar_ops);
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}
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