d1a18c2f83
- PKE memory region registration - basic R/W operations - combined pke[01] -> pke
118 lines
2.7 KiB
C
118 lines
2.7 KiB
C
/* Copyright (C) 1998, Cygnus Solutions */
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#ifndef H_PKE_H
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#define H_PKE_H
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#include "sim-main.h"
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#include "device.h"
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/* External functions */
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void pke0_attach(SIM_DESC sd);
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void pke0_issue();
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void pke1_attach(SIM_DESC sd);
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void pke1_issue();
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/* Quadword data type */
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typedef unsigned int quadword[4];
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/* truncate address to quadword */
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#define ADDR_TRUNC_QW(addr) ((addr) & ~0x0f)
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/* extract offset in quadword */
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#define ADDR_OFFSET_QW(addr) ((addr) & 0x0f)
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/* SCEI memory mapping information */
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#define PKE0_REGISTER_WINDOW_START 0x10000800
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#define PKE1_REGISTER_WINDOW_START 0x10000A00
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#define PKE0_FIFO_START 0x10008000
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#define PKE1_FIFO_START 0x10008010
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/* Quadword indices of PKE registers. Actual registers sit at bottom
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32 bits of each quadword. */
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#define PKE_REG_STAT 0x00
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#define PKE_REG_FBRST 0x01
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#define PKE_REG_ERR 0x02
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#define PKE_REG_MARK 0x03
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#define PKE_REG_CYCLE 0x04
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#define PKE_REG_MODE 0x05
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#define PKE_REG_NUM 0x06
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#define PKE_REG_MASK 0x07
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#define PKE_REG_CODE 0x08
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#define PKE_REG_ITOPS 0x09
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#define PKE_REG_BASE 0x0a /* pke1 only */
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#define PKE_REG_OFST 0x0b /* pke1 only */
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#define PKE_REG_TOPS 0x0c /* pke1 only */
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#define PKE_REG_ITOP 0x0d
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#define PKE_REG_TOP 0x0e /* pke1 only */
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#define PKE_REG_DBF 0x0f /* pke1 only */
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#define PKE_REG_R0 0x10
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#define PKE_REG_R1 0x11
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#define PKE_REG_R2 0x12
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#define PKE_REG_R3 0x13
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#define PKE_REG_C0 0x14
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#define PKE_REG_C1 0x15
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#define PKE_REG_C2 0x16
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#define PKE_REG_C3 0x17
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/* one plus last index */
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#define PKE_NUM_REGS 0x18
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#define PKE_REGISTER_WINDOW_SIZE (sizeof(quadword) * PKE_NUM_REGS)
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/* virtual addresses for source-addr tracking */
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#define PKE0_SRCADDR 0x20000020
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#define PKE1_SRCADDR 0x20000024
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/* One row in the FIFO */
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struct fifo_quadword
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{
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/* 128 bits of data */
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quadword data;
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/* source main memory address (or 0: unknown) */
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address_word source_address;
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};
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/* PKE internal state: FIFOs, registers, handle to VU friend */
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struct pke_device
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{
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/* common device info */
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device dev;
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/* identity: 0=PKE0, 1=PKE1 */
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int pke_number;
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int flags;
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address_word register_memory_addr;
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address_word fifo_memory_addr;
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/* quadword registers */
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quadword regs[PKE_NUM_REGS];
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/* FIFO */
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struct fifo_quadword* fifo;
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int fifo_num_elements; /* no. of quadwords occupied in FIFO */
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int fifo_buffer_size; /* no. of quadwords of space in FIFO */
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FILE* fifo_trace_file; /* or 0 for no trace */
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/* index into FIFO of current instruction */
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int program_counter;
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};
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/* Flags for PKE.flags */
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#define PKE_FLAG_NONE 0
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/* none at present */
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#endif /* H_PKE_H */
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