a51951c258
Some Intel processors implement a Branch Trace Store (BTS) which GDB uses for reverse execution support via the "record btrace bts" command. I have been unable to find a description of a similar feature in a recent (April 2020) AMD64 architecture reference: https://www.amd.com/system/files/TechDocs/40332.pdf While it is the case that AMD processors have an LBR (last branch record) bit in the DebugCtl MSR, it seems that it affects only four MSRs when enabled. The names of these MSRs are LastBranchToIP, LastBranchFromIP, LastIntToIP, and LastIntFromIP. I can find no mention of anything more extensive. While looking at an Intel architecture document, I noticed that Intel's P6 family from the mid-90s had registers of the same name. Therefore... This commit disables "record btrace bts" support in GDB for AMD processors. Using the test case from gdb.base/break.exp, the sessions below show the expected behavior (run on a machine with an Intel processor) versus that on a machine with an AMD processor. The AMD processor in question is reported as follows by "lscpu": AMD Ryzen Threadripper 2950X 16-Core Processor . Finally, I'll note that the AMD machine is actually a VM, but I see similar behavior on both the virtualization host and the VM. Intel machine - Desired behavior: [kevinb@mohave gdb]$ ./gdb -q testsuite/outputs/gdb.base/break/break Reading symbols from testsuite/outputs/gdb.base/break/break... (gdb) start Temporary breakpoint 1 at 0x401179: file /home/kevinb/sourceware-git/native-build/bld/../../binutils-gdb/gdb/testsuite/gdb.base/break.c, line 43. Starting program: /home/kevinb/sourceware-git/native-build/bld/gdb/testsuite/outputs/gdb.base/break/break Temporary breakpoint 1, main (argc=1, argv=0x7fffffffd748, envp=0x7fffffffd758) at /home/kevinb/sourceware-git/native-build/bld/../../binutils-gdb/gdb/testsuite/gdb.base/break.c:43 43 if (argc == 12345) { /* an unlikely value < 2^16, in case uninited */ /* set breakpoint 6 here */ (gdb) record btrace (gdb) b factorial Breakpoint 2 at 0x40121b: file /home/kevinb/sourceware-git/native-build/bld/../../binutils-gdb/gdb/testsuite/gdb.base/break.c, line 63. (gdb) c Continuing. Breakpoint 2, factorial (value=6) at /home/kevinb/sourceware-git/native-build/bld/../../binutils-gdb/gdb/testsuite/gdb.base/break.c:63 63 if (value > 1) { /* set breakpoint 7 here */ (gdb) info record Active record target: record-btrace Recording format: Branch Trace Store. Buffer size: 64kB. Recorded 768 instructions in 22 functions (0 gaps) for thread 1 (process 19215). (gdb) record function-call-history 13 do_lookup_x 14 _dl_lookup_symbol_x 15 _dl_fixup 16 _dl_runtime_resolve_xsavec 17 atoi 18 strtoq 19 ____strtoll_l_internal 20 atoi 21 main 22 factorial (gdb) record instruction-history 759 0x00007ffff7ce0917 <____strtoll_l_internal+647>: pop %r15 760 0x00007ffff7ce0919 <____strtoll_l_internal+649>: retq 761 0x00007ffff7cdd064 <atoi+20>: add $0x8,%rsp 762 0x00007ffff7cdd068 <atoi+24>: retq 763 0x00000000004011b1 <main+75>: mov %eax,%edi 764 0x00000000004011b3 <main+77>: callq 0x401210 <factorial> 765 0x0000000000401210 <factorial+0>: push %rbp 766 0x0000000000401211 <factorial+1>: mov %rsp,%rbp 767 0x0000000000401214 <factorial+4>: sub $0x10,%rsp 768 0x0000000000401218 <factorial+8>: mov %edi,-0x4(%rbp) AMD machine - Wrong behavior: [kev@f32-1 gdb]$ ./gdb -q testsuite/outputs/gdb.base/break/break Reading symbols from testsuite/outputs/gdb.base/break/break... (gdb) start Temporary breakpoint 1 at 0x401179: file /ironwood1/sourceware-git/f32-master/bld/../../worktree-master/gdb/testsuite/gdb.base/break.c, line 43. Starting program: /mesquite2/sourceware-git/f32-master/bld/gdb/testsuite/outputs/gdb.base/break/break Temporary breakpoint 1, main (argc=1, argv=0x7fffffffd5b8, envp=0x7fffffffd5c8) at /ironwood1/sourceware-git/f32-master/bld/../../worktree-master/gdb/testsuite/gdb.base/break.c:43 43 if (argc == 12345) { /* an unlikely value < 2^16, in case uninited */ /* set breakpoint 6 here */ (gdb) record btrace (gdb) b factorial Breakpoint 2 at 0x40121b: file /ironwood1/sourceware-git/f32-master/bld/../../worktree-master/gdb/testsuite/gdb.base/break.c, line 63. (gdb) c Continuing. Breakpoint 2, factorial (value=6) at /ironwood1/sourceware-git/f32-master/bld/../../worktree-master/gdb/testsuite/gdb.base/break.c:63 63 if (value > 1) { /* set breakpoint 7 here */ (gdb) info record Active record target: record-btrace Recording format: Branch Trace Store. Buffer size: 64kB. warning: Recorded trace may be incomplete at instruction 7737 (pc = 0x405000). warning: Recorded trace may be incomplete at instruction 7739 (pc = 0x0). Recorded 7740 instructions in 46 functions (2 gaps) for thread 1 (process 1402911). (gdb) record function-call-history 37 ?? 38 values 39 some_enum_global 40 ?? 41 some_union_global 42 some_variable 43 ?? 44 [decode error (2): unknown instruction] 45 ?? 46 [decode error (2): unknown instruction] (gdb) record instruction-history 7730 0x0000000000404ff3: add %al,(%rax) 7731 0x0000000000404ff5: add %al,(%rax) 7732 0x0000000000404ff7: add %al,(%rax) 7733 0x0000000000404ff9: add %al,(%rax) 7734 0x0000000000404ffb: add %al,(%rax) 7735 0x0000000000404ffd: add %al,(%rax) 7736 0x0000000000404fff: .byte 0x0 7737 0x0000000000405000: Cannot access memory at address 0x405000 Lastly, I'll note that I see a lot of gdb.btrace failures without this commit. Worse still, the results aren't always the same which causes a lot of noise when comparing test results. gdbsupport/ChangeLog: * btrace-common.h (btrace_cpu_vendor): Add CV_AMD. gdb/ChangeLog: * nat/linux-btrace.c (btrace_this_cpu): Add check for AMD processors. (cpu_supports_bts): Add CV_AMD case.
264 lines
6.4 KiB
C++
264 lines
6.4 KiB
C++
/* Branch trace support for GDB, the GNU debugger.
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Copyright (C) 2013-2020 Free Software Foundation, Inc.
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Contributed by Intel Corp. <markus.t.metzger@intel.com>.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef COMMON_BTRACE_COMMON_H
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#define COMMON_BTRACE_COMMON_H
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/* Branch tracing (btrace) is a per-thread control-flow execution trace of the
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inferior. For presentation purposes, the branch trace is represented as a
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list of sequential control-flow blocks, one such list per thread. */
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/* A branch trace block.
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This represents a block of sequential control-flow. Adjacent blocks will be
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connected via calls, returns, or jumps. The latter can be direct or
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indirect, conditional or unconditional. Branches can further be
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asynchronous, e.g. interrupts. */
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struct btrace_block
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{
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/* The address of the first byte of the first instruction in the block.
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The address may be zero if we do not know the beginning of this block,
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such as for the first block in a delta trace. */
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CORE_ADDR begin;
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/* The address of the first byte of the last instruction in the block. */
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CORE_ADDR end;
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/* Simple constructor. */
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btrace_block (CORE_ADDR begin, CORE_ADDR end)
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: begin (begin),
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end (end)
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{
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/* Nothing. */
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}
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};
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/* Enumeration of btrace formats. */
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enum btrace_format
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{
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/* No branch trace format. */
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BTRACE_FORMAT_NONE,
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/* Branch trace is in Branch Trace Store (BTS) format.
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Actually, the format is a sequence of blocks derived from BTS. */
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BTRACE_FORMAT_BTS,
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/* Branch trace is in Intel Processor Trace format. */
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BTRACE_FORMAT_PT
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};
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/* An enumeration of cpu vendors. */
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enum btrace_cpu_vendor
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{
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/* We do not know this vendor. */
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CV_UNKNOWN,
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/* Intel. */
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CV_INTEL,
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/* AMD. */
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CV_AMD
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};
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/* A cpu identifier. */
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struct btrace_cpu
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{
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/* The processor vendor. */
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enum btrace_cpu_vendor vendor;
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/* The cpu family. */
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unsigned short family;
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/* The cpu model. */
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unsigned char model;
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/* The cpu stepping. */
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unsigned char stepping;
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};
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/* A BTS configuration. */
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struct btrace_config_bts
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{
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/* The size of the branch trace buffer in bytes.
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This is unsigned int and not size_t since it is registered as
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control variable for "set record btrace bts buffer-size". */
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unsigned int size;
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};
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/* An Intel Processor Trace configuration. */
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struct btrace_config_pt
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{
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/* The size of the branch trace buffer in bytes.
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This is unsigned int and not size_t since it is registered as
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control variable for "set record btrace pt buffer-size". */
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unsigned int size;
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};
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/* A branch tracing configuration.
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This describes the requested configuration as well as the actually
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obtained configuration.
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We describe the configuration for all different formats so we can
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easily switch between formats. */
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struct btrace_config
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{
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/* The branch tracing format. */
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enum btrace_format format;
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/* The BTS format configuration. */
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struct btrace_config_bts bts;
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/* The Intel Processor Trace format configuration. */
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struct btrace_config_pt pt;
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};
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/* Branch trace in BTS format. */
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struct btrace_data_bts
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{
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/* Branch trace is represented as a vector of branch trace blocks starting
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with the most recent block. This needs to be a pointer as we place
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btrace_data_bts into a union. */
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std::vector<btrace_block> *blocks;
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};
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/* Configuration information to go with the trace data. */
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struct btrace_data_pt_config
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{
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/* The processor on which the trace has been collected. */
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struct btrace_cpu cpu;
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};
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/* Branch trace in Intel Processor Trace format. */
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struct btrace_data_pt
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{
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/* Some configuration information to go with the data. */
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struct btrace_data_pt_config config;
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/* The trace data. */
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gdb_byte *data;
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/* The size of DATA in bytes. */
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size_t size;
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};
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/* The branch trace data. */
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struct btrace_data
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{
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btrace_data () = default;
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~btrace_data ()
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{
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fini ();
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}
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btrace_data &operator= (btrace_data &&other)
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{
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if (this != &other)
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{
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fini ();
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format = other.format;
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variant = other.variant;
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other.format = BTRACE_FORMAT_NONE;
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}
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return *this;
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}
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/* Return true if this is empty; false otherwise. */
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bool empty () const;
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/* Clear this object. */
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void clear ();
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enum btrace_format format = BTRACE_FORMAT_NONE;
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union
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{
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/* Format == BTRACE_FORMAT_BTS. */
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struct btrace_data_bts bts;
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/* Format == BTRACE_FORMAT_PT. */
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struct btrace_data_pt pt;
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} variant;
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private:
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DISABLE_COPY_AND_ASSIGN (btrace_data);
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void fini ();
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};
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/* Target specific branch trace information. */
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struct btrace_target_info;
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/* Enumeration of btrace read types. */
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enum btrace_read_type
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{
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/* Send all available trace. */
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BTRACE_READ_ALL,
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/* Send all available trace, if it changed. */
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BTRACE_READ_NEW,
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/* Send the trace since the last request. This will fail if the trace
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buffer overflowed. */
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BTRACE_READ_DELTA
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};
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/* Enumeration of btrace errors. */
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enum btrace_error
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{
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/* No error. Everything is OK. */
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BTRACE_ERR_NONE,
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/* An unknown error. */
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BTRACE_ERR_UNKNOWN,
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/* Branch tracing is not supported on this system. */
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BTRACE_ERR_NOT_SUPPORTED,
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/* The branch trace buffer overflowed; no delta read possible. */
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BTRACE_ERR_OVERFLOW
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};
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/* Return a string representation of FORMAT. */
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extern const char *btrace_format_string (enum btrace_format format);
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/* Return an abbreviation string representation of FORMAT. */
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extern const char *btrace_format_short_string (enum btrace_format format);
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/* Append the branch trace data from SRC to the end of DST.
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Both SRC and DST must use the same format.
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Returns zero on success; a negative number otherwise. */
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extern int btrace_data_append (struct btrace_data *dst,
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const struct btrace_data *src);
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#endif /* COMMON_BTRACE_COMMON_H */
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