276 lines
8.7 KiB
C
276 lines
8.7 KiB
C
/* Native support for the SGI Iris running IRIX version 5, for GDB.
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Copyright (C) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998,
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1999, 2000, 2001, 2002, 2004, 2006, 2007, 2008, 2009, 2010
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Free Software Foundation, Inc.
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Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
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and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
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Implemented for Irix 4.x by Garrett A. Wollman.
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Modified for Irix 5.x by Ian Lance Taylor.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "inferior.h"
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#include "gdbcore.h"
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#include "target.h"
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#include "regcache.h"
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#include "procfs.h"
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#include "gdb_string.h"
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#include <sys/time.h>
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#include <sys/procfs.h>
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#include <setjmp.h> /* For JB_XXX. */
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/* Prototypes for supply_gregset etc. */
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#include "gregset.h"
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#include "mips-tdep.h"
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static void fetch_core_registers (struct regcache *, char *,
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unsigned int, int, CORE_ADDR);
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/*
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* See the comment in m68k-tdep.c regarding the utility of these functions.
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*
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* These definitions are from the MIPS SVR4 ABI, so they may work for
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* any MIPS SVR4 target.
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*/
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void
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supply_gregset (struct regcache *regcache, const gregset_t *gregsetp)
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{
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int regi;
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const greg_t *regp = &(*gregsetp)[0];
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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int gregoff = sizeof (greg_t) - mips_isa_regsize (gdbarch);
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static char zerobuf[32] = {0};
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for (regi = 0; regi <= CTX_RA; regi++)
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regcache_raw_supply (regcache, regi,
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(const char *) (regp + regi) + gregoff);
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regcache_raw_supply (regcache, mips_regnum (gdbarch)->pc,
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(const char *) (regp + CTX_EPC) + gregoff);
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regcache_raw_supply (regcache, mips_regnum (gdbarch)->hi,
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(const char *) (regp + CTX_MDHI) + gregoff);
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regcache_raw_supply (regcache, mips_regnum (gdbarch)->lo,
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(const char *) (regp + CTX_MDLO) + gregoff);
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regcache_raw_supply (regcache, mips_regnum (gdbarch)->cause,
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(const char *) (regp + CTX_CAUSE) + gregoff);
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/* Fill inaccessible registers with zero. */
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regcache_raw_supply (regcache, mips_regnum (gdbarch)->badvaddr, zerobuf);
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}
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void
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fill_gregset (const struct regcache *regcache, gregset_t *gregsetp, int regno)
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{
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int regi, size;
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greg_t *regp = &(*gregsetp)[0];
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gdb_byte buf[MAX_REGISTER_SIZE];
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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/* Under Irix6, if GDB is built with N32 ABI and is debugging an O32
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executable, we have to sign extend the registers to 64 bits before
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filling in the gregset structure. */
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for (regi = 0; regi <= CTX_RA; regi++)
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if ((regno == -1) || (regno == regi))
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{
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size = register_size (gdbarch, regi);
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regcache_raw_collect (regcache, regi, buf);
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*(regp + regi) = extract_signed_integer (buf, size, byte_order);
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}
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if ((regno == -1) || (regno == mips_regnum (gdbarch)->pc))
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{
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regi = mips_regnum (gdbarch)->pc;
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size = register_size (gdbarch, regi);
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regcache_raw_collect (regcache, regi, buf);
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*(regp + CTX_EPC) = extract_signed_integer (buf, size, byte_order);
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}
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if ((regno == -1) || (regno == mips_regnum (gdbarch)->cause))
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{
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regi = mips_regnum (gdbarch)->cause;
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size = register_size (gdbarch, regi);
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regcache_raw_collect (regcache, regi, buf);
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*(regp + CTX_CAUSE) = extract_signed_integer (buf, size, byte_order);
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}
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if ((regno == -1) || (regno == mips_regnum (gdbarch)->hi))
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{
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regi = mips_regnum (gdbarch)->hi;
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size = register_size (gdbarch, regi);
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regcache_raw_collect (regcache, regi, buf);
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*(regp + CTX_MDHI) = extract_signed_integer (buf, size, byte_order);
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}
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if ((regno == -1) || (regno == mips_regnum (gdbarch)->lo))
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{
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regi = mips_regnum (gdbarch)->lo;
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size = register_size (gdbarch, regi);
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regcache_raw_collect (regcache, regi, buf);
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*(regp + CTX_MDLO) = extract_signed_integer (buf, size, byte_order);
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}
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}
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/*
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* Now we do the same thing for floating-point registers.
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* We don't bother to condition on gdbarch_fp0_regnum since any
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* reasonable MIPS configuration has an R3010 in it.
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*
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* Again, see the comments in m68k-tdep.c.
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*/
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void
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supply_fpregset (struct regcache *regcache, const fpregset_t *fpregsetp)
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{
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int regi;
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static char zerobuf[32] = {0};
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char fsrbuf[8];
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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/* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs. */
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for (regi = 0; regi < 32; regi++)
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regcache_raw_supply (regcache, gdbarch_fp0_regnum (gdbarch) + regi,
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(const char *) &fpregsetp->__fp_r.__fp_regs[regi]);
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/* We can't supply the FSR register directly to the regcache,
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because there is a size issue: On one hand, fpregsetp->fp_csr
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is 32bits long, while the regcache expects a 64bits long value.
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So we use a buffer of the correct size and copy into it the register
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value at the proper location. */
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memset (fsrbuf, 0, 4);
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memcpy (fsrbuf + 4, &fpregsetp->__fp_csr, 4);
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regcache_raw_supply (regcache,
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mips_regnum (gdbarch)->fp_control_status, fsrbuf);
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/* FIXME: how can we supply FCRIR? SGI doesn't tell us. */
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regcache_raw_supply (regcache,
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mips_regnum (gdbarch)->fp_implementation_revision,
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zerobuf);
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}
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void
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fill_fpregset (const struct regcache *regcache, fpregset_t *fpregsetp, int regno)
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{
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int regi;
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char *from, *to;
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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/* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs. */
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for (regi = gdbarch_fp0_regnum (gdbarch);
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regi < gdbarch_fp0_regnum (gdbarch) + 32; regi++)
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{
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if ((regno == -1) || (regno == regi))
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{
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const int fp0_regnum = gdbarch_fp0_regnum (gdbarch);
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to = (char *) &(fpregsetp->__fp_r.__fp_regs[regi - fp0_regnum]);
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regcache_raw_collect (regcache, regi, to);
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}
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}
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if (regno == -1
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|| regno == mips_regnum (gdbarch)->fp_control_status)
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{
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char fsrbuf[8];
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/* We can't fill the FSR register directly from the regcache,
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because there is a size issue: On one hand, fpregsetp->fp_csr
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is 32bits long, while the regcache expects a 64bits long buffer.
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So we use a buffer of the correct size and copy the register
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value from that buffer. */
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regcache_raw_collect (regcache,
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mips_regnum (gdbarch)->fp_control_status, fsrbuf);
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memcpy (&fpregsetp->__fp_csr, fsrbuf + 4, 4);
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}
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}
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/* Provide registers to GDB from a core file.
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CORE_REG_SECT points to an array of bytes, which were obtained from
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a core file which BFD thinks might contain register contents.
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CORE_REG_SIZE is its size.
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Normally, WHICH says which register set corelow suspects this is:
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0 --- the general-purpose register set
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2 --- the floating-point register set
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However, for Irix 5, WHICH isn't used.
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REG_ADDR is also unused. */
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static void
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fetch_core_registers (struct regcache *regcache,
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char *core_reg_sect, unsigned core_reg_size,
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int which, CORE_ADDR reg_addr)
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{
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char *srcp = core_reg_sect;
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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int regsize = mips_isa_regsize (gdbarch);
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int regno;
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/* If regsize is 8, this is a N32 or N64 core file.
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If regsize is 4, this is an O32 core file. */
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if (core_reg_size != regsize * gdbarch_num_regs (gdbarch))
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{
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warning (_("wrong size gregset struct in core file"));
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return;
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}
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for (regno = 0; regno < gdbarch_num_regs (gdbarch); regno++)
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{
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regcache_raw_supply (regcache, regno, srcp);
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srcp += regsize;
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}
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}
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/* Register that we are able to handle irix5 core file formats.
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This really is bfd_target_unknown_flavour */
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static struct core_fns irix5_core_fns =
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{
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bfd_target_unknown_flavour, /* core_flavour */
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default_check_format, /* check_format */
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default_core_sniffer, /* core_sniffer */
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fetch_core_registers, /* core_read_registers */
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NULL /* next */
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};
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/* Provide a prototype to silence -Wmissing-prototypes. */
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extern initialize_file_ftype _initialize_irix5_nat;
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void
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_initialize_irix5_nat (void)
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{
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struct target_ops *t;
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t = procfs_target ();
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procfs_use_watchpoints (t);
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add_target (t);
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deprecated_add_core_fns (&irix5_core_fns);
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}
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