1999-11-09 17:45:49 +01:00
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/* Prototypes for exported functions defined in arm.c and pe.c
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backport: re PR target/12476 (ARM/THUMB thunk calls broken)
Merge from csl-arm-branch.
2004-01-30 Paul Brook <paul@codesourcery.com>
* aof.h (REGISTER_NAMES): Add vfp reg names
(ADDITIONAL_REGISTER_NAMES): Ditto.
* aout.h (REGISTER_NAMES): Ditto.
(ADDITIONAL_REGISTER_NAMES): Ditto.
* arm-protos.h: Update/Add Prototypes.
* arm.c (init_fp_table): Rename from init_fpa_table. Update users.
Only allow 0.0 for VFP.
(fp_consts_inited): Rename from fpa_consts_inited. Update users.
(values_fp): Rename from values_fpa. Update Users.
(arm_const_double_rtx): Rename from const_double_rtx_ok_for_fpa.
Update users. Only check valid constants for this hardware.
(arm_float_rhs_operand): Rename from fpa_rhs_operand. Update Users.
Only allow consts for FPA.
(arm_float_add_operand): Rename from fpa_add_operand. Update users.
Only allow consts for FPA.
(use_return_insn): Check for saved VFP regs.
(arm_legitimate_address_p): Handle VFP DFmode addressing.
(arm_legitimize_address): Ditto.
(arm_general_register_operand): New function.
(vfp_mem_operand): New function.
(vfp_compare_operand): New function.
(vfp_secondary_reload_class): New function.
(arm_float_compare_operand): New function.
(vfp_print_multi): New function.
(vfp_output_fstmx): New function.
(vfp_emit_fstm): New function.
(arm_output_epilogue): Output VPF reg restore code.
(arm_expand_prologue): Output VFP reg save code.
(arm_print_operand): Add 'P'.
(arm_hard_regno_mode_ok): Return modes for VFP regs.
(arm_regno_class): Return classes for VFP regs.
(arm_compute_initial_elimination_offset): Include space for VFP regs.
(arm_get_frame_size): Ditto.
* arm.h (FIXED_REGISTERS): Add VFP regs.
(CALL_USED_REGISTERS): Ditto.
(CONDITIONAL_REGISTER_USAGE): Enable VFP regs.
(FIRST_VFP_REGNUM): Define.
(LAST_VFP_REGNUM): Define.
(IS_VFP_REGNUM): Define.
(FIRST_PSEUDO_REGISTER): Include VFP regs.
(HARD_REGNO_NREGS): Handle VFP regs.
(REG_ALLOC_ORDER): Add VFP regs.
(enum reg_class): Add VFP_REGS.
(REG_CLASS_NAMES): Ditto.
(REG_CLASS_CONTENTS): Ditto.
(CANNOT_CHANGE_MODE_CLASS) Handle VFP Regs.
(REG_CLASS_FROM_LETTER): Add 'w'.
(EXTRA_CONSTRAINT_ARM): Add 'U'.
(EXTRA_MEMORY_CONSTRAINT): Define.
(SECONDARY_OUTPUT_RELOAD_CLASS): Handle VFP regs.
(SECONDARY_INPUT_RELOAD_CLASS): Ditto.
(REGISTER_MOVE_COST): Ditto.
(PREDICATE_CODES): Add arm_general_register_operand,
arm_float_compare_operand and vfp_compare_operand.
* arm.md (various): Rename as above.
(divsf3): Enable when TARGET_VFP.
(divdf3): Ditto.
(movdfcc): Ditto.
(sqrtsf2): Ditto.
(sqrtdf2): Ditto.
(arm_movdi): Disable when TARGET_VFP.
(arm_movsi_insn): Ditto.
(movsi): Only split with general regs.
(cmpsf): Use arm_float_compare_operand.
(push_fp_multi): Restrict to TARGET_FPA.
(vfp.md): Include.
* vfp.md: New file.
* fpa.md (various): Rename as above.
* doc/md.texi: Document ARM w and U constraints.
2004-01-15 Paul Brook <paul@codesourcery.com>
* config.gcc: Add with_fpu. Allow with-float=softfp.
* config/arm/arm.c (arm_override_options): Rename *-s to *s.
Break out of loop when we find a float-abi. Fix typo.
* config/arm/arm.h (OPTION_DEFAULT_SPECS): Add "fpu".
Set -mfloat-abi=.
* doc/install.texi: Document --with-fpu.
2003-01-14 Paul Brook <paul@codesourcery.com>
* config.gcc (with_arch): Add armv6.
* config/arm/arm.h: Rename TARGET_CPU_*_s to TARGET_CPU_*s.
* config/arm/arm.c (arm_overrride_options): Ditto.
2004-01-08 Richard Earnshaw <rearnsha@arm.com>
* arm.c (FL_ARCH3M): Renamed from FL_FAST_MULT.
(FL_ARCH6): Renamed from FL_ARCH6J.
(arm_arch3m): Renamed from arm_fast_multiply.
(arm_arch6): Renamed from arm_arch6j.
* arm.h: Update all uses of above.
* arm-cores.def: Likewise.
* arm.md: Likewise.
* arm.h (CPP_CPU_ARCH_SPEC): Emit __ARM_ARCH_6J__ define for armV6j,
not arm6j. Add entry for arch armv6.
2004-01-07 Richard Earnshaw <rearnsha@arm.com>
* arm.c (arm_emit_extendsi): Delete.
* arm-protos.h (arm_emit_extendsi): Delete.
* arm.md (zero_extendhisi2): Also handle zero-extension of
non-subregs.
(zero_extendqisi2, extendhisi2, extendqisi2): Likewise.
(thumb_zero_extendhisi2): Only match if not v6.
(arm_zero_extendhisi2, thumb_zero_extendqisi2, arm_zero_extendqisi2)
(thumb_extendhisi2, arm_extendhisi2, arm_extendqisi)
(thumb_extendqisi2): Likewise.
(thumb_zero_extendhisi2_v6, arm_zero_extendhisi2_v6): New patterns.
(thumb_zero_extendqisi2_v6, arm_zero_extendqisi2_v6): New patterns.
(thumb_extendhisi2_insn_v6, arm_extendhisi2_v6): New patterns.
(thumb_extendqisi2_v6, arm_extendqisi_v6): New patterns.
(arm_zero_extendhisi2_reg, arm_zero_extendqisi2_reg): Delete.
(arm_extendhisi2_reg, arm_extendqisi2_reg): Delete.
(arm_zero_extendhisi2addsi): Remove subreg. Add attributes.
(arm_zero_extendqisi2addsi, arm_extendhisi2addsi): Likewise.
(arm_extendqisi2addsi): Likewise.
2003-12-31 Mark Mitchell <mark@codesourcery.com>
Revert this change:
* config/arm/arm.h (THUMB_LEGTITIMIZE_RELOAD_ADDRESS): Reload REG
+ REG addressing modes.
* config/arm/arm.h (THUMB_LEGTITIMIZE_RELOAD_ADDRESS): Reload REG
+ REG addressing modes.
2003-12-30 Mark Mitchell <mark@codesourcery.com>
* config/arm/arm.h (THUMB_LEGITIMATE_CONSTANT_P): Accept
CONSTANT_P_RTX.
2003-30-12 Paul Brook <paul@codesourcery.com>
* longlong.h: protect arm inlines with !defined (__thumb__)
2003-30-12 Paul Brook <paul@codesourcery.com>
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Always define __arm__.
2003-12-30 Nathan Sidwell <nathan@codesourcery.com>
* builtins.c (expand_builtin_apply_args_1): Fix typo in previous
change.
2003-12-29 Nathan Sidwell <nathan@codesourcery.com>
* builtins.c (expand_builtin_apply_args_1): Add pretend args size
to the virtual incoming args pointer for downward stacks.
2003-12-29 Paul Brook <paul@codesourcery.com>
* config/arm/arm-cores.def: Add cost function.
* config/arm/arm.c (arm_*_rtx_costs): New functions.
(arm_rtx_costs): Remove
(struct processors): Add rtx_costs field.
(all_cores, all_architectures): Ditto.
(arm_override_options): Set targetm.rtx_costs.
(thumb_rtx_costs): New function.
(arm_rtx_costs_1): Remove cases handled elsewhere.
* config/arm/arm.h (processor_type): Add COSTS parameter.
2003-12-29 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm.md (generic_sched): arm926 has its own scheduler.
(arm926ejs.md): Include it.
* config/arm/arm926ejs.md: New pipeline description.
2003-12-24 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (arm_arch6j): New variable.
(arm_override_options): Set it.
(arm_emit_extendsi): New function.
* config/arm/arm-protos.h (arm_emit_extendsi): Add prototype.
* config/arm/arm.h (arm_arch6j): Declare.
* config/arm/arm.md: Add sign/zero extend insns.
2003-12-23 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (all_architectures): Add armv6.
* doc/invoke.texi: Document it.
2003-12-19 Paul Brook <paul@codesourcery.com>
* config/arm/arm.md: Add load1 and load_byte "type" attrs. Modify
insn patterns to match.
* config/arm/arm-generic.md: Ditto.
* config/arm/cirrus.md: Ditto.
* config/arm/fpa.md: Ditto.
* config/amm/iwmmxt.md: Ditto.
* config/arm/arm1026ejs.md: Ditto.
* config/arm/arm1135jfs.md: Ditto. Add insn_reservation and bypasses
for 11_loadb.
2003-12-18 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm-protos.h (arm_no_early_alu_shift_value_dep): Declare.
* config/arm/arm.c (arm_adjust_cost): Check shift cost for
TYPE_ALU_SHIFT and TYPE_ALU_SHIFT_REG.
(arm_no_early_store_addr_dep, arm_no_early_alu_shift_dep,
arm_no_early_mul_dep): Correctly deal with conditional execution,
parallels and single shift operations.
(arm_no_early_alu_shift_value_dep): Define.
* arm.md (attr type): Replace 'normal' with 'alu',
'alu_shift' and 'alu_shift_reg'.
(attr core_cycles): Adjust.
(*addsi3_carryin_shift, andsi_not_shiftsi_si, *arm_shiftsi3,
*shiftsi3_compare0, *notsi_shiftsi, *notsi_shiftsi_compare0,
*not_shiftsi_compare0_scratch, *cmpsi_shiftsi, *cmpsi_shiftsi_swp,
*cmpsi_neg_shiftsi, *arith_shiftsi, *arith_shiftsi_compare0,
*arith_shiftsi_compare0_scratch, *sub_shiftsi,
*sub_shiftsi_compare0, *sub_shiftsi_compare0_scratch,
*if_shift_move, *if_move_shift, *if_shift_shift): Set type
attribute appropriately.
* config/arm/arm1026ejs.md (alu_op): Adjust.
(alu_shift_op, alu_shift_reg_op): New.
* config/arm/arm1136.md: Add better bypasses for early
registers. Remove load[234] and store[234] bypasses.
(11_alu_op): Adjust.
(11_alu_shift_op, 11_alu_shift_reg_op): New.
2003-12-15 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm-protos.h (arm_no_early_store_addr_dep,
arm_no_early_alu_shift_dep, arm_no_early_mul_dep): Declare.
* config/arm/arm.c (arm_no_early_store_addr_dep,
arm_no_early_alu_shift_dep, arm_no_early_mul_dep): Define.
* config/arm/arm1026ejs.md: Add load-store bypass.
* config/arm/arm1136jfs.md (11_alu_op): Take 2 cycles.
Add bypasses between instructions.
2003-12-10 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (arm_fpu_model): New variable.
(arm_fload_abi): New variable.
(target_fpe_name): Rename from target_fp_name.
(target_fpu_name): New variable.
(arm_is_cirrus): Remove.
(fpu_desc): New struct.
(all_fpus): Define.
(pf_model_for_fpu): Define.
(all_loat_abis): Define.
(arm_override_options): Set fp arch flags based on -mfpu=
and -float-abi=.
(FIRST_FPA_REGNUM): Rename from FIRST_ARM_FP_REGNUM.
(LAST_FPA_REGNUM): Rename from LAST_ARM_FP_REGNUM.
(*): Use new TARGET_* flags.
* config/arm/arm.h (TARGET_ANY_HARD_FLOAT): Remove.
(TARGET_HARD_FLOAT): No longer implies TARGET_FPA.
(TARGET_SOFT_FLOAT): Ditto.
(TARGET_SOFT_FLOAT_ABI): New.
(TARGET_MAVERICK): Rename from TARGET_CIRRUS. No longer implies
TARGET_HARD_FLOAT.
(TARGET_VFP): No longer implies TARGET_HARD_FLOAT.
(TARGET_OPTIONS): Add -mfpu=.
(FIRST_FPA_REGNUM): Rename from FIRST_ARM_FP_REGNUM.
(LAST_FPA_REGNUM): Rename from LAST_ARM_FP_REGNUM.
(arm_pf_model): Define.
(arm_float_abi_type): Define.
(fputype): Add FPUTYPE_VFP. Change SOFT_FPA->NONE
* config/arm/arm.md: Use new TARGET_* flags.
* config/arm/cirrus.md: Ditto.
* config/arm/fpa.md: Ditto.
* config/arm/elf.h (ASM_SPEC): Pass -mfloat-abi= and -mfpu=.
* config/arm/semi.h (ASM_SPEC): Ditto.
* config/arm/netbsd-elf.h (SUBTARGET_ASM_FLOAT_SPEC): Specify vfp.
(FPUTYPE_DEFAULT): Set to VFP.
* doc/invoke.texi: Document -mfpu= and -mfloat-abi=.
2003-11-22 Phil Edwards <phil@codesourcery.com>
PR target/12476
* config/arm/arm.c (arm_output_mi_thunk): In Thumb mode, use
'bx' instead of 'b' to avoid branch range restrictions. Output
the thunk immediately before the thunked-to function.
* config/arm/arm.h (ARM_DECLARE_FUNCTION_NAME): Do not emit
.thumb_func if a thunk is being generated. Emit .code 16 along
with .thumb_func if a thunk is not being generated.
2003-11-15 Nicolas Pitre <nico@cam.org>
* config/arm/arm.md (ashldi3, arm_ashldi3_1bit, ashrdi3,
arm_ashrdi3_1bit, lshrdi3, arm_lshrdi3_1bit): New patterns.
* config/arm/iwmmxt.md (ashrdi3_iwmmxt): Renamed from ashrdi3.
(lshrdi3_iwmmxt): Renamed from lshrdi3.
* config/arm/arm.c (IWMMXT_BUILTIN2): Renamed argument accordingly.
2003-11-12 Steve Woodford <scw@wasabisystems.com>
Ian Lance Taylor <ian@wasabisystems.com>
* config/arm/lib1funcs.asm (ARM_DIV_BODY, ARM_MOD_BODY): Add new
code for __ARM_ARCH__ >= 5 && ! defined (__OPTIMIZE_SIZE__).
2003-11-05 Phil Edwards <phil@codesourcery.com>
* config/arm/arm.md (insn): Add new V6 instruction names.
(generic_sched): New attr.
* config/arm/arm-generic.md: Use generic_sched here.
* config/arm/arm1026ejs.md: Do not model fetch/issue/decode
stages of pipeline. Adjust latency counts accordingly.
* config/arm/arm1136jfs.md: New file.
2003-10-28 Mark Mitchell <mark@codesourcery.com>
* config/arm/arm.h (processor_type): New enumeration type.
(CPP_ARCH_DEFAULT_SPEC): Set appropriately for ARM 926EJ-S,
ARM1026EJ-S, ARM1136J-S, and ARM1136JF-S processor cores.
(CPP_CPU_ARCH_SPEC): Likewise.
* config/arm/arm.c (arm_tune): New variable.
(all_cores): Use cores.def.
(all_architectures): Add representative processor.
(arm_override_options): Restructure way in which tuning
information is deduced.
* arm.md: Update "insn" and "type" attributes throughout.
(insn): New attribute.
(type): Compute "mult" from "insn" attribute. Add load2,
load3, load4 alternatives.
(arm automaton): Move to arm-generic.md.
* config/arm/arm-cores.def: New file.
* config/arm/arm-generic.md: Likewise.
* config/arm/arm1026ejs.md: Likewise.
From-SVN: r77171
2004-02-03 15:45:44 +01:00
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Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004
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Free Software Foundation, Inc.
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1999-11-09 17:45:49 +01:00
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Contributed by Richard Earnshaw (rearnsha@arm.com)
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Minor hacks by Nick Clifton (nickc@cygnus.com)
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2003-02-10 17:33:09 +01:00
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This file is part of GCC.
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1999-11-09 17:45:49 +01:00
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2003-02-10 17:33:09 +01:00
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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1999-11-09 17:45:49 +01:00
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2003-02-10 17:33:09 +01:00
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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1999-11-09 17:45:49 +01:00
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2003-02-10 17:33:09 +01:00
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING. If not, write to
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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1999-11-09 17:45:49 +01:00
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c-pragma.h: Define HANDLE_GENERIC_PRAGMAS if REGISTER_TARGET_PRAGMAS is defined.
* c-pragma.h: Define HANDLE_GENERIC_PRAGMAS if
REGISTER_TARGET_PRAGMAS is defined. Duplicate some
definitions from cpplib.h.
* cpplib.h: Don't typedef struct cpp_reader if c-pragma.h has
already done it.
* tm.texi: Document HANDLE_PRAGMA as no longer supported. Add
documentation for REGISTER_TARGET_PRAGMAS.
* c-lex.c: Include cpplib.h before c-pragma.h. Define a
default-pragma callback to implement -Wunknown-pragmas if
USE_CPPLIB.
* c-parse.in: Move all includes to top of file.
* c-pragma.c: Include cpplib.h before c-pragma.h. Include
tm_p.h.
(dispatch_pragma): Put the namespace in the -Wunknown-pragmas
warning.
(init_pragma): If REGISTER_TARGET_PRAGMAS is defined, call it.
* arm.h, arm-protos.h, arm.c,
c4x.h, c4x-protos.h, c4x.c,
h8300.h, h8300-protos.h, h8300.c,
i370.h, i370-protos.h, i370.c,
i960.h, i960-protos.h, i960.c,
sh.h, sh-protos.h, sh.c,
v850.h, v850-protos.h, v850.c: Convert HANDLE_PRAGMA-based
pragmata scheme to use REGISTER_TARGET_PRAGMAS instead.
* d30v.h: Don't mention HANDLE_PRAGMA in comment. Add
multiple include guard.
* i370.md (untyped_call): Use GEN_CALL.
(umodsi3): Remove unused variable.
* sh/elf.h: Don't undef HANDLE_SYSV_PRAGMA.
* v850.c (output_move_single, output_move_double): Constify
return value.
(print_operand): Constify a char *.
* v850.h (struct small_memory_info): Constify name member.
From-SVN: r36249
2000-09-08 00:24:34 +02:00
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#ifndef GCC_ARM_PROTOS_H
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#define GCC_ARM_PROTOS_H
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2003-06-10 20:55:17 +02:00
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extern void arm_override_options (void);
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2003-11-20 12:44:19 +01:00
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extern int use_return_insn (int, rtx);
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2003-06-10 20:55:17 +02:00
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extern int arm_regno_class (int);
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extern void arm_finalize_pic (int);
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extern int arm_volatile_func (void);
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2003-11-20 12:44:19 +01:00
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extern const char *arm_output_epilogue (rtx);
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2003-06-10 20:55:17 +02:00
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extern void arm_expand_prologue (void);
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extern const char *arm_strip_name_encoding (const char *);
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extern void arm_asm_output_labelref (FILE *, const char *);
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extern unsigned long arm_current_func_type (void);
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2004-08-11 04:50:14 +02:00
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extern HOST_WIDE_INT arm_compute_initial_elimination_offset (unsigned int,
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unsigned int);
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config.gcc: Add --with-abi=
* config.gcc <arm>: Add --with-abi=
* config/arm/arm-protos.h (arm_get_frame_size, thumb_get_frame_size,
thumb_far_jump_used): Remove prototypes.
(arm_needs_doubleword_align): Add prototype.
(thumb_compute_initial_elimination_offset): Ditto.
* config/arm/arm.c (arm_get_frame_offsets): New function.
(use_return_insn, output_return_instruction, arm_output_epilogue,
arm_output_function_epilogue, arm_compute_initial_elimination_offset,
arm_expand_prologue, thumb_expand_epilogue): Use it.
(arm_abi, target_abi_name, all_arm_abis): New variables.
(arm_override_options): Set them. Set structure padding for AAPCS.
(arm_return_in_memory): Update ABI check.
(arm_init_cumulative_args): Initialize can_split.
(arm_needs_doubleword_align): New function.
(arm_function_arg): Don't split args after pushing to stack. Handle
doubleword/even reg alignment.
(arm_va_arg): Handle all doubleword aligned args.
(add_minpoolforward ref, dump_minpool, push_minpool_fix): Align based
on ABI, not CPU.
(arm_compute_save_reg0_reg12_mask): Fix comment.
(thumb_get_frame_size, thumb_get_frame_size): Remove.
(thumb_jump_far_used_p): Remove superfluous argument. Return save
value for alignment.
(thumb_unexpanded_epilogue, thumb_output_function_prologue): Change
to match.
(thumb_compute_initial_elimination_offset): New function.
(thumb_expand_prologue): Use arm_get_frame_offsets. Remove
unneccessary rounding.
* config/arm/arm.h (target_abi_name): Declare.
(ARM_DOUBLEWORD_ALIGN, DOUBLEWORD_ALIGNMENT, TARGET_IWMMXT_ABI,
arm_abi_type, ARM_DEFAULT_ABI): Define.
(ARM_FLAG_ATPCS): Remove.
(TARGET_OPTIONS, OPTION_DEFAULT_SPECS): Add -mabi=.
(BIGGEST_ALIGNMENT, PREFERRED_STACK_BOUNDARY, STACK_BOUNDARY): Use it.
(ADJUST_FIELD_ALIGN, DATA_ALIGNMENT, LOCAL_ALIGNMENT,
TYPE_NEEDS_IWMMXT_ALIGNMENT): Remove.
(LIBCALL_VALUE, FUNCTION_VALUE_REGNO_P, FUNCTION_ARG_REGNO_P):
Contitionalize on ABI, not CPU.
(struct arm_stack_offsets): Define.
(struct machine_function): Add stack_offsets. Remove frame_size.
(FUNCTION_ARG_PARTIAL_NREGS): Don't split if previous args have been
pushed.
(FUNCTION_ARG_ADVANCE, FUNCTION_ARG_BOUNDARY): Handle general
doubleword alignment.
(THUMB_INITIAL_ELIMINATION_OFFSET,
ARM_INITIAL_ELIMINATION_OFFSET): Remove.
(INITIAL_ELIMINATION_OFFSET): Call functions directly.
* config/arm/arm.md (align_8): Enable for all targets.
* config/arm/netbsd-elf.h (TARGET_DEFAULT): Remove TARGET_ATPCS.
(ARM_DEFAULT_ABI): Define.
* doc/invoke.texi <ARM>: Document -mabi=. Update documentation for
-mstructure-size-boundary.
From-SVN: r79921
2004-03-24 18:20:16 +01:00
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extern HOST_WIDE_INT thumb_compute_initial_elimination_offset (unsigned int,
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unsigned int);
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1999-11-09 17:45:49 +01:00
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#ifdef TREE_CODE
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2003-06-10 20:55:17 +02:00
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extern int arm_return_in_memory (tree);
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extern void arm_encode_call_attribute (tree, int);
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1999-11-09 17:45:49 +01:00
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#endif
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#ifdef RTX_CODE
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2003-06-10 20:55:17 +02:00
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extern int arm_hard_regno_mode_ok (unsigned int, enum machine_mode);
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extern int const_ok_for_arm (HOST_WIDE_INT);
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2004-04-02 01:30:25 +02:00
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extern int arm_split_constant (RTX_CODE, enum machine_mode, rtx,
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HOST_WIDE_INT, rtx, rtx, int);
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2003-06-10 20:55:17 +02:00
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extern RTX_CODE arm_canonicalize_comparison (RTX_CODE, rtx *);
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extern int legitimate_pic_operand_p (rtx);
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extern rtx legitimize_pic_address (rtx, enum machine_mode, rtx);
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2004-03-13 12:19:23 +01:00
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extern int arm_legitimate_address_p (enum machine_mode, rtx, RTX_CODE, int);
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2003-06-10 20:55:17 +02:00
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extern int thumb_legitimate_address_p (enum machine_mode, rtx, int);
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extern int thumb_legitimate_offset_p (enum machine_mode, HOST_WIDE_INT);
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extern rtx arm_legitimize_address (rtx, rtx, enum machine_mode);
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2004-02-25 18:03:27 +01:00
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extern rtx thumb_legitimize_address (rtx, rtx, enum machine_mode);
|
backport: re PR target/12476 (ARM/THUMB thunk calls broken)
Merge from csl-arm-branch.
2004-01-30 Paul Brook <paul@codesourcery.com>
* aof.h (REGISTER_NAMES): Add vfp reg names
(ADDITIONAL_REGISTER_NAMES): Ditto.
* aout.h (REGISTER_NAMES): Ditto.
(ADDITIONAL_REGISTER_NAMES): Ditto.
* arm-protos.h: Update/Add Prototypes.
* arm.c (init_fp_table): Rename from init_fpa_table. Update users.
Only allow 0.0 for VFP.
(fp_consts_inited): Rename from fpa_consts_inited. Update users.
(values_fp): Rename from values_fpa. Update Users.
(arm_const_double_rtx): Rename from const_double_rtx_ok_for_fpa.
Update users. Only check valid constants for this hardware.
(arm_float_rhs_operand): Rename from fpa_rhs_operand. Update Users.
Only allow consts for FPA.
(arm_float_add_operand): Rename from fpa_add_operand. Update users.
Only allow consts for FPA.
(use_return_insn): Check for saved VFP regs.
(arm_legitimate_address_p): Handle VFP DFmode addressing.
(arm_legitimize_address): Ditto.
(arm_general_register_operand): New function.
(vfp_mem_operand): New function.
(vfp_compare_operand): New function.
(vfp_secondary_reload_class): New function.
(arm_float_compare_operand): New function.
(vfp_print_multi): New function.
(vfp_output_fstmx): New function.
(vfp_emit_fstm): New function.
(arm_output_epilogue): Output VPF reg restore code.
(arm_expand_prologue): Output VFP reg save code.
(arm_print_operand): Add 'P'.
(arm_hard_regno_mode_ok): Return modes for VFP regs.
(arm_regno_class): Return classes for VFP regs.
(arm_compute_initial_elimination_offset): Include space for VFP regs.
(arm_get_frame_size): Ditto.
* arm.h (FIXED_REGISTERS): Add VFP regs.
(CALL_USED_REGISTERS): Ditto.
(CONDITIONAL_REGISTER_USAGE): Enable VFP regs.
(FIRST_VFP_REGNUM): Define.
(LAST_VFP_REGNUM): Define.
(IS_VFP_REGNUM): Define.
(FIRST_PSEUDO_REGISTER): Include VFP regs.
(HARD_REGNO_NREGS): Handle VFP regs.
(REG_ALLOC_ORDER): Add VFP regs.
(enum reg_class): Add VFP_REGS.
(REG_CLASS_NAMES): Ditto.
(REG_CLASS_CONTENTS): Ditto.
(CANNOT_CHANGE_MODE_CLASS) Handle VFP Regs.
(REG_CLASS_FROM_LETTER): Add 'w'.
(EXTRA_CONSTRAINT_ARM): Add 'U'.
(EXTRA_MEMORY_CONSTRAINT): Define.
(SECONDARY_OUTPUT_RELOAD_CLASS): Handle VFP regs.
(SECONDARY_INPUT_RELOAD_CLASS): Ditto.
(REGISTER_MOVE_COST): Ditto.
(PREDICATE_CODES): Add arm_general_register_operand,
arm_float_compare_operand and vfp_compare_operand.
* arm.md (various): Rename as above.
(divsf3): Enable when TARGET_VFP.
(divdf3): Ditto.
(movdfcc): Ditto.
(sqrtsf2): Ditto.
(sqrtdf2): Ditto.
(arm_movdi): Disable when TARGET_VFP.
(arm_movsi_insn): Ditto.
(movsi): Only split with general regs.
(cmpsf): Use arm_float_compare_operand.
(push_fp_multi): Restrict to TARGET_FPA.
(vfp.md): Include.
* vfp.md: New file.
* fpa.md (various): Rename as above.
* doc/md.texi: Document ARM w and U constraints.
2004-01-15 Paul Brook <paul@codesourcery.com>
* config.gcc: Add with_fpu. Allow with-float=softfp.
* config/arm/arm.c (arm_override_options): Rename *-s to *s.
Break out of loop when we find a float-abi. Fix typo.
* config/arm/arm.h (OPTION_DEFAULT_SPECS): Add "fpu".
Set -mfloat-abi=.
* doc/install.texi: Document --with-fpu.
2003-01-14 Paul Brook <paul@codesourcery.com>
* config.gcc (with_arch): Add armv6.
* config/arm/arm.h: Rename TARGET_CPU_*_s to TARGET_CPU_*s.
* config/arm/arm.c (arm_overrride_options): Ditto.
2004-01-08 Richard Earnshaw <rearnsha@arm.com>
* arm.c (FL_ARCH3M): Renamed from FL_FAST_MULT.
(FL_ARCH6): Renamed from FL_ARCH6J.
(arm_arch3m): Renamed from arm_fast_multiply.
(arm_arch6): Renamed from arm_arch6j.
* arm.h: Update all uses of above.
* arm-cores.def: Likewise.
* arm.md: Likewise.
* arm.h (CPP_CPU_ARCH_SPEC): Emit __ARM_ARCH_6J__ define for armV6j,
not arm6j. Add entry for arch armv6.
2004-01-07 Richard Earnshaw <rearnsha@arm.com>
* arm.c (arm_emit_extendsi): Delete.
* arm-protos.h (arm_emit_extendsi): Delete.
* arm.md (zero_extendhisi2): Also handle zero-extension of
non-subregs.
(zero_extendqisi2, extendhisi2, extendqisi2): Likewise.
(thumb_zero_extendhisi2): Only match if not v6.
(arm_zero_extendhisi2, thumb_zero_extendqisi2, arm_zero_extendqisi2)
(thumb_extendhisi2, arm_extendhisi2, arm_extendqisi)
(thumb_extendqisi2): Likewise.
(thumb_zero_extendhisi2_v6, arm_zero_extendhisi2_v6): New patterns.
(thumb_zero_extendqisi2_v6, arm_zero_extendqisi2_v6): New patterns.
(thumb_extendhisi2_insn_v6, arm_extendhisi2_v6): New patterns.
(thumb_extendqisi2_v6, arm_extendqisi_v6): New patterns.
(arm_zero_extendhisi2_reg, arm_zero_extendqisi2_reg): Delete.
(arm_extendhisi2_reg, arm_extendqisi2_reg): Delete.
(arm_zero_extendhisi2addsi): Remove subreg. Add attributes.
(arm_zero_extendqisi2addsi, arm_extendhisi2addsi): Likewise.
(arm_extendqisi2addsi): Likewise.
2003-12-31 Mark Mitchell <mark@codesourcery.com>
Revert this change:
* config/arm/arm.h (THUMB_LEGTITIMIZE_RELOAD_ADDRESS): Reload REG
+ REG addressing modes.
* config/arm/arm.h (THUMB_LEGTITIMIZE_RELOAD_ADDRESS): Reload REG
+ REG addressing modes.
2003-12-30 Mark Mitchell <mark@codesourcery.com>
* config/arm/arm.h (THUMB_LEGITIMATE_CONSTANT_P): Accept
CONSTANT_P_RTX.
2003-30-12 Paul Brook <paul@codesourcery.com>
* longlong.h: protect arm inlines with !defined (__thumb__)
2003-30-12 Paul Brook <paul@codesourcery.com>
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Always define __arm__.
2003-12-30 Nathan Sidwell <nathan@codesourcery.com>
* builtins.c (expand_builtin_apply_args_1): Fix typo in previous
change.
2003-12-29 Nathan Sidwell <nathan@codesourcery.com>
* builtins.c (expand_builtin_apply_args_1): Add pretend args size
to the virtual incoming args pointer for downward stacks.
2003-12-29 Paul Brook <paul@codesourcery.com>
* config/arm/arm-cores.def: Add cost function.
* config/arm/arm.c (arm_*_rtx_costs): New functions.
(arm_rtx_costs): Remove
(struct processors): Add rtx_costs field.
(all_cores, all_architectures): Ditto.
(arm_override_options): Set targetm.rtx_costs.
(thumb_rtx_costs): New function.
(arm_rtx_costs_1): Remove cases handled elsewhere.
* config/arm/arm.h (processor_type): Add COSTS parameter.
2003-12-29 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm.md (generic_sched): arm926 has its own scheduler.
(arm926ejs.md): Include it.
* config/arm/arm926ejs.md: New pipeline description.
2003-12-24 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (arm_arch6j): New variable.
(arm_override_options): Set it.
(arm_emit_extendsi): New function.
* config/arm/arm-protos.h (arm_emit_extendsi): Add prototype.
* config/arm/arm.h (arm_arch6j): Declare.
* config/arm/arm.md: Add sign/zero extend insns.
2003-12-23 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (all_architectures): Add armv6.
* doc/invoke.texi: Document it.
2003-12-19 Paul Brook <paul@codesourcery.com>
* config/arm/arm.md: Add load1 and load_byte "type" attrs. Modify
insn patterns to match.
* config/arm/arm-generic.md: Ditto.
* config/arm/cirrus.md: Ditto.
* config/arm/fpa.md: Ditto.
* config/amm/iwmmxt.md: Ditto.
* config/arm/arm1026ejs.md: Ditto.
* config/arm/arm1135jfs.md: Ditto. Add insn_reservation and bypasses
for 11_loadb.
2003-12-18 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm-protos.h (arm_no_early_alu_shift_value_dep): Declare.
* config/arm/arm.c (arm_adjust_cost): Check shift cost for
TYPE_ALU_SHIFT and TYPE_ALU_SHIFT_REG.
(arm_no_early_store_addr_dep, arm_no_early_alu_shift_dep,
arm_no_early_mul_dep): Correctly deal with conditional execution,
parallels and single shift operations.
(arm_no_early_alu_shift_value_dep): Define.
* arm.md (attr type): Replace 'normal' with 'alu',
'alu_shift' and 'alu_shift_reg'.
(attr core_cycles): Adjust.
(*addsi3_carryin_shift, andsi_not_shiftsi_si, *arm_shiftsi3,
*shiftsi3_compare0, *notsi_shiftsi, *notsi_shiftsi_compare0,
*not_shiftsi_compare0_scratch, *cmpsi_shiftsi, *cmpsi_shiftsi_swp,
*cmpsi_neg_shiftsi, *arith_shiftsi, *arith_shiftsi_compare0,
*arith_shiftsi_compare0_scratch, *sub_shiftsi,
*sub_shiftsi_compare0, *sub_shiftsi_compare0_scratch,
*if_shift_move, *if_move_shift, *if_shift_shift): Set type
attribute appropriately.
* config/arm/arm1026ejs.md (alu_op): Adjust.
(alu_shift_op, alu_shift_reg_op): New.
* config/arm/arm1136.md: Add better bypasses for early
registers. Remove load[234] and store[234] bypasses.
(11_alu_op): Adjust.
(11_alu_shift_op, 11_alu_shift_reg_op): New.
2003-12-15 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm-protos.h (arm_no_early_store_addr_dep,
arm_no_early_alu_shift_dep, arm_no_early_mul_dep): Declare.
* config/arm/arm.c (arm_no_early_store_addr_dep,
arm_no_early_alu_shift_dep, arm_no_early_mul_dep): Define.
* config/arm/arm1026ejs.md: Add load-store bypass.
* config/arm/arm1136jfs.md (11_alu_op): Take 2 cycles.
Add bypasses between instructions.
2003-12-10 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (arm_fpu_model): New variable.
(arm_fload_abi): New variable.
(target_fpe_name): Rename from target_fp_name.
(target_fpu_name): New variable.
(arm_is_cirrus): Remove.
(fpu_desc): New struct.
(all_fpus): Define.
(pf_model_for_fpu): Define.
(all_loat_abis): Define.
(arm_override_options): Set fp arch flags based on -mfpu=
and -float-abi=.
(FIRST_FPA_REGNUM): Rename from FIRST_ARM_FP_REGNUM.
(LAST_FPA_REGNUM): Rename from LAST_ARM_FP_REGNUM.
(*): Use new TARGET_* flags.
* config/arm/arm.h (TARGET_ANY_HARD_FLOAT): Remove.
(TARGET_HARD_FLOAT): No longer implies TARGET_FPA.
(TARGET_SOFT_FLOAT): Ditto.
(TARGET_SOFT_FLOAT_ABI): New.
(TARGET_MAVERICK): Rename from TARGET_CIRRUS. No longer implies
TARGET_HARD_FLOAT.
(TARGET_VFP): No longer implies TARGET_HARD_FLOAT.
(TARGET_OPTIONS): Add -mfpu=.
(FIRST_FPA_REGNUM): Rename from FIRST_ARM_FP_REGNUM.
(LAST_FPA_REGNUM): Rename from LAST_ARM_FP_REGNUM.
(arm_pf_model): Define.
(arm_float_abi_type): Define.
(fputype): Add FPUTYPE_VFP. Change SOFT_FPA->NONE
* config/arm/arm.md: Use new TARGET_* flags.
* config/arm/cirrus.md: Ditto.
* config/arm/fpa.md: Ditto.
* config/arm/elf.h (ASM_SPEC): Pass -mfloat-abi= and -mfpu=.
* config/arm/semi.h (ASM_SPEC): Ditto.
* config/arm/netbsd-elf.h (SUBTARGET_ASM_FLOAT_SPEC): Specify vfp.
(FPUTYPE_DEFAULT): Set to VFP.
* doc/invoke.texi: Document -mfpu= and -mfloat-abi=.
2003-11-22 Phil Edwards <phil@codesourcery.com>
PR target/12476
* config/arm/arm.c (arm_output_mi_thunk): In Thumb mode, use
'bx' instead of 'b' to avoid branch range restrictions. Output
the thunk immediately before the thunked-to function.
* config/arm/arm.h (ARM_DECLARE_FUNCTION_NAME): Do not emit
.thumb_func if a thunk is being generated. Emit .code 16 along
with .thumb_func if a thunk is not being generated.
2003-11-15 Nicolas Pitre <nico@cam.org>
* config/arm/arm.md (ashldi3, arm_ashldi3_1bit, ashrdi3,
arm_ashrdi3_1bit, lshrdi3, arm_lshrdi3_1bit): New patterns.
* config/arm/iwmmxt.md (ashrdi3_iwmmxt): Renamed from ashrdi3.
(lshrdi3_iwmmxt): Renamed from lshrdi3.
* config/arm/arm.c (IWMMXT_BUILTIN2): Renamed argument accordingly.
2003-11-12 Steve Woodford <scw@wasabisystems.com>
Ian Lance Taylor <ian@wasabisystems.com>
* config/arm/lib1funcs.asm (ARM_DIV_BODY, ARM_MOD_BODY): Add new
code for __ARM_ARCH__ >= 5 && ! defined (__OPTIMIZE_SIZE__).
2003-11-05 Phil Edwards <phil@codesourcery.com>
* config/arm/arm.md (insn): Add new V6 instruction names.
(generic_sched): New attr.
* config/arm/arm-generic.md: Use generic_sched here.
* config/arm/arm1026ejs.md: Do not model fetch/issue/decode
stages of pipeline. Adjust latency counts accordingly.
* config/arm/arm1136jfs.md: New file.
2003-10-28 Mark Mitchell <mark@codesourcery.com>
* config/arm/arm.h (processor_type): New enumeration type.
(CPP_ARCH_DEFAULT_SPEC): Set appropriately for ARM 926EJ-S,
ARM1026EJ-S, ARM1136J-S, and ARM1136JF-S processor cores.
(CPP_CPU_ARCH_SPEC): Likewise.
* config/arm/arm.c (arm_tune): New variable.
(all_cores): Use cores.def.
(all_architectures): Add representative processor.
(arm_override_options): Restructure way in which tuning
information is deduced.
* arm.md: Update "insn" and "type" attributes throughout.
(insn): New attribute.
(type): Compute "mult" from "insn" attribute. Add load2,
load3, load4 alternatives.
(arm automaton): Move to arm-generic.md.
* config/arm/arm-cores.def: New file.
* config/arm/arm-generic.md: Likewise.
* config/arm/arm1026ejs.md: Likewise.
From-SVN: r77171
2004-02-03 15:45:44 +01:00
|
|
|
extern int arm_const_double_rtx (rtx);
|
2003-06-10 20:55:17 +02:00
|
|
|
extern int neg_const_double_rtx_ok_for_fpa (rtx);
|
backport: re PR target/12476 (ARM/THUMB thunk calls broken)
Merge from csl-arm-branch.
2004-01-30 Paul Brook <paul@codesourcery.com>
* aof.h (REGISTER_NAMES): Add vfp reg names
(ADDITIONAL_REGISTER_NAMES): Ditto.
* aout.h (REGISTER_NAMES): Ditto.
(ADDITIONAL_REGISTER_NAMES): Ditto.
* arm-protos.h: Update/Add Prototypes.
* arm.c (init_fp_table): Rename from init_fpa_table. Update users.
Only allow 0.0 for VFP.
(fp_consts_inited): Rename from fpa_consts_inited. Update users.
(values_fp): Rename from values_fpa. Update Users.
(arm_const_double_rtx): Rename from const_double_rtx_ok_for_fpa.
Update users. Only check valid constants for this hardware.
(arm_float_rhs_operand): Rename from fpa_rhs_operand. Update Users.
Only allow consts for FPA.
(arm_float_add_operand): Rename from fpa_add_operand. Update users.
Only allow consts for FPA.
(use_return_insn): Check for saved VFP regs.
(arm_legitimate_address_p): Handle VFP DFmode addressing.
(arm_legitimize_address): Ditto.
(arm_general_register_operand): New function.
(vfp_mem_operand): New function.
(vfp_compare_operand): New function.
(vfp_secondary_reload_class): New function.
(arm_float_compare_operand): New function.
(vfp_print_multi): New function.
(vfp_output_fstmx): New function.
(vfp_emit_fstm): New function.
(arm_output_epilogue): Output VPF reg restore code.
(arm_expand_prologue): Output VFP reg save code.
(arm_print_operand): Add 'P'.
(arm_hard_regno_mode_ok): Return modes for VFP regs.
(arm_regno_class): Return classes for VFP regs.
(arm_compute_initial_elimination_offset): Include space for VFP regs.
(arm_get_frame_size): Ditto.
* arm.h (FIXED_REGISTERS): Add VFP regs.
(CALL_USED_REGISTERS): Ditto.
(CONDITIONAL_REGISTER_USAGE): Enable VFP regs.
(FIRST_VFP_REGNUM): Define.
(LAST_VFP_REGNUM): Define.
(IS_VFP_REGNUM): Define.
(FIRST_PSEUDO_REGISTER): Include VFP regs.
(HARD_REGNO_NREGS): Handle VFP regs.
(REG_ALLOC_ORDER): Add VFP regs.
(enum reg_class): Add VFP_REGS.
(REG_CLASS_NAMES): Ditto.
(REG_CLASS_CONTENTS): Ditto.
(CANNOT_CHANGE_MODE_CLASS) Handle VFP Regs.
(REG_CLASS_FROM_LETTER): Add 'w'.
(EXTRA_CONSTRAINT_ARM): Add 'U'.
(EXTRA_MEMORY_CONSTRAINT): Define.
(SECONDARY_OUTPUT_RELOAD_CLASS): Handle VFP regs.
(SECONDARY_INPUT_RELOAD_CLASS): Ditto.
(REGISTER_MOVE_COST): Ditto.
(PREDICATE_CODES): Add arm_general_register_operand,
arm_float_compare_operand and vfp_compare_operand.
* arm.md (various): Rename as above.
(divsf3): Enable when TARGET_VFP.
(divdf3): Ditto.
(movdfcc): Ditto.
(sqrtsf2): Ditto.
(sqrtdf2): Ditto.
(arm_movdi): Disable when TARGET_VFP.
(arm_movsi_insn): Ditto.
(movsi): Only split with general regs.
(cmpsf): Use arm_float_compare_operand.
(push_fp_multi): Restrict to TARGET_FPA.
(vfp.md): Include.
* vfp.md: New file.
* fpa.md (various): Rename as above.
* doc/md.texi: Document ARM w and U constraints.
2004-01-15 Paul Brook <paul@codesourcery.com>
* config.gcc: Add with_fpu. Allow with-float=softfp.
* config/arm/arm.c (arm_override_options): Rename *-s to *s.
Break out of loop when we find a float-abi. Fix typo.
* config/arm/arm.h (OPTION_DEFAULT_SPECS): Add "fpu".
Set -mfloat-abi=.
* doc/install.texi: Document --with-fpu.
2003-01-14 Paul Brook <paul@codesourcery.com>
* config.gcc (with_arch): Add armv6.
* config/arm/arm.h: Rename TARGET_CPU_*_s to TARGET_CPU_*s.
* config/arm/arm.c (arm_overrride_options): Ditto.
2004-01-08 Richard Earnshaw <rearnsha@arm.com>
* arm.c (FL_ARCH3M): Renamed from FL_FAST_MULT.
(FL_ARCH6): Renamed from FL_ARCH6J.
(arm_arch3m): Renamed from arm_fast_multiply.
(arm_arch6): Renamed from arm_arch6j.
* arm.h: Update all uses of above.
* arm-cores.def: Likewise.
* arm.md: Likewise.
* arm.h (CPP_CPU_ARCH_SPEC): Emit __ARM_ARCH_6J__ define for armV6j,
not arm6j. Add entry for arch armv6.
2004-01-07 Richard Earnshaw <rearnsha@arm.com>
* arm.c (arm_emit_extendsi): Delete.
* arm-protos.h (arm_emit_extendsi): Delete.
* arm.md (zero_extendhisi2): Also handle zero-extension of
non-subregs.
(zero_extendqisi2, extendhisi2, extendqisi2): Likewise.
(thumb_zero_extendhisi2): Only match if not v6.
(arm_zero_extendhisi2, thumb_zero_extendqisi2, arm_zero_extendqisi2)
(thumb_extendhisi2, arm_extendhisi2, arm_extendqisi)
(thumb_extendqisi2): Likewise.
(thumb_zero_extendhisi2_v6, arm_zero_extendhisi2_v6): New patterns.
(thumb_zero_extendqisi2_v6, arm_zero_extendqisi2_v6): New patterns.
(thumb_extendhisi2_insn_v6, arm_extendhisi2_v6): New patterns.
(thumb_extendqisi2_v6, arm_extendqisi_v6): New patterns.
(arm_zero_extendhisi2_reg, arm_zero_extendqisi2_reg): Delete.
(arm_extendhisi2_reg, arm_extendqisi2_reg): Delete.
(arm_zero_extendhisi2addsi): Remove subreg. Add attributes.
(arm_zero_extendqisi2addsi, arm_extendhisi2addsi): Likewise.
(arm_extendqisi2addsi): Likewise.
2003-12-31 Mark Mitchell <mark@codesourcery.com>
Revert this change:
* config/arm/arm.h (THUMB_LEGTITIMIZE_RELOAD_ADDRESS): Reload REG
+ REG addressing modes.
* config/arm/arm.h (THUMB_LEGTITIMIZE_RELOAD_ADDRESS): Reload REG
+ REG addressing modes.
2003-12-30 Mark Mitchell <mark@codesourcery.com>
* config/arm/arm.h (THUMB_LEGITIMATE_CONSTANT_P): Accept
CONSTANT_P_RTX.
2003-30-12 Paul Brook <paul@codesourcery.com>
* longlong.h: protect arm inlines with !defined (__thumb__)
2003-30-12 Paul Brook <paul@codesourcery.com>
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Always define __arm__.
2003-12-30 Nathan Sidwell <nathan@codesourcery.com>
* builtins.c (expand_builtin_apply_args_1): Fix typo in previous
change.
2003-12-29 Nathan Sidwell <nathan@codesourcery.com>
* builtins.c (expand_builtin_apply_args_1): Add pretend args size
to the virtual incoming args pointer for downward stacks.
2003-12-29 Paul Brook <paul@codesourcery.com>
* config/arm/arm-cores.def: Add cost function.
* config/arm/arm.c (arm_*_rtx_costs): New functions.
(arm_rtx_costs): Remove
(struct processors): Add rtx_costs field.
(all_cores, all_architectures): Ditto.
(arm_override_options): Set targetm.rtx_costs.
(thumb_rtx_costs): New function.
(arm_rtx_costs_1): Remove cases handled elsewhere.
* config/arm/arm.h (processor_type): Add COSTS parameter.
2003-12-29 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm.md (generic_sched): arm926 has its own scheduler.
(arm926ejs.md): Include it.
* config/arm/arm926ejs.md: New pipeline description.
2003-12-24 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (arm_arch6j): New variable.
(arm_override_options): Set it.
(arm_emit_extendsi): New function.
* config/arm/arm-protos.h (arm_emit_extendsi): Add prototype.
* config/arm/arm.h (arm_arch6j): Declare.
* config/arm/arm.md: Add sign/zero extend insns.
2003-12-23 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (all_architectures): Add armv6.
* doc/invoke.texi: Document it.
2003-12-19 Paul Brook <paul@codesourcery.com>
* config/arm/arm.md: Add load1 and load_byte "type" attrs. Modify
insn patterns to match.
* config/arm/arm-generic.md: Ditto.
* config/arm/cirrus.md: Ditto.
* config/arm/fpa.md: Ditto.
* config/amm/iwmmxt.md: Ditto.
* config/arm/arm1026ejs.md: Ditto.
* config/arm/arm1135jfs.md: Ditto. Add insn_reservation and bypasses
for 11_loadb.
2003-12-18 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm-protos.h (arm_no_early_alu_shift_value_dep): Declare.
* config/arm/arm.c (arm_adjust_cost): Check shift cost for
TYPE_ALU_SHIFT and TYPE_ALU_SHIFT_REG.
(arm_no_early_store_addr_dep, arm_no_early_alu_shift_dep,
arm_no_early_mul_dep): Correctly deal with conditional execution,
parallels and single shift operations.
(arm_no_early_alu_shift_value_dep): Define.
* arm.md (attr type): Replace 'normal' with 'alu',
'alu_shift' and 'alu_shift_reg'.
(attr core_cycles): Adjust.
(*addsi3_carryin_shift, andsi_not_shiftsi_si, *arm_shiftsi3,
*shiftsi3_compare0, *notsi_shiftsi, *notsi_shiftsi_compare0,
*not_shiftsi_compare0_scratch, *cmpsi_shiftsi, *cmpsi_shiftsi_swp,
*cmpsi_neg_shiftsi, *arith_shiftsi, *arith_shiftsi_compare0,
*arith_shiftsi_compare0_scratch, *sub_shiftsi,
*sub_shiftsi_compare0, *sub_shiftsi_compare0_scratch,
*if_shift_move, *if_move_shift, *if_shift_shift): Set type
attribute appropriately.
* config/arm/arm1026ejs.md (alu_op): Adjust.
(alu_shift_op, alu_shift_reg_op): New.
* config/arm/arm1136.md: Add better bypasses for early
registers. Remove load[234] and store[234] bypasses.
(11_alu_op): Adjust.
(11_alu_shift_op, 11_alu_shift_reg_op): New.
2003-12-15 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm-protos.h (arm_no_early_store_addr_dep,
arm_no_early_alu_shift_dep, arm_no_early_mul_dep): Declare.
* config/arm/arm.c (arm_no_early_store_addr_dep,
arm_no_early_alu_shift_dep, arm_no_early_mul_dep): Define.
* config/arm/arm1026ejs.md: Add load-store bypass.
* config/arm/arm1136jfs.md (11_alu_op): Take 2 cycles.
Add bypasses between instructions.
2003-12-10 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (arm_fpu_model): New variable.
(arm_fload_abi): New variable.
(target_fpe_name): Rename from target_fp_name.
(target_fpu_name): New variable.
(arm_is_cirrus): Remove.
(fpu_desc): New struct.
(all_fpus): Define.
(pf_model_for_fpu): Define.
(all_loat_abis): Define.
(arm_override_options): Set fp arch flags based on -mfpu=
and -float-abi=.
(FIRST_FPA_REGNUM): Rename from FIRST_ARM_FP_REGNUM.
(LAST_FPA_REGNUM): Rename from LAST_ARM_FP_REGNUM.
(*): Use new TARGET_* flags.
* config/arm/arm.h (TARGET_ANY_HARD_FLOAT): Remove.
(TARGET_HARD_FLOAT): No longer implies TARGET_FPA.
(TARGET_SOFT_FLOAT): Ditto.
(TARGET_SOFT_FLOAT_ABI): New.
(TARGET_MAVERICK): Rename from TARGET_CIRRUS. No longer implies
TARGET_HARD_FLOAT.
(TARGET_VFP): No longer implies TARGET_HARD_FLOAT.
(TARGET_OPTIONS): Add -mfpu=.
(FIRST_FPA_REGNUM): Rename from FIRST_ARM_FP_REGNUM.
(LAST_FPA_REGNUM): Rename from LAST_ARM_FP_REGNUM.
(arm_pf_model): Define.
(arm_float_abi_type): Define.
(fputype): Add FPUTYPE_VFP. Change SOFT_FPA->NONE
* config/arm/arm.md: Use new TARGET_* flags.
* config/arm/cirrus.md: Ditto.
* config/arm/fpa.md: Ditto.
* config/arm/elf.h (ASM_SPEC): Pass -mfloat-abi= and -mfpu=.
* config/arm/semi.h (ASM_SPEC): Ditto.
* config/arm/netbsd-elf.h (SUBTARGET_ASM_FLOAT_SPEC): Specify vfp.
(FPUTYPE_DEFAULT): Set to VFP.
* doc/invoke.texi: Document -mfpu= and -mfloat-abi=.
2003-11-22 Phil Edwards <phil@codesourcery.com>
PR target/12476
* config/arm/arm.c (arm_output_mi_thunk): In Thumb mode, use
'bx' instead of 'b' to avoid branch range restrictions. Output
the thunk immediately before the thunked-to function.
* config/arm/arm.h (ARM_DECLARE_FUNCTION_NAME): Do not emit
.thumb_func if a thunk is being generated. Emit .code 16 along
with .thumb_func if a thunk is not being generated.
2003-11-15 Nicolas Pitre <nico@cam.org>
* config/arm/arm.md (ashldi3, arm_ashldi3_1bit, ashrdi3,
arm_ashrdi3_1bit, lshrdi3, arm_lshrdi3_1bit): New patterns.
* config/arm/iwmmxt.md (ashrdi3_iwmmxt): Renamed from ashrdi3.
(lshrdi3_iwmmxt): Renamed from lshrdi3.
* config/arm/arm.c (IWMMXT_BUILTIN2): Renamed argument accordingly.
2003-11-12 Steve Woodford <scw@wasabisystems.com>
Ian Lance Taylor <ian@wasabisystems.com>
* config/arm/lib1funcs.asm (ARM_DIV_BODY, ARM_MOD_BODY): Add new
code for __ARM_ARCH__ >= 5 && ! defined (__OPTIMIZE_SIZE__).
2003-11-05 Phil Edwards <phil@codesourcery.com>
* config/arm/arm.md (insn): Add new V6 instruction names.
(generic_sched): New attr.
* config/arm/arm-generic.md: Use generic_sched here.
* config/arm/arm1026ejs.md: Do not model fetch/issue/decode
stages of pipeline. Adjust latency counts accordingly.
* config/arm/arm1136jfs.md: New file.
2003-10-28 Mark Mitchell <mark@codesourcery.com>
* config/arm/arm.h (processor_type): New enumeration type.
(CPP_ARCH_DEFAULT_SPEC): Set appropriately for ARM 926EJ-S,
ARM1026EJ-S, ARM1136J-S, and ARM1136JF-S processor cores.
(CPP_CPU_ARCH_SPEC): Likewise.
* config/arm/arm.c (arm_tune): New variable.
(all_cores): Use cores.def.
(all_architectures): Add representative processor.
(arm_override_options): Restructure way in which tuning
information is deduced.
* arm.md: Update "insn" and "type" attributes throughout.
(insn): New attribute.
(type): Compute "mult" from "insn" attribute. Add load2,
load3, load4 alternatives.
(arm automaton): Move to arm-generic.md.
* config/arm/arm-cores.def: New file.
* config/arm/arm-generic.md: Likewise.
* config/arm/arm1026ejs.md: Likewise.
From-SVN: r77171
2004-02-03 15:45:44 +01:00
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extern enum reg_class vfp_secondary_reload_class (enum machine_mode, rtx);
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2000-04-08 16:29:53 +02:00
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/* Predicates. */
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2003-06-10 20:55:17 +02:00
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extern int s_register_operand (rtx, enum machine_mode);
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extern int arm_hard_register_operand (rtx, enum machine_mode);
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backport: re PR target/12476 (ARM/THUMB thunk calls broken)
Merge from csl-arm-branch.
2004-01-30 Paul Brook <paul@codesourcery.com>
* aof.h (REGISTER_NAMES): Add vfp reg names
(ADDITIONAL_REGISTER_NAMES): Ditto.
* aout.h (REGISTER_NAMES): Ditto.
(ADDITIONAL_REGISTER_NAMES): Ditto.
* arm-protos.h: Update/Add Prototypes.
* arm.c (init_fp_table): Rename from init_fpa_table. Update users.
Only allow 0.0 for VFP.
(fp_consts_inited): Rename from fpa_consts_inited. Update users.
(values_fp): Rename from values_fpa. Update Users.
(arm_const_double_rtx): Rename from const_double_rtx_ok_for_fpa.
Update users. Only check valid constants for this hardware.
(arm_float_rhs_operand): Rename from fpa_rhs_operand. Update Users.
Only allow consts for FPA.
(arm_float_add_operand): Rename from fpa_add_operand. Update users.
Only allow consts for FPA.
(use_return_insn): Check for saved VFP regs.
(arm_legitimate_address_p): Handle VFP DFmode addressing.
(arm_legitimize_address): Ditto.
(arm_general_register_operand): New function.
(vfp_mem_operand): New function.
(vfp_compare_operand): New function.
(vfp_secondary_reload_class): New function.
(arm_float_compare_operand): New function.
(vfp_print_multi): New function.
(vfp_output_fstmx): New function.
(vfp_emit_fstm): New function.
(arm_output_epilogue): Output VPF reg restore code.
(arm_expand_prologue): Output VFP reg save code.
(arm_print_operand): Add 'P'.
(arm_hard_regno_mode_ok): Return modes for VFP regs.
(arm_regno_class): Return classes for VFP regs.
(arm_compute_initial_elimination_offset): Include space for VFP regs.
(arm_get_frame_size): Ditto.
* arm.h (FIXED_REGISTERS): Add VFP regs.
(CALL_USED_REGISTERS): Ditto.
(CONDITIONAL_REGISTER_USAGE): Enable VFP regs.
(FIRST_VFP_REGNUM): Define.
(LAST_VFP_REGNUM): Define.
(IS_VFP_REGNUM): Define.
(FIRST_PSEUDO_REGISTER): Include VFP regs.
(HARD_REGNO_NREGS): Handle VFP regs.
(REG_ALLOC_ORDER): Add VFP regs.
(enum reg_class): Add VFP_REGS.
(REG_CLASS_NAMES): Ditto.
(REG_CLASS_CONTENTS): Ditto.
(CANNOT_CHANGE_MODE_CLASS) Handle VFP Regs.
(REG_CLASS_FROM_LETTER): Add 'w'.
(EXTRA_CONSTRAINT_ARM): Add 'U'.
(EXTRA_MEMORY_CONSTRAINT): Define.
(SECONDARY_OUTPUT_RELOAD_CLASS): Handle VFP regs.
(SECONDARY_INPUT_RELOAD_CLASS): Ditto.
(REGISTER_MOVE_COST): Ditto.
(PREDICATE_CODES): Add arm_general_register_operand,
arm_float_compare_operand and vfp_compare_operand.
* arm.md (various): Rename as above.
(divsf3): Enable when TARGET_VFP.
(divdf3): Ditto.
(movdfcc): Ditto.
(sqrtsf2): Ditto.
(sqrtdf2): Ditto.
(arm_movdi): Disable when TARGET_VFP.
(arm_movsi_insn): Ditto.
(movsi): Only split with general regs.
(cmpsf): Use arm_float_compare_operand.
(push_fp_multi): Restrict to TARGET_FPA.
(vfp.md): Include.
* vfp.md: New file.
* fpa.md (various): Rename as above.
* doc/md.texi: Document ARM w and U constraints.
2004-01-15 Paul Brook <paul@codesourcery.com>
* config.gcc: Add with_fpu. Allow with-float=softfp.
* config/arm/arm.c (arm_override_options): Rename *-s to *s.
Break out of loop when we find a float-abi. Fix typo.
* config/arm/arm.h (OPTION_DEFAULT_SPECS): Add "fpu".
Set -mfloat-abi=.
* doc/install.texi: Document --with-fpu.
2003-01-14 Paul Brook <paul@codesourcery.com>
* config.gcc (with_arch): Add armv6.
* config/arm/arm.h: Rename TARGET_CPU_*_s to TARGET_CPU_*s.
* config/arm/arm.c (arm_overrride_options): Ditto.
2004-01-08 Richard Earnshaw <rearnsha@arm.com>
* arm.c (FL_ARCH3M): Renamed from FL_FAST_MULT.
(FL_ARCH6): Renamed from FL_ARCH6J.
(arm_arch3m): Renamed from arm_fast_multiply.
(arm_arch6): Renamed from arm_arch6j.
* arm.h: Update all uses of above.
* arm-cores.def: Likewise.
* arm.md: Likewise.
* arm.h (CPP_CPU_ARCH_SPEC): Emit __ARM_ARCH_6J__ define for armV6j,
not arm6j. Add entry for arch armv6.
2004-01-07 Richard Earnshaw <rearnsha@arm.com>
* arm.c (arm_emit_extendsi): Delete.
* arm-protos.h (arm_emit_extendsi): Delete.
* arm.md (zero_extendhisi2): Also handle zero-extension of
non-subregs.
(zero_extendqisi2, extendhisi2, extendqisi2): Likewise.
(thumb_zero_extendhisi2): Only match if not v6.
(arm_zero_extendhisi2, thumb_zero_extendqisi2, arm_zero_extendqisi2)
(thumb_extendhisi2, arm_extendhisi2, arm_extendqisi)
(thumb_extendqisi2): Likewise.
(thumb_zero_extendhisi2_v6, arm_zero_extendhisi2_v6): New patterns.
(thumb_zero_extendqisi2_v6, arm_zero_extendqisi2_v6): New patterns.
(thumb_extendhisi2_insn_v6, arm_extendhisi2_v6): New patterns.
(thumb_extendqisi2_v6, arm_extendqisi_v6): New patterns.
(arm_zero_extendhisi2_reg, arm_zero_extendqisi2_reg): Delete.
(arm_extendhisi2_reg, arm_extendqisi2_reg): Delete.
(arm_zero_extendhisi2addsi): Remove subreg. Add attributes.
(arm_zero_extendqisi2addsi, arm_extendhisi2addsi): Likewise.
(arm_extendqisi2addsi): Likewise.
2003-12-31 Mark Mitchell <mark@codesourcery.com>
Revert this change:
* config/arm/arm.h (THUMB_LEGTITIMIZE_RELOAD_ADDRESS): Reload REG
+ REG addressing modes.
* config/arm/arm.h (THUMB_LEGTITIMIZE_RELOAD_ADDRESS): Reload REG
+ REG addressing modes.
2003-12-30 Mark Mitchell <mark@codesourcery.com>
* config/arm/arm.h (THUMB_LEGITIMATE_CONSTANT_P): Accept
CONSTANT_P_RTX.
2003-30-12 Paul Brook <paul@codesourcery.com>
* longlong.h: protect arm inlines with !defined (__thumb__)
2003-30-12 Paul Brook <paul@codesourcery.com>
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Always define __arm__.
2003-12-30 Nathan Sidwell <nathan@codesourcery.com>
* builtins.c (expand_builtin_apply_args_1): Fix typo in previous
change.
2003-12-29 Nathan Sidwell <nathan@codesourcery.com>
* builtins.c (expand_builtin_apply_args_1): Add pretend args size
to the virtual incoming args pointer for downward stacks.
2003-12-29 Paul Brook <paul@codesourcery.com>
* config/arm/arm-cores.def: Add cost function.
* config/arm/arm.c (arm_*_rtx_costs): New functions.
(arm_rtx_costs): Remove
(struct processors): Add rtx_costs field.
(all_cores, all_architectures): Ditto.
(arm_override_options): Set targetm.rtx_costs.
(thumb_rtx_costs): New function.
(arm_rtx_costs_1): Remove cases handled elsewhere.
* config/arm/arm.h (processor_type): Add COSTS parameter.
2003-12-29 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm.md (generic_sched): arm926 has its own scheduler.
(arm926ejs.md): Include it.
* config/arm/arm926ejs.md: New pipeline description.
2003-12-24 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (arm_arch6j): New variable.
(arm_override_options): Set it.
(arm_emit_extendsi): New function.
* config/arm/arm-protos.h (arm_emit_extendsi): Add prototype.
* config/arm/arm.h (arm_arch6j): Declare.
* config/arm/arm.md: Add sign/zero extend insns.
2003-12-23 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (all_architectures): Add armv6.
* doc/invoke.texi: Document it.
2003-12-19 Paul Brook <paul@codesourcery.com>
* config/arm/arm.md: Add load1 and load_byte "type" attrs. Modify
insn patterns to match.
* config/arm/arm-generic.md: Ditto.
* config/arm/cirrus.md: Ditto.
* config/arm/fpa.md: Ditto.
* config/amm/iwmmxt.md: Ditto.
* config/arm/arm1026ejs.md: Ditto.
* config/arm/arm1135jfs.md: Ditto. Add insn_reservation and bypasses
for 11_loadb.
2003-12-18 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm-protos.h (arm_no_early_alu_shift_value_dep): Declare.
* config/arm/arm.c (arm_adjust_cost): Check shift cost for
TYPE_ALU_SHIFT and TYPE_ALU_SHIFT_REG.
(arm_no_early_store_addr_dep, arm_no_early_alu_shift_dep,
arm_no_early_mul_dep): Correctly deal with conditional execution,
parallels and single shift operations.
(arm_no_early_alu_shift_value_dep): Define.
* arm.md (attr type): Replace 'normal' with 'alu',
'alu_shift' and 'alu_shift_reg'.
(attr core_cycles): Adjust.
(*addsi3_carryin_shift, andsi_not_shiftsi_si, *arm_shiftsi3,
*shiftsi3_compare0, *notsi_shiftsi, *notsi_shiftsi_compare0,
*not_shiftsi_compare0_scratch, *cmpsi_shiftsi, *cmpsi_shiftsi_swp,
*cmpsi_neg_shiftsi, *arith_shiftsi, *arith_shiftsi_compare0,
*arith_shiftsi_compare0_scratch, *sub_shiftsi,
*sub_shiftsi_compare0, *sub_shiftsi_compare0_scratch,
*if_shift_move, *if_move_shift, *if_shift_shift): Set type
attribute appropriately.
* config/arm/arm1026ejs.md (alu_op): Adjust.
(alu_shift_op, alu_shift_reg_op): New.
* config/arm/arm1136.md: Add better bypasses for early
registers. Remove load[234] and store[234] bypasses.
(11_alu_op): Adjust.
(11_alu_shift_op, 11_alu_shift_reg_op): New.
2003-12-15 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm-protos.h (arm_no_early_store_addr_dep,
arm_no_early_alu_shift_dep, arm_no_early_mul_dep): Declare.
* config/arm/arm.c (arm_no_early_store_addr_dep,
arm_no_early_alu_shift_dep, arm_no_early_mul_dep): Define.
* config/arm/arm1026ejs.md: Add load-store bypass.
* config/arm/arm1136jfs.md (11_alu_op): Take 2 cycles.
Add bypasses between instructions.
2003-12-10 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (arm_fpu_model): New variable.
(arm_fload_abi): New variable.
(target_fpe_name): Rename from target_fp_name.
(target_fpu_name): New variable.
(arm_is_cirrus): Remove.
(fpu_desc): New struct.
(all_fpus): Define.
(pf_model_for_fpu): Define.
(all_loat_abis): Define.
(arm_override_options): Set fp arch flags based on -mfpu=
and -float-abi=.
(FIRST_FPA_REGNUM): Rename from FIRST_ARM_FP_REGNUM.
(LAST_FPA_REGNUM): Rename from LAST_ARM_FP_REGNUM.
(*): Use new TARGET_* flags.
* config/arm/arm.h (TARGET_ANY_HARD_FLOAT): Remove.
(TARGET_HARD_FLOAT): No longer implies TARGET_FPA.
(TARGET_SOFT_FLOAT): Ditto.
(TARGET_SOFT_FLOAT_ABI): New.
(TARGET_MAVERICK): Rename from TARGET_CIRRUS. No longer implies
TARGET_HARD_FLOAT.
(TARGET_VFP): No longer implies TARGET_HARD_FLOAT.
(TARGET_OPTIONS): Add -mfpu=.
(FIRST_FPA_REGNUM): Rename from FIRST_ARM_FP_REGNUM.
(LAST_FPA_REGNUM): Rename from LAST_ARM_FP_REGNUM.
(arm_pf_model): Define.
(arm_float_abi_type): Define.
(fputype): Add FPUTYPE_VFP. Change SOFT_FPA->NONE
* config/arm/arm.md: Use new TARGET_* flags.
* config/arm/cirrus.md: Ditto.
* config/arm/fpa.md: Ditto.
* config/arm/elf.h (ASM_SPEC): Pass -mfloat-abi= and -mfpu=.
* config/arm/semi.h (ASM_SPEC): Ditto.
* config/arm/netbsd-elf.h (SUBTARGET_ASM_FLOAT_SPEC): Specify vfp.
(FPUTYPE_DEFAULT): Set to VFP.
* doc/invoke.texi: Document -mfpu= and -mfloat-abi=.
2003-11-22 Phil Edwards <phil@codesourcery.com>
PR target/12476
* config/arm/arm.c (arm_output_mi_thunk): In Thumb mode, use
'bx' instead of 'b' to avoid branch range restrictions. Output
the thunk immediately before the thunked-to function.
* config/arm/arm.h (ARM_DECLARE_FUNCTION_NAME): Do not emit
.thumb_func if a thunk is being generated. Emit .code 16 along
with .thumb_func if a thunk is not being generated.
2003-11-15 Nicolas Pitre <nico@cam.org>
* config/arm/arm.md (ashldi3, arm_ashldi3_1bit, ashrdi3,
arm_ashrdi3_1bit, lshrdi3, arm_lshrdi3_1bit): New patterns.
* config/arm/iwmmxt.md (ashrdi3_iwmmxt): Renamed from ashrdi3.
(lshrdi3_iwmmxt): Renamed from lshrdi3.
* config/arm/arm.c (IWMMXT_BUILTIN2): Renamed argument accordingly.
2003-11-12 Steve Woodford <scw@wasabisystems.com>
Ian Lance Taylor <ian@wasabisystems.com>
* config/arm/lib1funcs.asm (ARM_DIV_BODY, ARM_MOD_BODY): Add new
code for __ARM_ARCH__ >= 5 && ! defined (__OPTIMIZE_SIZE__).
2003-11-05 Phil Edwards <phil@codesourcery.com>
* config/arm/arm.md (insn): Add new V6 instruction names.
(generic_sched): New attr.
* config/arm/arm-generic.md: Use generic_sched here.
* config/arm/arm1026ejs.md: Do not model fetch/issue/decode
stages of pipeline. Adjust latency counts accordingly.
* config/arm/arm1136jfs.md: New file.
2003-10-28 Mark Mitchell <mark@codesourcery.com>
* config/arm/arm.h (processor_type): New enumeration type.
(CPP_ARCH_DEFAULT_SPEC): Set appropriately for ARM 926EJ-S,
ARM1026EJ-S, ARM1136J-S, and ARM1136JF-S processor cores.
(CPP_CPU_ARCH_SPEC): Likewise.
* config/arm/arm.c (arm_tune): New variable.
(all_cores): Use cores.def.
(all_architectures): Add representative processor.
(arm_override_options): Restructure way in which tuning
information is deduced.
* arm.md: Update "insn" and "type" attributes throughout.
(insn): New attribute.
(type): Compute "mult" from "insn" attribute. Add load2,
load3, load4 alternatives.
(arm automaton): Move to arm-generic.md.
* config/arm/arm-cores.def: New file.
* config/arm/arm-generic.md: Likewise.
* config/arm/arm1026ejs.md: Likewise.
From-SVN: r77171
2004-02-03 15:45:44 +01:00
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extern int arm_general_register_operand (rtx, enum machine_mode);
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2003-06-10 20:55:17 +02:00
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extern int f_register_operand (rtx, enum machine_mode);
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extern int reg_or_int_operand (rtx, enum machine_mode);
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extern int arm_reload_memory_operand (rtx, enum machine_mode);
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extern int arm_rhs_operand (rtx, enum machine_mode);
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extern int arm_rhsm_operand (rtx, enum machine_mode);
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extern int arm_add_operand (rtx, enum machine_mode);
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2003-10-07 10:49:36 +02:00
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extern int arm_addimm_operand (rtx, enum machine_mode);
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2003-06-10 20:55:17 +02:00
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extern int arm_not_operand (rtx, enum machine_mode);
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2004-03-13 12:19:23 +01:00
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extern int arm_extendqisi_mem_op (rtx, enum machine_mode);
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2003-06-10 20:55:17 +02:00
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extern int offsettable_memory_operand (rtx, enum machine_mode);
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extern int alignable_memory_operand (rtx, enum machine_mode);
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backport: re PR target/12476 (ARM/THUMB thunk calls broken)
Merge from csl-arm-branch.
2004-01-30 Paul Brook <paul@codesourcery.com>
* aof.h (REGISTER_NAMES): Add vfp reg names
(ADDITIONAL_REGISTER_NAMES): Ditto.
* aout.h (REGISTER_NAMES): Ditto.
(ADDITIONAL_REGISTER_NAMES): Ditto.
* arm-protos.h: Update/Add Prototypes.
* arm.c (init_fp_table): Rename from init_fpa_table. Update users.
Only allow 0.0 for VFP.
(fp_consts_inited): Rename from fpa_consts_inited. Update users.
(values_fp): Rename from values_fpa. Update Users.
(arm_const_double_rtx): Rename from const_double_rtx_ok_for_fpa.
Update users. Only check valid constants for this hardware.
(arm_float_rhs_operand): Rename from fpa_rhs_operand. Update Users.
Only allow consts for FPA.
(arm_float_add_operand): Rename from fpa_add_operand. Update users.
Only allow consts for FPA.
(use_return_insn): Check for saved VFP regs.
(arm_legitimate_address_p): Handle VFP DFmode addressing.
(arm_legitimize_address): Ditto.
(arm_general_register_operand): New function.
(vfp_mem_operand): New function.
(vfp_compare_operand): New function.
(vfp_secondary_reload_class): New function.
(arm_float_compare_operand): New function.
(vfp_print_multi): New function.
(vfp_output_fstmx): New function.
(vfp_emit_fstm): New function.
(arm_output_epilogue): Output VPF reg restore code.
(arm_expand_prologue): Output VFP reg save code.
(arm_print_operand): Add 'P'.
(arm_hard_regno_mode_ok): Return modes for VFP regs.
(arm_regno_class): Return classes for VFP regs.
(arm_compute_initial_elimination_offset): Include space for VFP regs.
(arm_get_frame_size): Ditto.
* arm.h (FIXED_REGISTERS): Add VFP regs.
(CALL_USED_REGISTERS): Ditto.
(CONDITIONAL_REGISTER_USAGE): Enable VFP regs.
(FIRST_VFP_REGNUM): Define.
(LAST_VFP_REGNUM): Define.
(IS_VFP_REGNUM): Define.
(FIRST_PSEUDO_REGISTER): Include VFP regs.
(HARD_REGNO_NREGS): Handle VFP regs.
(REG_ALLOC_ORDER): Add VFP regs.
(enum reg_class): Add VFP_REGS.
(REG_CLASS_NAMES): Ditto.
(REG_CLASS_CONTENTS): Ditto.
(CANNOT_CHANGE_MODE_CLASS) Handle VFP Regs.
(REG_CLASS_FROM_LETTER): Add 'w'.
(EXTRA_CONSTRAINT_ARM): Add 'U'.
(EXTRA_MEMORY_CONSTRAINT): Define.
(SECONDARY_OUTPUT_RELOAD_CLASS): Handle VFP regs.
(SECONDARY_INPUT_RELOAD_CLASS): Ditto.
(REGISTER_MOVE_COST): Ditto.
(PREDICATE_CODES): Add arm_general_register_operand,
arm_float_compare_operand and vfp_compare_operand.
* arm.md (various): Rename as above.
(divsf3): Enable when TARGET_VFP.
(divdf3): Ditto.
(movdfcc): Ditto.
(sqrtsf2): Ditto.
(sqrtdf2): Ditto.
(arm_movdi): Disable when TARGET_VFP.
(arm_movsi_insn): Ditto.
(movsi): Only split with general regs.
(cmpsf): Use arm_float_compare_operand.
(push_fp_multi): Restrict to TARGET_FPA.
(vfp.md): Include.
* vfp.md: New file.
* fpa.md (various): Rename as above.
* doc/md.texi: Document ARM w and U constraints.
2004-01-15 Paul Brook <paul@codesourcery.com>
* config.gcc: Add with_fpu. Allow with-float=softfp.
* config/arm/arm.c (arm_override_options): Rename *-s to *s.
Break out of loop when we find a float-abi. Fix typo.
* config/arm/arm.h (OPTION_DEFAULT_SPECS): Add "fpu".
Set -mfloat-abi=.
* doc/install.texi: Document --with-fpu.
2003-01-14 Paul Brook <paul@codesourcery.com>
* config.gcc (with_arch): Add armv6.
* config/arm/arm.h: Rename TARGET_CPU_*_s to TARGET_CPU_*s.
* config/arm/arm.c (arm_overrride_options): Ditto.
2004-01-08 Richard Earnshaw <rearnsha@arm.com>
* arm.c (FL_ARCH3M): Renamed from FL_FAST_MULT.
(FL_ARCH6): Renamed from FL_ARCH6J.
(arm_arch3m): Renamed from arm_fast_multiply.
(arm_arch6): Renamed from arm_arch6j.
* arm.h: Update all uses of above.
* arm-cores.def: Likewise.
* arm.md: Likewise.
* arm.h (CPP_CPU_ARCH_SPEC): Emit __ARM_ARCH_6J__ define for armV6j,
not arm6j. Add entry for arch armv6.
2004-01-07 Richard Earnshaw <rearnsha@arm.com>
* arm.c (arm_emit_extendsi): Delete.
* arm-protos.h (arm_emit_extendsi): Delete.
* arm.md (zero_extendhisi2): Also handle zero-extension of
non-subregs.
(zero_extendqisi2, extendhisi2, extendqisi2): Likewise.
(thumb_zero_extendhisi2): Only match if not v6.
(arm_zero_extendhisi2, thumb_zero_extendqisi2, arm_zero_extendqisi2)
(thumb_extendhisi2, arm_extendhisi2, arm_extendqisi)
(thumb_extendqisi2): Likewise.
(thumb_zero_extendhisi2_v6, arm_zero_extendhisi2_v6): New patterns.
(thumb_zero_extendqisi2_v6, arm_zero_extendqisi2_v6): New patterns.
(thumb_extendhisi2_insn_v6, arm_extendhisi2_v6): New patterns.
(thumb_extendqisi2_v6, arm_extendqisi_v6): New patterns.
(arm_zero_extendhisi2_reg, arm_zero_extendqisi2_reg): Delete.
(arm_extendhisi2_reg, arm_extendqisi2_reg): Delete.
(arm_zero_extendhisi2addsi): Remove subreg. Add attributes.
(arm_zero_extendqisi2addsi, arm_extendhisi2addsi): Likewise.
(arm_extendqisi2addsi): Likewise.
2003-12-31 Mark Mitchell <mark@codesourcery.com>
Revert this change:
* config/arm/arm.h (THUMB_LEGTITIMIZE_RELOAD_ADDRESS): Reload REG
+ REG addressing modes.
* config/arm/arm.h (THUMB_LEGTITIMIZE_RELOAD_ADDRESS): Reload REG
+ REG addressing modes.
2003-12-30 Mark Mitchell <mark@codesourcery.com>
* config/arm/arm.h (THUMB_LEGITIMATE_CONSTANT_P): Accept
CONSTANT_P_RTX.
2003-30-12 Paul Brook <paul@codesourcery.com>
* longlong.h: protect arm inlines with !defined (__thumb__)
2003-30-12 Paul Brook <paul@codesourcery.com>
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Always define __arm__.
2003-12-30 Nathan Sidwell <nathan@codesourcery.com>
* builtins.c (expand_builtin_apply_args_1): Fix typo in previous
change.
2003-12-29 Nathan Sidwell <nathan@codesourcery.com>
* builtins.c (expand_builtin_apply_args_1): Add pretend args size
to the virtual incoming args pointer for downward stacks.
2003-12-29 Paul Brook <paul@codesourcery.com>
* config/arm/arm-cores.def: Add cost function.
* config/arm/arm.c (arm_*_rtx_costs): New functions.
(arm_rtx_costs): Remove
(struct processors): Add rtx_costs field.
(all_cores, all_architectures): Ditto.
(arm_override_options): Set targetm.rtx_costs.
(thumb_rtx_costs): New function.
(arm_rtx_costs_1): Remove cases handled elsewhere.
* config/arm/arm.h (processor_type): Add COSTS parameter.
2003-12-29 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm.md (generic_sched): arm926 has its own scheduler.
(arm926ejs.md): Include it.
* config/arm/arm926ejs.md: New pipeline description.
2003-12-24 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (arm_arch6j): New variable.
(arm_override_options): Set it.
(arm_emit_extendsi): New function.
* config/arm/arm-protos.h (arm_emit_extendsi): Add prototype.
* config/arm/arm.h (arm_arch6j): Declare.
* config/arm/arm.md: Add sign/zero extend insns.
2003-12-23 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (all_architectures): Add armv6.
* doc/invoke.texi: Document it.
2003-12-19 Paul Brook <paul@codesourcery.com>
* config/arm/arm.md: Add load1 and load_byte "type" attrs. Modify
insn patterns to match.
* config/arm/arm-generic.md: Ditto.
* config/arm/cirrus.md: Ditto.
* config/arm/fpa.md: Ditto.
* config/amm/iwmmxt.md: Ditto.
* config/arm/arm1026ejs.md: Ditto.
* config/arm/arm1135jfs.md: Ditto. Add insn_reservation and bypasses
for 11_loadb.
2003-12-18 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm-protos.h (arm_no_early_alu_shift_value_dep): Declare.
* config/arm/arm.c (arm_adjust_cost): Check shift cost for
TYPE_ALU_SHIFT and TYPE_ALU_SHIFT_REG.
(arm_no_early_store_addr_dep, arm_no_early_alu_shift_dep,
arm_no_early_mul_dep): Correctly deal with conditional execution,
parallels and single shift operations.
(arm_no_early_alu_shift_value_dep): Define.
* arm.md (attr type): Replace 'normal' with 'alu',
'alu_shift' and 'alu_shift_reg'.
(attr core_cycles): Adjust.
(*addsi3_carryin_shift, andsi_not_shiftsi_si, *arm_shiftsi3,
*shiftsi3_compare0, *notsi_shiftsi, *notsi_shiftsi_compare0,
*not_shiftsi_compare0_scratch, *cmpsi_shiftsi, *cmpsi_shiftsi_swp,
*cmpsi_neg_shiftsi, *arith_shiftsi, *arith_shiftsi_compare0,
*arith_shiftsi_compare0_scratch, *sub_shiftsi,
*sub_shiftsi_compare0, *sub_shiftsi_compare0_scratch,
*if_shift_move, *if_move_shift, *if_shift_shift): Set type
attribute appropriately.
* config/arm/arm1026ejs.md (alu_op): Adjust.
(alu_shift_op, alu_shift_reg_op): New.
* config/arm/arm1136.md: Add better bypasses for early
registers. Remove load[234] and store[234] bypasses.
(11_alu_op): Adjust.
(11_alu_shift_op, 11_alu_shift_reg_op): New.
2003-12-15 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm-protos.h (arm_no_early_store_addr_dep,
arm_no_early_alu_shift_dep, arm_no_early_mul_dep): Declare.
* config/arm/arm.c (arm_no_early_store_addr_dep,
arm_no_early_alu_shift_dep, arm_no_early_mul_dep): Define.
* config/arm/arm1026ejs.md: Add load-store bypass.
* config/arm/arm1136jfs.md (11_alu_op): Take 2 cycles.
Add bypasses between instructions.
2003-12-10 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (arm_fpu_model): New variable.
(arm_fload_abi): New variable.
(target_fpe_name): Rename from target_fp_name.
(target_fpu_name): New variable.
(arm_is_cirrus): Remove.
(fpu_desc): New struct.
(all_fpus): Define.
(pf_model_for_fpu): Define.
(all_loat_abis): Define.
(arm_override_options): Set fp arch flags based on -mfpu=
and -float-abi=.
(FIRST_FPA_REGNUM): Rename from FIRST_ARM_FP_REGNUM.
(LAST_FPA_REGNUM): Rename from LAST_ARM_FP_REGNUM.
(*): Use new TARGET_* flags.
* config/arm/arm.h (TARGET_ANY_HARD_FLOAT): Remove.
(TARGET_HARD_FLOAT): No longer implies TARGET_FPA.
(TARGET_SOFT_FLOAT): Ditto.
(TARGET_SOFT_FLOAT_ABI): New.
(TARGET_MAVERICK): Rename from TARGET_CIRRUS. No longer implies
TARGET_HARD_FLOAT.
(TARGET_VFP): No longer implies TARGET_HARD_FLOAT.
(TARGET_OPTIONS): Add -mfpu=.
(FIRST_FPA_REGNUM): Rename from FIRST_ARM_FP_REGNUM.
(LAST_FPA_REGNUM): Rename from LAST_ARM_FP_REGNUM.
(arm_pf_model): Define.
(arm_float_abi_type): Define.
(fputype): Add FPUTYPE_VFP. Change SOFT_FPA->NONE
* config/arm/arm.md: Use new TARGET_* flags.
* config/arm/cirrus.md: Ditto.
* config/arm/fpa.md: Ditto.
* config/arm/elf.h (ASM_SPEC): Pass -mfloat-abi= and -mfpu=.
* config/arm/semi.h (ASM_SPEC): Ditto.
* config/arm/netbsd-elf.h (SUBTARGET_ASM_FLOAT_SPEC): Specify vfp.
(FPUTYPE_DEFAULT): Set to VFP.
* doc/invoke.texi: Document -mfpu= and -mfloat-abi=.
2003-11-22 Phil Edwards <phil@codesourcery.com>
PR target/12476
* config/arm/arm.c (arm_output_mi_thunk): In Thumb mode, use
'bx' instead of 'b' to avoid branch range restrictions. Output
the thunk immediately before the thunked-to function.
* config/arm/arm.h (ARM_DECLARE_FUNCTION_NAME): Do not emit
.thumb_func if a thunk is being generated. Emit .code 16 along
with .thumb_func if a thunk is not being generated.
2003-11-15 Nicolas Pitre <nico@cam.org>
* config/arm/arm.md (ashldi3, arm_ashldi3_1bit, ashrdi3,
arm_ashrdi3_1bit, lshrdi3, arm_lshrdi3_1bit): New patterns.
* config/arm/iwmmxt.md (ashrdi3_iwmmxt): Renamed from ashrdi3.
(lshrdi3_iwmmxt): Renamed from lshrdi3.
* config/arm/arm.c (IWMMXT_BUILTIN2): Renamed argument accordingly.
2003-11-12 Steve Woodford <scw@wasabisystems.com>
Ian Lance Taylor <ian@wasabisystems.com>
* config/arm/lib1funcs.asm (ARM_DIV_BODY, ARM_MOD_BODY): Add new
code for __ARM_ARCH__ >= 5 && ! defined (__OPTIMIZE_SIZE__).
2003-11-05 Phil Edwards <phil@codesourcery.com>
* config/arm/arm.md (insn): Add new V6 instruction names.
(generic_sched): New attr.
* config/arm/arm-generic.md: Use generic_sched here.
* config/arm/arm1026ejs.md: Do not model fetch/issue/decode
stages of pipeline. Adjust latency counts accordingly.
* config/arm/arm1136jfs.md: New file.
2003-10-28 Mark Mitchell <mark@codesourcery.com>
* config/arm/arm.h (processor_type): New enumeration type.
(CPP_ARCH_DEFAULT_SPEC): Set appropriately for ARM 926EJ-S,
ARM1026EJ-S, ARM1136J-S, and ARM1136JF-S processor cores.
(CPP_CPU_ARCH_SPEC): Likewise.
* config/arm/arm.c (arm_tune): New variable.
(all_cores): Use cores.def.
(all_architectures): Add representative processor.
(arm_override_options): Restructure way in which tuning
information is deduced.
* arm.md: Update "insn" and "type" attributes throughout.
(insn): New attribute.
(type): Compute "mult" from "insn" attribute. Add load2,
load3, load4 alternatives.
(arm automaton): Move to arm-generic.md.
* config/arm/arm-cores.def: New file.
* config/arm/arm-generic.md: Likewise.
* config/arm/arm1026ejs.md: Likewise.
From-SVN: r77171
2004-02-03 15:45:44 +01:00
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extern int arm_float_rhs_operand (rtx, enum machine_mode);
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extern int arm_float_add_operand (rtx, enum machine_mode);
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2003-06-10 20:55:17 +02:00
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extern int power_of_two_operand (rtx, enum machine_mode);
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extern int nonimmediate_di_operand (rtx, enum machine_mode);
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extern int di_operand (rtx, enum machine_mode);
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extern int nonimmediate_soft_df_operand (rtx, enum machine_mode);
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extern int soft_df_operand (rtx, enum machine_mode);
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extern int index_operand (rtx, enum machine_mode);
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extern int const_shift_operand (rtx, enum machine_mode);
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extern int arm_comparison_operator (rtx, enum machine_mode);
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extern int shiftable_operator (rtx, enum machine_mode);
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extern int shift_operator (rtx, enum machine_mode);
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extern int equality_operator (rtx, enum machine_mode);
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extern int minmax_operator (rtx, enum machine_mode);
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extern int cc_register (rtx, enum machine_mode);
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extern int dominant_cc_register (rtx, enum machine_mode);
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extern int logical_binary_operator (rtx, enum machine_mode);
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extern int multi_register_push (rtx, enum machine_mode);
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extern int load_multiple_operation (rtx, enum machine_mode);
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extern int store_multiple_operation (rtx, enum machine_mode);
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extern int cirrus_fp_register (rtx, enum machine_mode);
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extern int cirrus_general_operand (rtx, enum machine_mode);
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extern int cirrus_register_operand (rtx, enum machine_mode);
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extern int cirrus_shift_const (rtx, enum machine_mode);
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extern int cirrus_memory_offset (rtx);
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2004-05-06 01:11:55 +02:00
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extern int arm_coproc_mem_operand (rtx, bool);
|
backport: re PR target/12476 (ARM/THUMB thunk calls broken)
Merge from csl-arm-branch.
2004-01-30 Paul Brook <paul@codesourcery.com>
* aof.h (REGISTER_NAMES): Add vfp reg names
(ADDITIONAL_REGISTER_NAMES): Ditto.
* aout.h (REGISTER_NAMES): Ditto.
(ADDITIONAL_REGISTER_NAMES): Ditto.
* arm-protos.h: Update/Add Prototypes.
* arm.c (init_fp_table): Rename from init_fpa_table. Update users.
Only allow 0.0 for VFP.
(fp_consts_inited): Rename from fpa_consts_inited. Update users.
(values_fp): Rename from values_fpa. Update Users.
(arm_const_double_rtx): Rename from const_double_rtx_ok_for_fpa.
Update users. Only check valid constants for this hardware.
(arm_float_rhs_operand): Rename from fpa_rhs_operand. Update Users.
Only allow consts for FPA.
(arm_float_add_operand): Rename from fpa_add_operand. Update users.
Only allow consts for FPA.
(use_return_insn): Check for saved VFP regs.
(arm_legitimate_address_p): Handle VFP DFmode addressing.
(arm_legitimize_address): Ditto.
(arm_general_register_operand): New function.
(vfp_mem_operand): New function.
(vfp_compare_operand): New function.
(vfp_secondary_reload_class): New function.
(arm_float_compare_operand): New function.
(vfp_print_multi): New function.
(vfp_output_fstmx): New function.
(vfp_emit_fstm): New function.
(arm_output_epilogue): Output VPF reg restore code.
(arm_expand_prologue): Output VFP reg save code.
(arm_print_operand): Add 'P'.
(arm_hard_regno_mode_ok): Return modes for VFP regs.
(arm_regno_class): Return classes for VFP regs.
(arm_compute_initial_elimination_offset): Include space for VFP regs.
(arm_get_frame_size): Ditto.
* arm.h (FIXED_REGISTERS): Add VFP regs.
(CALL_USED_REGISTERS): Ditto.
(CONDITIONAL_REGISTER_USAGE): Enable VFP regs.
(FIRST_VFP_REGNUM): Define.
(LAST_VFP_REGNUM): Define.
(IS_VFP_REGNUM): Define.
(FIRST_PSEUDO_REGISTER): Include VFP regs.
(HARD_REGNO_NREGS): Handle VFP regs.
(REG_ALLOC_ORDER): Add VFP regs.
(enum reg_class): Add VFP_REGS.
(REG_CLASS_NAMES): Ditto.
(REG_CLASS_CONTENTS): Ditto.
(CANNOT_CHANGE_MODE_CLASS) Handle VFP Regs.
(REG_CLASS_FROM_LETTER): Add 'w'.
(EXTRA_CONSTRAINT_ARM): Add 'U'.
(EXTRA_MEMORY_CONSTRAINT): Define.
(SECONDARY_OUTPUT_RELOAD_CLASS): Handle VFP regs.
(SECONDARY_INPUT_RELOAD_CLASS): Ditto.
(REGISTER_MOVE_COST): Ditto.
(PREDICATE_CODES): Add arm_general_register_operand,
arm_float_compare_operand and vfp_compare_operand.
* arm.md (various): Rename as above.
(divsf3): Enable when TARGET_VFP.
(divdf3): Ditto.
(movdfcc): Ditto.
(sqrtsf2): Ditto.
(sqrtdf2): Ditto.
(arm_movdi): Disable when TARGET_VFP.
(arm_movsi_insn): Ditto.
(movsi): Only split with general regs.
(cmpsf): Use arm_float_compare_operand.
(push_fp_multi): Restrict to TARGET_FPA.
(vfp.md): Include.
* vfp.md: New file.
* fpa.md (various): Rename as above.
* doc/md.texi: Document ARM w and U constraints.
2004-01-15 Paul Brook <paul@codesourcery.com>
* config.gcc: Add with_fpu. Allow with-float=softfp.
* config/arm/arm.c (arm_override_options): Rename *-s to *s.
Break out of loop when we find a float-abi. Fix typo.
* config/arm/arm.h (OPTION_DEFAULT_SPECS): Add "fpu".
Set -mfloat-abi=.
* doc/install.texi: Document --with-fpu.
2003-01-14 Paul Brook <paul@codesourcery.com>
* config.gcc (with_arch): Add armv6.
* config/arm/arm.h: Rename TARGET_CPU_*_s to TARGET_CPU_*s.
* config/arm/arm.c (arm_overrride_options): Ditto.
2004-01-08 Richard Earnshaw <rearnsha@arm.com>
* arm.c (FL_ARCH3M): Renamed from FL_FAST_MULT.
(FL_ARCH6): Renamed from FL_ARCH6J.
(arm_arch3m): Renamed from arm_fast_multiply.
(arm_arch6): Renamed from arm_arch6j.
* arm.h: Update all uses of above.
* arm-cores.def: Likewise.
* arm.md: Likewise.
* arm.h (CPP_CPU_ARCH_SPEC): Emit __ARM_ARCH_6J__ define for armV6j,
not arm6j. Add entry for arch armv6.
2004-01-07 Richard Earnshaw <rearnsha@arm.com>
* arm.c (arm_emit_extendsi): Delete.
* arm-protos.h (arm_emit_extendsi): Delete.
* arm.md (zero_extendhisi2): Also handle zero-extension of
non-subregs.
(zero_extendqisi2, extendhisi2, extendqisi2): Likewise.
(thumb_zero_extendhisi2): Only match if not v6.
(arm_zero_extendhisi2, thumb_zero_extendqisi2, arm_zero_extendqisi2)
(thumb_extendhisi2, arm_extendhisi2, arm_extendqisi)
(thumb_extendqisi2): Likewise.
(thumb_zero_extendhisi2_v6, arm_zero_extendhisi2_v6): New patterns.
(thumb_zero_extendqisi2_v6, arm_zero_extendqisi2_v6): New patterns.
(thumb_extendhisi2_insn_v6, arm_extendhisi2_v6): New patterns.
(thumb_extendqisi2_v6, arm_extendqisi_v6): New patterns.
(arm_zero_extendhisi2_reg, arm_zero_extendqisi2_reg): Delete.
(arm_extendhisi2_reg, arm_extendqisi2_reg): Delete.
(arm_zero_extendhisi2addsi): Remove subreg. Add attributes.
(arm_zero_extendqisi2addsi, arm_extendhisi2addsi): Likewise.
(arm_extendqisi2addsi): Likewise.
2003-12-31 Mark Mitchell <mark@codesourcery.com>
Revert this change:
* config/arm/arm.h (THUMB_LEGTITIMIZE_RELOAD_ADDRESS): Reload REG
+ REG addressing modes.
* config/arm/arm.h (THUMB_LEGTITIMIZE_RELOAD_ADDRESS): Reload REG
+ REG addressing modes.
2003-12-30 Mark Mitchell <mark@codesourcery.com>
* config/arm/arm.h (THUMB_LEGITIMATE_CONSTANT_P): Accept
CONSTANT_P_RTX.
2003-30-12 Paul Brook <paul@codesourcery.com>
* longlong.h: protect arm inlines with !defined (__thumb__)
2003-30-12 Paul Brook <paul@codesourcery.com>
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Always define __arm__.
2003-12-30 Nathan Sidwell <nathan@codesourcery.com>
* builtins.c (expand_builtin_apply_args_1): Fix typo in previous
change.
2003-12-29 Nathan Sidwell <nathan@codesourcery.com>
* builtins.c (expand_builtin_apply_args_1): Add pretend args size
to the virtual incoming args pointer for downward stacks.
2003-12-29 Paul Brook <paul@codesourcery.com>
* config/arm/arm-cores.def: Add cost function.
* config/arm/arm.c (arm_*_rtx_costs): New functions.
(arm_rtx_costs): Remove
(struct processors): Add rtx_costs field.
(all_cores, all_architectures): Ditto.
(arm_override_options): Set targetm.rtx_costs.
(thumb_rtx_costs): New function.
(arm_rtx_costs_1): Remove cases handled elsewhere.
* config/arm/arm.h (processor_type): Add COSTS parameter.
2003-12-29 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm.md (generic_sched): arm926 has its own scheduler.
(arm926ejs.md): Include it.
* config/arm/arm926ejs.md: New pipeline description.
2003-12-24 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (arm_arch6j): New variable.
(arm_override_options): Set it.
(arm_emit_extendsi): New function.
* config/arm/arm-protos.h (arm_emit_extendsi): Add prototype.
* config/arm/arm.h (arm_arch6j): Declare.
* config/arm/arm.md: Add sign/zero extend insns.
2003-12-23 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (all_architectures): Add armv6.
* doc/invoke.texi: Document it.
2003-12-19 Paul Brook <paul@codesourcery.com>
* config/arm/arm.md: Add load1 and load_byte "type" attrs. Modify
insn patterns to match.
* config/arm/arm-generic.md: Ditto.
* config/arm/cirrus.md: Ditto.
* config/arm/fpa.md: Ditto.
* config/amm/iwmmxt.md: Ditto.
* config/arm/arm1026ejs.md: Ditto.
* config/arm/arm1135jfs.md: Ditto. Add insn_reservation and bypasses
for 11_loadb.
2003-12-18 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm-protos.h (arm_no_early_alu_shift_value_dep): Declare.
* config/arm/arm.c (arm_adjust_cost): Check shift cost for
TYPE_ALU_SHIFT and TYPE_ALU_SHIFT_REG.
(arm_no_early_store_addr_dep, arm_no_early_alu_shift_dep,
arm_no_early_mul_dep): Correctly deal with conditional execution,
parallels and single shift operations.
(arm_no_early_alu_shift_value_dep): Define.
* arm.md (attr type): Replace 'normal' with 'alu',
'alu_shift' and 'alu_shift_reg'.
(attr core_cycles): Adjust.
(*addsi3_carryin_shift, andsi_not_shiftsi_si, *arm_shiftsi3,
*shiftsi3_compare0, *notsi_shiftsi, *notsi_shiftsi_compare0,
*not_shiftsi_compare0_scratch, *cmpsi_shiftsi, *cmpsi_shiftsi_swp,
*cmpsi_neg_shiftsi, *arith_shiftsi, *arith_shiftsi_compare0,
*arith_shiftsi_compare0_scratch, *sub_shiftsi,
*sub_shiftsi_compare0, *sub_shiftsi_compare0_scratch,
*if_shift_move, *if_move_shift, *if_shift_shift): Set type
attribute appropriately.
* config/arm/arm1026ejs.md (alu_op): Adjust.
(alu_shift_op, alu_shift_reg_op): New.
* config/arm/arm1136.md: Add better bypasses for early
registers. Remove load[234] and store[234] bypasses.
(11_alu_op): Adjust.
(11_alu_shift_op, 11_alu_shift_reg_op): New.
2003-12-15 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm-protos.h (arm_no_early_store_addr_dep,
arm_no_early_alu_shift_dep, arm_no_early_mul_dep): Declare.
* config/arm/arm.c (arm_no_early_store_addr_dep,
arm_no_early_alu_shift_dep, arm_no_early_mul_dep): Define.
* config/arm/arm1026ejs.md: Add load-store bypass.
* config/arm/arm1136jfs.md (11_alu_op): Take 2 cycles.
Add bypasses between instructions.
2003-12-10 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (arm_fpu_model): New variable.
(arm_fload_abi): New variable.
(target_fpe_name): Rename from target_fp_name.
(target_fpu_name): New variable.
(arm_is_cirrus): Remove.
(fpu_desc): New struct.
(all_fpus): Define.
(pf_model_for_fpu): Define.
(all_loat_abis): Define.
(arm_override_options): Set fp arch flags based on -mfpu=
and -float-abi=.
(FIRST_FPA_REGNUM): Rename from FIRST_ARM_FP_REGNUM.
(LAST_FPA_REGNUM): Rename from LAST_ARM_FP_REGNUM.
(*): Use new TARGET_* flags.
* config/arm/arm.h (TARGET_ANY_HARD_FLOAT): Remove.
(TARGET_HARD_FLOAT): No longer implies TARGET_FPA.
(TARGET_SOFT_FLOAT): Ditto.
(TARGET_SOFT_FLOAT_ABI): New.
(TARGET_MAVERICK): Rename from TARGET_CIRRUS. No longer implies
TARGET_HARD_FLOAT.
(TARGET_VFP): No longer implies TARGET_HARD_FLOAT.
(TARGET_OPTIONS): Add -mfpu=.
(FIRST_FPA_REGNUM): Rename from FIRST_ARM_FP_REGNUM.
(LAST_FPA_REGNUM): Rename from LAST_ARM_FP_REGNUM.
(arm_pf_model): Define.
(arm_float_abi_type): Define.
(fputype): Add FPUTYPE_VFP. Change SOFT_FPA->NONE
* config/arm/arm.md: Use new TARGET_* flags.
* config/arm/cirrus.md: Ditto.
* config/arm/fpa.md: Ditto.
* config/arm/elf.h (ASM_SPEC): Pass -mfloat-abi= and -mfpu=.
* config/arm/semi.h (ASM_SPEC): Ditto.
* config/arm/netbsd-elf.h (SUBTARGET_ASM_FLOAT_SPEC): Specify vfp.
(FPUTYPE_DEFAULT): Set to VFP.
* doc/invoke.texi: Document -mfpu= and -mfloat-abi=.
2003-11-22 Phil Edwards <phil@codesourcery.com>
PR target/12476
* config/arm/arm.c (arm_output_mi_thunk): In Thumb mode, use
'bx' instead of 'b' to avoid branch range restrictions. Output
the thunk immediately before the thunked-to function.
* config/arm/arm.h (ARM_DECLARE_FUNCTION_NAME): Do not emit
.thumb_func if a thunk is being generated. Emit .code 16 along
with .thumb_func if a thunk is not being generated.
2003-11-15 Nicolas Pitre <nico@cam.org>
* config/arm/arm.md (ashldi3, arm_ashldi3_1bit, ashrdi3,
arm_ashrdi3_1bit, lshrdi3, arm_lshrdi3_1bit): New patterns.
* config/arm/iwmmxt.md (ashrdi3_iwmmxt): Renamed from ashrdi3.
(lshrdi3_iwmmxt): Renamed from lshrdi3.
* config/arm/arm.c (IWMMXT_BUILTIN2): Renamed argument accordingly.
2003-11-12 Steve Woodford <scw@wasabisystems.com>
Ian Lance Taylor <ian@wasabisystems.com>
* config/arm/lib1funcs.asm (ARM_DIV_BODY, ARM_MOD_BODY): Add new
code for __ARM_ARCH__ >= 5 && ! defined (__OPTIMIZE_SIZE__).
2003-11-05 Phil Edwards <phil@codesourcery.com>
* config/arm/arm.md (insn): Add new V6 instruction names.
(generic_sched): New attr.
* config/arm/arm-generic.md: Use generic_sched here.
* config/arm/arm1026ejs.md: Do not model fetch/issue/decode
stages of pipeline. Adjust latency counts accordingly.
* config/arm/arm1136jfs.md: New file.
2003-10-28 Mark Mitchell <mark@codesourcery.com>
* config/arm/arm.h (processor_type): New enumeration type.
(CPP_ARCH_DEFAULT_SPEC): Set appropriately for ARM 926EJ-S,
ARM1026EJ-S, ARM1136J-S, and ARM1136JF-S processor cores.
(CPP_CPU_ARCH_SPEC): Likewise.
* config/arm/arm.c (arm_tune): New variable.
(all_cores): Use cores.def.
(all_architectures): Add representative processor.
(arm_override_options): Restructure way in which tuning
information is deduced.
* arm.md: Update "insn" and "type" attributes throughout.
(insn): New attribute.
(type): Compute "mult" from "insn" attribute. Add load2,
load3, load4 alternatives.
(arm automaton): Move to arm-generic.md.
* config/arm/arm-cores.def: New file.
* config/arm/arm-generic.md: Likewise.
* config/arm/arm1026ejs.md: Likewise.
From-SVN: r77171
2004-02-03 15:45:44 +01:00
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extern int vfp_compare_operand (rtx, enum machine_mode);
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extern int arm_float_compare_operand (rtx, enum machine_mode);
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extern int arm_no_early_store_addr_dep (rtx, rtx);
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extern int arm_no_early_alu_shift_dep (rtx, rtx);
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extern int arm_no_early_alu_shift_value_dep (rtx, rtx);
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extern int arm_no_early_mul_dep (rtx, rtx);
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2003-06-10 20:55:17 +02:00
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extern int symbol_mentioned_p (rtx);
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extern int label_mentioned_p (rtx);
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extern RTX_CODE minmax_code (rtx);
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extern int adjacent_mem_locations (rtx, rtx);
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extern int load_multiple_sequence (rtx *, int, int *, int *, HOST_WIDE_INT *);
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extern const char *emit_ldm_seq (rtx *, int);
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extern int store_multiple_sequence (rtx *, int, int *, int *, HOST_WIDE_INT *);
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extern const char * emit_stm_seq (rtx *, int);
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extern rtx arm_gen_load_multiple (int, int, rtx, int, int, int, int, int);
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extern rtx arm_gen_store_multiple (int, int, rtx, int, int, int, int, int);
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2004-07-07 21:25:01 +02:00
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extern int arm_gen_movmemqi (rtx *);
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2003-06-10 20:55:17 +02:00
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extern rtx arm_gen_rotated_half_load (rtx);
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extern enum machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx);
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extern enum machine_mode arm_select_dominance_cc_mode (rtx, rtx,
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HOST_WIDE_INT);
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extern rtx arm_gen_compare_reg (RTX_CODE, rtx, rtx);
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extern rtx arm_gen_return_addr_mask (void);
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extern void arm_reload_in_hi (rtx *);
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extern void arm_reload_out_hi (rtx *);
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extern const char *fp_immediate_constant (rtx);
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extern const char *output_call (rtx *);
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extern const char *output_call_mem (rtx *);
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extern const char *output_mov_long_double_fpa_from_arm (rtx *);
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extern const char *output_mov_long_double_arm_from_fpa (rtx *);
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extern const char *output_mov_long_double_arm_from_arm (rtx *);
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extern const char *output_mov_double_fpa_from_arm (rtx *);
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extern const char *output_mov_double_arm_from_fpa (rtx *);
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extern const char *output_move_double (rtx *);
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extern const char *output_mov_immediate (rtx *);
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extern const char *output_add_immediate (rtx *);
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extern const char *arithmetic_instr (rtx, int);
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extern void output_ascii_pseudo_op (FILE *, const unsigned char *, int);
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extern const char *output_return_instruction (rtx, int, int);
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extern void arm_poke_function_name (FILE *, const char *);
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extern void arm_print_operand (FILE *, rtx, int);
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extern void arm_print_operand_address (FILE *, rtx);
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extern void arm_final_prescan_insn (rtx);
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extern int arm_go_if_legitimate_address (enum machine_mode, rtx);
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extern int arm_debugger_arg_offset (int, rtx);
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extern int arm_is_longcall_p (rtx, int, int);
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config.gcc: Add an extra_header for ARM targets.
* config.gcc: Add an extra_header for ARM targets.
Support configuring with --with-cpu=iwmmxt.
* doc/invoke.texi: Document new value for -mcpu= ARM switch.
* config/arm/aof.h (REGISTER_NAMES): Add iwmmxt register
names. Fix formatting.
* config/arm/aout.h (REGISTER_NAMES): Add iwmmxt register
names.
* config/arm/arm-protos.h (arm_emit_vector_const): New
prototype.
(arm_output_load_gr): New prototype.
* config/arm/arm.c (extra_reg_names1): Delete.
(TARGET_INIT_BUILTINS, TARGET_EXPAND_BUILTIN, FL_IWMMXT,
* arch_is_iwmmxt): Define.
(all_cores, all_architecture): Add entry for iwmmxt.
(arm_override_options): Add support for iwmmxt.
(use_return_insn, arm_function_arg, arm_legitimate_index_p,
arm_print_value, arm_rtx_costs_1, output_move_double,
arm_compute_save_reg_mask, arm_output_epilogue,
arm_get_frame_size, arm_expand_prologue, arm_print_operand,
arm_assemble_integer, arm_hard_regno_ok, arm_regno_class):
Likewise.
(arm_init_cumulative_args): Count iwmmxt registers.
(arm_function_ok_for_sibcall): Return false of sibcall_blocked
has been set.
(struct minipool_node): Add fix_size field.
(add_minipool_forward_ref): Add support for 8-byte aligning of
the pool.
(add_minipool_backward_ref, add_minipool_offsets,
dump_minipool, push_minipool_fix): Likewise.
(struct builtin_description): New struct.
(builtin_description): New array of iwmmxt builtin functions.
(arm_init_iwmmxt_builtins): New function.
(arm_init_builtins): New function.
(safe_vector_operand): New function.
(arm_expand_binop_builtin): New function.
(arm_expand_unop_builtin): New function.
(arm_expand_builtin): New function.
(arm_emit_vector_const): New function.
(arm_output_load_gr): New function.
* config/arm/arm.h (TARGET_CPU_iwmmxt, TARGET_IWMMXT,
TARGET_REALLY_IWMMXT, arm_arch_iwmmxt, IWMMXT_ALIGNMENT,
TYPE_NEEDS_IWMMXT_ALIGNMENT, ADJUST_FIELD_ALIGN,
DATA_ALIGNMENT, LOCAL_ALIGNMENT, VECTOR_MODE_SUPPORTED_P): Define.
(BIGGEST_ALIGNMENT): Set to 64 if ATPCS support is enabled.
(CPP_CPU_ARCH_SPEC): Add entries for iwmmxt.
(FIXED_REGISTERS, CALL_USED_REGISTERS, REG_ALLOC_ORDER,
reg_class, REG_CLASS_NAMES, REG_CLASS_CONTENTS,
REG_CLASS_FOR_LETTER): Add iwmmxt registers.
(SUBTARGET_CONDITIONAL_REGISTER_USAGE): Disable iwmmxt
registers unless the iwmmxt target is selected.
(FIRST_IWMMXT_GR_REGNUM, LAST_IWMMXT_GR_REGNUM,
FIRST_IWMMXT_REGNUM, LAST_IWMMXT_REGNUM, IS_IWMMXT_REGNUM,
IS_IWMMXT_GR_REGNUM): Define.
(FIRST_PSEUDO_REGISTER): Bump to 63.
(struct machine_function): Add sibcall_blocked field.
(Struct CUMULATIVE_ARGS): Add iwmmxt_nregs, named_count and
nargs fields.
(enum arm_builtins): New enum list.
* config/arm/arm.md (UNSPEC_WSHUFH, UNSPEC_WACC,
UNSPEC_TMOVMSK, UNSPEC_WSAD, UNSPEC_WSADZ, UNSPEC_WMACS,
UNSPEC_WMACU, UNSPEC_WMACSZ, UNSPEC_WMACUZ, UNSPEC_CLRDI,
UNSPEC_WMADDS, UNSPEC_WMADDU): New unspecs.
(VUNSPEC_TMRC, VUNSPEC_TMCR, VUNSPEC_ALIGN8, VUNSPEC_WCMP_EQ,
VUNSPEC_WCMP_GTU, VUNSPEC_WCMP_GT): New vunspecs.
(movv2si, movv4hi, movv8qi): New expands for vector moves.
Include iwmmxt.md.
* config/arm/t-xscale-elf (MULTILIB_OPITONS): Add iwmmxt
multilib.
(MULTILIB_DIRNAMES, MULTILIB_REDUNDANT_DIRS): Likewise.
* config/arm/mmintrin.h: New ARM specific header file.
* config/arm/iwmmx.md: New iWMMXt specific machine patterns.
From-SVN: r68157
2003-06-18 18:36:13 +02:00
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extern int arm_emit_vector_const (FILE *, rtx);
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extern const char * arm_output_load_gr (rtx *);
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backport: re PR target/12476 (ARM/THUMB thunk calls broken)
Merge from csl-arm-branch.
2004-01-30 Paul Brook <paul@codesourcery.com>
* aof.h (REGISTER_NAMES): Add vfp reg names
(ADDITIONAL_REGISTER_NAMES): Ditto.
* aout.h (REGISTER_NAMES): Ditto.
(ADDITIONAL_REGISTER_NAMES): Ditto.
* arm-protos.h: Update/Add Prototypes.
* arm.c (init_fp_table): Rename from init_fpa_table. Update users.
Only allow 0.0 for VFP.
(fp_consts_inited): Rename from fpa_consts_inited. Update users.
(values_fp): Rename from values_fpa. Update Users.
(arm_const_double_rtx): Rename from const_double_rtx_ok_for_fpa.
Update users. Only check valid constants for this hardware.
(arm_float_rhs_operand): Rename from fpa_rhs_operand. Update Users.
Only allow consts for FPA.
(arm_float_add_operand): Rename from fpa_add_operand. Update users.
Only allow consts for FPA.
(use_return_insn): Check for saved VFP regs.
(arm_legitimate_address_p): Handle VFP DFmode addressing.
(arm_legitimize_address): Ditto.
(arm_general_register_operand): New function.
(vfp_mem_operand): New function.
(vfp_compare_operand): New function.
(vfp_secondary_reload_class): New function.
(arm_float_compare_operand): New function.
(vfp_print_multi): New function.
(vfp_output_fstmx): New function.
(vfp_emit_fstm): New function.
(arm_output_epilogue): Output VPF reg restore code.
(arm_expand_prologue): Output VFP reg save code.
(arm_print_operand): Add 'P'.
(arm_hard_regno_mode_ok): Return modes for VFP regs.
(arm_regno_class): Return classes for VFP regs.
(arm_compute_initial_elimination_offset): Include space for VFP regs.
(arm_get_frame_size): Ditto.
* arm.h (FIXED_REGISTERS): Add VFP regs.
(CALL_USED_REGISTERS): Ditto.
(CONDITIONAL_REGISTER_USAGE): Enable VFP regs.
(FIRST_VFP_REGNUM): Define.
(LAST_VFP_REGNUM): Define.
(IS_VFP_REGNUM): Define.
(FIRST_PSEUDO_REGISTER): Include VFP regs.
(HARD_REGNO_NREGS): Handle VFP regs.
(REG_ALLOC_ORDER): Add VFP regs.
(enum reg_class): Add VFP_REGS.
(REG_CLASS_NAMES): Ditto.
(REG_CLASS_CONTENTS): Ditto.
(CANNOT_CHANGE_MODE_CLASS) Handle VFP Regs.
(REG_CLASS_FROM_LETTER): Add 'w'.
(EXTRA_CONSTRAINT_ARM): Add 'U'.
(EXTRA_MEMORY_CONSTRAINT): Define.
(SECONDARY_OUTPUT_RELOAD_CLASS): Handle VFP regs.
(SECONDARY_INPUT_RELOAD_CLASS): Ditto.
(REGISTER_MOVE_COST): Ditto.
(PREDICATE_CODES): Add arm_general_register_operand,
arm_float_compare_operand and vfp_compare_operand.
* arm.md (various): Rename as above.
(divsf3): Enable when TARGET_VFP.
(divdf3): Ditto.
(movdfcc): Ditto.
(sqrtsf2): Ditto.
(sqrtdf2): Ditto.
(arm_movdi): Disable when TARGET_VFP.
(arm_movsi_insn): Ditto.
(movsi): Only split with general regs.
(cmpsf): Use arm_float_compare_operand.
(push_fp_multi): Restrict to TARGET_FPA.
(vfp.md): Include.
* vfp.md: New file.
* fpa.md (various): Rename as above.
* doc/md.texi: Document ARM w and U constraints.
2004-01-15 Paul Brook <paul@codesourcery.com>
* config.gcc: Add with_fpu. Allow with-float=softfp.
* config/arm/arm.c (arm_override_options): Rename *-s to *s.
Break out of loop when we find a float-abi. Fix typo.
* config/arm/arm.h (OPTION_DEFAULT_SPECS): Add "fpu".
Set -mfloat-abi=.
* doc/install.texi: Document --with-fpu.
2003-01-14 Paul Brook <paul@codesourcery.com>
* config.gcc (with_arch): Add armv6.
* config/arm/arm.h: Rename TARGET_CPU_*_s to TARGET_CPU_*s.
* config/arm/arm.c (arm_overrride_options): Ditto.
2004-01-08 Richard Earnshaw <rearnsha@arm.com>
* arm.c (FL_ARCH3M): Renamed from FL_FAST_MULT.
(FL_ARCH6): Renamed from FL_ARCH6J.
(arm_arch3m): Renamed from arm_fast_multiply.
(arm_arch6): Renamed from arm_arch6j.
* arm.h: Update all uses of above.
* arm-cores.def: Likewise.
* arm.md: Likewise.
* arm.h (CPP_CPU_ARCH_SPEC): Emit __ARM_ARCH_6J__ define for armV6j,
not arm6j. Add entry for arch armv6.
2004-01-07 Richard Earnshaw <rearnsha@arm.com>
* arm.c (arm_emit_extendsi): Delete.
* arm-protos.h (arm_emit_extendsi): Delete.
* arm.md (zero_extendhisi2): Also handle zero-extension of
non-subregs.
(zero_extendqisi2, extendhisi2, extendqisi2): Likewise.
(thumb_zero_extendhisi2): Only match if not v6.
(arm_zero_extendhisi2, thumb_zero_extendqisi2, arm_zero_extendqisi2)
(thumb_extendhisi2, arm_extendhisi2, arm_extendqisi)
(thumb_extendqisi2): Likewise.
(thumb_zero_extendhisi2_v6, arm_zero_extendhisi2_v6): New patterns.
(thumb_zero_extendqisi2_v6, arm_zero_extendqisi2_v6): New patterns.
(thumb_extendhisi2_insn_v6, arm_extendhisi2_v6): New patterns.
(thumb_extendqisi2_v6, arm_extendqisi_v6): New patterns.
(arm_zero_extendhisi2_reg, arm_zero_extendqisi2_reg): Delete.
(arm_extendhisi2_reg, arm_extendqisi2_reg): Delete.
(arm_zero_extendhisi2addsi): Remove subreg. Add attributes.
(arm_zero_extendqisi2addsi, arm_extendhisi2addsi): Likewise.
(arm_extendqisi2addsi): Likewise.
2003-12-31 Mark Mitchell <mark@codesourcery.com>
Revert this change:
* config/arm/arm.h (THUMB_LEGTITIMIZE_RELOAD_ADDRESS): Reload REG
+ REG addressing modes.
* config/arm/arm.h (THUMB_LEGTITIMIZE_RELOAD_ADDRESS): Reload REG
+ REG addressing modes.
2003-12-30 Mark Mitchell <mark@codesourcery.com>
* config/arm/arm.h (THUMB_LEGITIMATE_CONSTANT_P): Accept
CONSTANT_P_RTX.
2003-30-12 Paul Brook <paul@codesourcery.com>
* longlong.h: protect arm inlines with !defined (__thumb__)
2003-30-12 Paul Brook <paul@codesourcery.com>
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Always define __arm__.
2003-12-30 Nathan Sidwell <nathan@codesourcery.com>
* builtins.c (expand_builtin_apply_args_1): Fix typo in previous
change.
2003-12-29 Nathan Sidwell <nathan@codesourcery.com>
* builtins.c (expand_builtin_apply_args_1): Add pretend args size
to the virtual incoming args pointer for downward stacks.
2003-12-29 Paul Brook <paul@codesourcery.com>
* config/arm/arm-cores.def: Add cost function.
* config/arm/arm.c (arm_*_rtx_costs): New functions.
(arm_rtx_costs): Remove
(struct processors): Add rtx_costs field.
(all_cores, all_architectures): Ditto.
(arm_override_options): Set targetm.rtx_costs.
(thumb_rtx_costs): New function.
(arm_rtx_costs_1): Remove cases handled elsewhere.
* config/arm/arm.h (processor_type): Add COSTS parameter.
2003-12-29 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm.md (generic_sched): arm926 has its own scheduler.
(arm926ejs.md): Include it.
* config/arm/arm926ejs.md: New pipeline description.
2003-12-24 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (arm_arch6j): New variable.
(arm_override_options): Set it.
(arm_emit_extendsi): New function.
* config/arm/arm-protos.h (arm_emit_extendsi): Add prototype.
* config/arm/arm.h (arm_arch6j): Declare.
* config/arm/arm.md: Add sign/zero extend insns.
2003-12-23 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (all_architectures): Add armv6.
* doc/invoke.texi: Document it.
2003-12-19 Paul Brook <paul@codesourcery.com>
* config/arm/arm.md: Add load1 and load_byte "type" attrs. Modify
insn patterns to match.
* config/arm/arm-generic.md: Ditto.
* config/arm/cirrus.md: Ditto.
* config/arm/fpa.md: Ditto.
* config/amm/iwmmxt.md: Ditto.
* config/arm/arm1026ejs.md: Ditto.
* config/arm/arm1135jfs.md: Ditto. Add insn_reservation and bypasses
for 11_loadb.
2003-12-18 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm-protos.h (arm_no_early_alu_shift_value_dep): Declare.
* config/arm/arm.c (arm_adjust_cost): Check shift cost for
TYPE_ALU_SHIFT and TYPE_ALU_SHIFT_REG.
(arm_no_early_store_addr_dep, arm_no_early_alu_shift_dep,
arm_no_early_mul_dep): Correctly deal with conditional execution,
parallels and single shift operations.
(arm_no_early_alu_shift_value_dep): Define.
* arm.md (attr type): Replace 'normal' with 'alu',
'alu_shift' and 'alu_shift_reg'.
(attr core_cycles): Adjust.
(*addsi3_carryin_shift, andsi_not_shiftsi_si, *arm_shiftsi3,
*shiftsi3_compare0, *notsi_shiftsi, *notsi_shiftsi_compare0,
*not_shiftsi_compare0_scratch, *cmpsi_shiftsi, *cmpsi_shiftsi_swp,
*cmpsi_neg_shiftsi, *arith_shiftsi, *arith_shiftsi_compare0,
*arith_shiftsi_compare0_scratch, *sub_shiftsi,
*sub_shiftsi_compare0, *sub_shiftsi_compare0_scratch,
*if_shift_move, *if_move_shift, *if_shift_shift): Set type
attribute appropriately.
* config/arm/arm1026ejs.md (alu_op): Adjust.
(alu_shift_op, alu_shift_reg_op): New.
* config/arm/arm1136.md: Add better bypasses for early
registers. Remove load[234] and store[234] bypasses.
(11_alu_op): Adjust.
(11_alu_shift_op, 11_alu_shift_reg_op): New.
2003-12-15 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm-protos.h (arm_no_early_store_addr_dep,
arm_no_early_alu_shift_dep, arm_no_early_mul_dep): Declare.
* config/arm/arm.c (arm_no_early_store_addr_dep,
arm_no_early_alu_shift_dep, arm_no_early_mul_dep): Define.
* config/arm/arm1026ejs.md: Add load-store bypass.
* config/arm/arm1136jfs.md (11_alu_op): Take 2 cycles.
Add bypasses between instructions.
2003-12-10 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (arm_fpu_model): New variable.
(arm_fload_abi): New variable.
(target_fpe_name): Rename from target_fp_name.
(target_fpu_name): New variable.
(arm_is_cirrus): Remove.
(fpu_desc): New struct.
(all_fpus): Define.
(pf_model_for_fpu): Define.
(all_loat_abis): Define.
(arm_override_options): Set fp arch flags based on -mfpu=
and -float-abi=.
(FIRST_FPA_REGNUM): Rename from FIRST_ARM_FP_REGNUM.
(LAST_FPA_REGNUM): Rename from LAST_ARM_FP_REGNUM.
(*): Use new TARGET_* flags.
* config/arm/arm.h (TARGET_ANY_HARD_FLOAT): Remove.
(TARGET_HARD_FLOAT): No longer implies TARGET_FPA.
(TARGET_SOFT_FLOAT): Ditto.
(TARGET_SOFT_FLOAT_ABI): New.
(TARGET_MAVERICK): Rename from TARGET_CIRRUS. No longer implies
TARGET_HARD_FLOAT.
(TARGET_VFP): No longer implies TARGET_HARD_FLOAT.
(TARGET_OPTIONS): Add -mfpu=.
(FIRST_FPA_REGNUM): Rename from FIRST_ARM_FP_REGNUM.
(LAST_FPA_REGNUM): Rename from LAST_ARM_FP_REGNUM.
(arm_pf_model): Define.
(arm_float_abi_type): Define.
(fputype): Add FPUTYPE_VFP. Change SOFT_FPA->NONE
* config/arm/arm.md: Use new TARGET_* flags.
* config/arm/cirrus.md: Ditto.
* config/arm/fpa.md: Ditto.
* config/arm/elf.h (ASM_SPEC): Pass -mfloat-abi= and -mfpu=.
* config/arm/semi.h (ASM_SPEC): Ditto.
* config/arm/netbsd-elf.h (SUBTARGET_ASM_FLOAT_SPEC): Specify vfp.
(FPUTYPE_DEFAULT): Set to VFP.
* doc/invoke.texi: Document -mfpu= and -mfloat-abi=.
2003-11-22 Phil Edwards <phil@codesourcery.com>
PR target/12476
* config/arm/arm.c (arm_output_mi_thunk): In Thumb mode, use
'bx' instead of 'b' to avoid branch range restrictions. Output
the thunk immediately before the thunked-to function.
* config/arm/arm.h (ARM_DECLARE_FUNCTION_NAME): Do not emit
.thumb_func if a thunk is being generated. Emit .code 16 along
with .thumb_func if a thunk is not being generated.
2003-11-15 Nicolas Pitre <nico@cam.org>
* config/arm/arm.md (ashldi3, arm_ashldi3_1bit, ashrdi3,
arm_ashrdi3_1bit, lshrdi3, arm_lshrdi3_1bit): New patterns.
* config/arm/iwmmxt.md (ashrdi3_iwmmxt): Renamed from ashrdi3.
(lshrdi3_iwmmxt): Renamed from lshrdi3.
* config/arm/arm.c (IWMMXT_BUILTIN2): Renamed argument accordingly.
2003-11-12 Steve Woodford <scw@wasabisystems.com>
Ian Lance Taylor <ian@wasabisystems.com>
* config/arm/lib1funcs.asm (ARM_DIV_BODY, ARM_MOD_BODY): Add new
code for __ARM_ARCH__ >= 5 && ! defined (__OPTIMIZE_SIZE__).
2003-11-05 Phil Edwards <phil@codesourcery.com>
* config/arm/arm.md (insn): Add new V6 instruction names.
(generic_sched): New attr.
* config/arm/arm-generic.md: Use generic_sched here.
* config/arm/arm1026ejs.md: Do not model fetch/issue/decode
stages of pipeline. Adjust latency counts accordingly.
* config/arm/arm1136jfs.md: New file.
2003-10-28 Mark Mitchell <mark@codesourcery.com>
* config/arm/arm.h (processor_type): New enumeration type.
(CPP_ARCH_DEFAULT_SPEC): Set appropriately for ARM 926EJ-S,
ARM1026EJ-S, ARM1136J-S, and ARM1136JF-S processor cores.
(CPP_CPU_ARCH_SPEC): Likewise.
* config/arm/arm.c (arm_tune): New variable.
(all_cores): Use cores.def.
(all_architectures): Add representative processor.
(arm_override_options): Restructure way in which tuning
information is deduced.
* arm.md: Update "insn" and "type" attributes throughout.
(insn): New attribute.
(type): Compute "mult" from "insn" attribute. Add load2,
load3, load4 alternatives.
(arm automaton): Move to arm-generic.md.
* config/arm/arm-cores.def: New file.
* config/arm/arm-generic.md: Likewise.
* config/arm/arm1026ejs.md: Likewise.
From-SVN: r77171
2004-02-03 15:45:44 +01:00
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extern const char *vfp_output_fstmx (rtx *);
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arm-protos.h (arm_set_return_address, [...]): Add prototypes.
* config/arm/arm-protos.h (arm_set_return_address,
thumb_set_return_address): Add prototypes.
* config/arm/arm.h (ARM_FT_EXCEPTION_HANDLER): Remove.
* config/arm/arm.c (arm_compute_func_type,
use_return_insn, arm_compute_save_reg0_reg12_mask,
arm_compute_save_reg_mask, arm_output_function_prologue,
arm_output_epilogue): Replace ARM_FT_EXCEPTION_HANDLER with
current_function_calls_eh_return.
(thumb_exit, thumb_pushpop, thumb_unexpanded_epilogue): Replace
old eh code.
(arm_set_return_address, thumb_set_return_address): New functions.
* config/arm/arm.h (MUST_USE_SJLJ_EXCEPTIONS, DWARF2_UNWIND_INFO,
ARM_EH_STACKADJ_REGNUM, EH_RETURN_STACKADJ_RTX): Define.
* config/arm/arm.md (VUNSPEC_EH_RETURN): Add.
(epilogue): Use the stackadj register.
(eh_return, arm_eh_return, thumb_eh_return): New pattern.
From-SVN: r85757
2004-08-10 18:22:47 +02:00
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extern void arm_set_return_address (rtx, rtx);
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2000-04-08 16:29:53 +02:00
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#if defined TREE_CODE
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2003-06-10 20:55:17 +02:00
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extern rtx arm_function_arg (CUMULATIVE_ARGS *, enum machine_mode, tree, int);
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extern void arm_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree);
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config.gcc: Add --with-abi=
* config.gcc <arm>: Add --with-abi=
* config/arm/arm-protos.h (arm_get_frame_size, thumb_get_frame_size,
thumb_far_jump_used): Remove prototypes.
(arm_needs_doubleword_align): Add prototype.
(thumb_compute_initial_elimination_offset): Ditto.
* config/arm/arm.c (arm_get_frame_offsets): New function.
(use_return_insn, output_return_instruction, arm_output_epilogue,
arm_output_function_epilogue, arm_compute_initial_elimination_offset,
arm_expand_prologue, thumb_expand_epilogue): Use it.
(arm_abi, target_abi_name, all_arm_abis): New variables.
(arm_override_options): Set them. Set structure padding for AAPCS.
(arm_return_in_memory): Update ABI check.
(arm_init_cumulative_args): Initialize can_split.
(arm_needs_doubleword_align): New function.
(arm_function_arg): Don't split args after pushing to stack. Handle
doubleword/even reg alignment.
(arm_va_arg): Handle all doubleword aligned args.
(add_minpoolforward ref, dump_minpool, push_minpool_fix): Align based
on ABI, not CPU.
(arm_compute_save_reg0_reg12_mask): Fix comment.
(thumb_get_frame_size, thumb_get_frame_size): Remove.
(thumb_jump_far_used_p): Remove superfluous argument. Return save
value for alignment.
(thumb_unexpanded_epilogue, thumb_output_function_prologue): Change
to match.
(thumb_compute_initial_elimination_offset): New function.
(thumb_expand_prologue): Use arm_get_frame_offsets. Remove
unneccessary rounding.
* config/arm/arm.h (target_abi_name): Declare.
(ARM_DOUBLEWORD_ALIGN, DOUBLEWORD_ALIGNMENT, TARGET_IWMMXT_ABI,
arm_abi_type, ARM_DEFAULT_ABI): Define.
(ARM_FLAG_ATPCS): Remove.
(TARGET_OPTIONS, OPTION_DEFAULT_SPECS): Add -mabi=.
(BIGGEST_ALIGNMENT, PREFERRED_STACK_BOUNDARY, STACK_BOUNDARY): Use it.
(ADJUST_FIELD_ALIGN, DATA_ALIGNMENT, LOCAL_ALIGNMENT,
TYPE_NEEDS_IWMMXT_ALIGNMENT): Remove.
(LIBCALL_VALUE, FUNCTION_VALUE_REGNO_P, FUNCTION_ARG_REGNO_P):
Contitionalize on ABI, not CPU.
(struct arm_stack_offsets): Define.
(struct machine_function): Add stack_offsets. Remove frame_size.
(FUNCTION_ARG_PARTIAL_NREGS): Don't split if previous args have been
pushed.
(FUNCTION_ARG_ADVANCE, FUNCTION_ARG_BOUNDARY): Handle general
doubleword alignment.
(THUMB_INITIAL_ELIMINATION_OFFSET,
ARM_INITIAL_ELIMINATION_OFFSET): Remove.
(INITIAL_ELIMINATION_OFFSET): Call functions directly.
* config/arm/arm.md (align_8): Enable for all targets.
* config/arm/netbsd-elf.h (TARGET_DEFAULT): Remove TARGET_ATPCS.
(ARM_DEFAULT_ABI): Define.
* doc/invoke.texi <ARM>: Document -mabi=. Update documentation for
-mstructure-size-boundary.
From-SVN: r79921
2004-03-24 18:20:16 +01:00
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extern bool arm_needs_doubleword_align (enum machine_mode, tree);
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2004-04-08 20:26:09 +02:00
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extern rtx arm_function_value(tree, tree);
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2000-04-08 16:29:53 +02:00
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#endif
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1999-11-09 17:45:49 +01:00
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#if defined AOF_ASSEMBLER
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2003-06-10 20:55:17 +02:00
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extern rtx aof_pic_entry (rtx);
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extern char *aof_text_section (void);
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extern char *aof_data_section (void);
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extern void aof_add_import (const char *);
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extern void aof_delete_import (const char *);
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extern void zero_init_section (void);
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extern void common_section (void);
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1999-11-09 17:45:49 +01:00
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#endif /* AOF_ASSEMBLER */
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#endif /* RTX_CODE */
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2003-06-10 20:55:17 +02:00
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extern int arm_float_words_big_endian (void);
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2002-09-05 18:45:24 +02:00
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2000-04-08 16:29:53 +02:00
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/* Thumb functions. */
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2003-06-10 20:55:17 +02:00
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extern void arm_init_expanders (void);
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extern const char *thumb_unexpanded_epilogue (void);
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extern void thumb_expand_prologue (void);
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extern void thumb_expand_epilogue (void);
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2000-04-08 16:29:53 +02:00
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#ifdef TREE_CODE
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2003-06-10 20:55:17 +02:00
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extern int is_called_in_ARM_mode (tree);
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2000-04-08 16:29:53 +02:00
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#endif
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2003-06-10 20:55:17 +02:00
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extern int thumb_shiftable_const (unsigned HOST_WIDE_INT);
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2000-05-23 22:52:58 +02:00
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#ifdef RTX_CODE
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2003-06-10 20:55:17 +02:00
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extern void thumb_final_prescan_insn (rtx);
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extern const char *thumb_load_double_from_address (rtx *);
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extern const char *thumb_output_move_mem_multiple (int, rtx *);
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2004-07-07 21:25:01 +02:00
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extern void thumb_expand_movmemqi (rtx *);
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2003-06-10 20:55:17 +02:00
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extern int thumb_cmp_operand (rtx, enum machine_mode);
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2003-10-17 12:58:17 +02:00
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extern int thumb_cbrch_target_operand (rtx, enum machine_mode);
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2003-06-10 20:55:17 +02:00
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extern rtx *thumb_legitimize_pic_address (rtx, enum machine_mode, rtx);
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extern int thumb_go_if_legitimate_address (enum machine_mode, rtx);
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extern rtx arm_return_addr (int, rtx);
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extern void thumb_reload_out_hi (rtx *);
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extern void thumb_reload_in_hi (rtx *);
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arm-protos.h (arm_set_return_address, [...]): Add prototypes.
* config/arm/arm-protos.h (arm_set_return_address,
thumb_set_return_address): Add prototypes.
* config/arm/arm.h (ARM_FT_EXCEPTION_HANDLER): Remove.
* config/arm/arm.c (arm_compute_func_type,
use_return_insn, arm_compute_save_reg0_reg12_mask,
arm_compute_save_reg_mask, arm_output_function_prologue,
arm_output_epilogue): Replace ARM_FT_EXCEPTION_HANDLER with
current_function_calls_eh_return.
(thumb_exit, thumb_pushpop, thumb_unexpanded_epilogue): Replace
old eh code.
(arm_set_return_address, thumb_set_return_address): New functions.
* config/arm/arm.h (MUST_USE_SJLJ_EXCEPTIONS, DWARF2_UNWIND_INFO,
ARM_EH_STACKADJ_REGNUM, EH_RETURN_STACKADJ_RTX): Define.
* config/arm/arm.md (VUNSPEC_EH_RETURN): Add.
(epilogue): Use the stackadj register.
(eh_return, arm_eh_return, thumb_eh_return): New pattern.
From-SVN: r85757
2004-08-10 18:22:47 +02:00
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extern void thumb_set_return_address (rtx, rtx);
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2000-04-08 16:29:53 +02:00
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#endif
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/* Defined in pe.c. */
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2003-06-10 20:55:17 +02:00
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extern int arm_dllexport_name_p (const char *);
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extern int arm_dllimport_name_p (const char *);
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2000-04-08 16:29:53 +02:00
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#ifdef TREE_CODE
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2003-06-10 20:55:17 +02:00
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extern void arm_pe_unique_section (tree, int);
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extern void arm_pe_encode_section_info (tree, rtx, int);
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extern int arm_dllexport_p (tree);
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extern int arm_dllimport_p (tree);
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extern void arm_mark_dllexport (tree);
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extern void arm_mark_dllimport (tree);
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2000-04-08 16:29:53 +02:00
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#endif
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c-pragma.h: Define HANDLE_GENERIC_PRAGMAS if REGISTER_TARGET_PRAGMAS is defined.
* c-pragma.h: Define HANDLE_GENERIC_PRAGMAS if
REGISTER_TARGET_PRAGMAS is defined. Duplicate some
definitions from cpplib.h.
* cpplib.h: Don't typedef struct cpp_reader if c-pragma.h has
already done it.
* tm.texi: Document HANDLE_PRAGMA as no longer supported. Add
documentation for REGISTER_TARGET_PRAGMAS.
* c-lex.c: Include cpplib.h before c-pragma.h. Define a
default-pragma callback to implement -Wunknown-pragmas if
USE_CPPLIB.
* c-parse.in: Move all includes to top of file.
* c-pragma.c: Include cpplib.h before c-pragma.h. Include
tm_p.h.
(dispatch_pragma): Put the namespace in the -Wunknown-pragmas
warning.
(init_pragma): If REGISTER_TARGET_PRAGMAS is defined, call it.
* arm.h, arm-protos.h, arm.c,
c4x.h, c4x-protos.h, c4x.c,
h8300.h, h8300-protos.h, h8300.c,
i370.h, i370-protos.h, i370.c,
i960.h, i960-protos.h, i960.c,
sh.h, sh-protos.h, sh.c,
v850.h, v850-protos.h, v850.c: Convert HANDLE_PRAGMA-based
pragmata scheme to use REGISTER_TARGET_PRAGMAS instead.
* d30v.h: Don't mention HANDLE_PRAGMA in comment. Add
multiple include guard.
* i370.md (untyped_call): Use GEN_CALL.
(umodsi3): Remove unused variable.
* sh/elf.h: Don't undef HANDLE_SYSV_PRAGMA.
* v850.c (output_move_single, output_move_double): Constify
return value.
(print_operand): Constify a char *.
* v850.h (struct small_memory_info): Constify name member.
From-SVN: r36249
2000-09-08 00:24:34 +02:00
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2003-06-10 20:55:17 +02:00
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extern void arm_pr_long_calls (struct cpp_reader *);
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extern void arm_pr_no_long_calls (struct cpp_reader *);
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extern void arm_pr_long_calls_off (struct cpp_reader *);
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c-pragma.h: Define HANDLE_GENERIC_PRAGMAS if REGISTER_TARGET_PRAGMAS is defined.
* c-pragma.h: Define HANDLE_GENERIC_PRAGMAS if
REGISTER_TARGET_PRAGMAS is defined. Duplicate some
definitions from cpplib.h.
* cpplib.h: Don't typedef struct cpp_reader if c-pragma.h has
already done it.
* tm.texi: Document HANDLE_PRAGMA as no longer supported. Add
documentation for REGISTER_TARGET_PRAGMAS.
* c-lex.c: Include cpplib.h before c-pragma.h. Define a
default-pragma callback to implement -Wunknown-pragmas if
USE_CPPLIB.
* c-parse.in: Move all includes to top of file.
* c-pragma.c: Include cpplib.h before c-pragma.h. Include
tm_p.h.
(dispatch_pragma): Put the namespace in the -Wunknown-pragmas
warning.
(init_pragma): If REGISTER_TARGET_PRAGMAS is defined, call it.
* arm.h, arm-protos.h, arm.c,
c4x.h, c4x-protos.h, c4x.c,
h8300.h, h8300-protos.h, h8300.c,
i370.h, i370-protos.h, i370.c,
i960.h, i960-protos.h, i960.c,
sh.h, sh-protos.h, sh.c,
v850.h, v850-protos.h, v850.c: Convert HANDLE_PRAGMA-based
pragmata scheme to use REGISTER_TARGET_PRAGMAS instead.
* d30v.h: Don't mention HANDLE_PRAGMA in comment. Add
multiple include guard.
* i370.md (untyped_call): Use GEN_CALL.
(umodsi3): Remove unused variable.
* sh/elf.h: Don't undef HANDLE_SYSV_PRAGMA.
* v850.c (output_move_single, output_move_double): Constify
return value.
(print_operand): Constify a char *.
* v850.h (struct small_memory_info): Constify name member.
From-SVN: r36249
2000-09-08 00:24:34 +02:00
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2001-05-26 03:31:47 +02:00
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#endif /* ! GCC_ARM_PROTOS_H */
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