re PR rtl-optimization/13366 (ICE using MMX/SSE builtins with -O)
PR target/13366
* config/i386/i386.h (enum ix86_builtins): Move ...
* config/i386/i386.c: ... here.
(IX86_BUILTIN_MOVDDUP, IX86_BUILTIN_MMX_ZERO, IX86_BUILTIN_PEXTRW,
IX86_BUILTIN_PINSRW, IX86_BUILTIN_LOADAPS, IX86_BUILTIN_LOADSS,
IX86_BUILTIN_STORESS, IX86_BUILTIN_SSE_ZERO, IX86_BUILTIN_PEXTRW128,
IX86_BUILTIN_PINSRW128, IX86_BUILTIN_LOADAPD, IX86_BUILTIN_LOADSD,
IX86_BUILTIN_STOREAPD, IX86_BUILTIN_STORESD, IX86_BUILTIN_STOREHPD,
IX86_BUILTIN_STORELPD, IX86_BUILTIN_SETPD1, IX86_BUILTIN_SETPD,
IX86_BUILTIN_CLRPD, IX86_BUILTIN_LOADPD1, IX86_BUILTIN_LOADRPD,
IX86_BUILTIN_STOREPD1, IX86_BUILTIN_STORERPD, IX86_BUILTIN_LOADDQA,
IX86_BUILTIN_STOREDQA, IX86_BUILTIN_CLRTI,
IX86_BUILTIN_LOADDDUP): Remove.
(IX86_BUILTIN_VEC_INIT_V2SI, IX86_BUILTIN_VEC_INIT_V4HI,
IX86_BUILTIN_VEC_INIT_V8QI, IX86_BUILTIN_VEC_EXT_V2DF,
IX86_BUILTIN_VEC_EXT_V2DI, IX86_BUILTIN_VEC_EXT_V4SF,
IX86_BUILTIN_VEC_EXT_V8HI, IX86_BUILTIN_VEC_EXT_V4HI,
IX86_BUILTIN_VEC_SET_V8HI, IX86_BUILTIN_VEC_SET_V4HI): New.
(ix86_init_builtins): Make static.
(ix86_init_mmx_sse_builtins): Update for changed builtins.
(ix86_expand_binop_builtin): Only use ix86_fixup_binary_operands
if all the modes match. Otherwise, fake it.
(get_element_number, ix86_expand_vec_init_builtin,
ix86_expand_vec_ext_builtin, ix86_expand_vec_set_builtin): New.
(ix86_expand_builtin): Make static. Update for changed builtins.
(ix86_expand_vector_move_misalign): Use sse2_loadlpd with zero
operand instead of sse2_loadsd. Cast sse1 fallback to V4SFmode.
(ix86_expand_vector_init_duplicate): New.
(ix86_expand_vector_init_low_nonzero): New.
(ix86_expand_vector_init_one_var, ix86_expand_vector_init_general):
Split out from ix86_expand_vector_init; handle integer modes.
(ix86_expand_vector_init): Use them.
(ix86_expand_vector_set, ix86_expand_vector_extract): New.
* config/i386/i386-protos.h: Update.
* config/i386/predicates.md (reg_or_0_operand): New.
* config/i386/mmx.md (mov<MMXMODEI>_internal): Add 'r' variants.
(movv2sf_internal): Likewise. And a splitter to match them all.
(vec_dupv2sf, mmx_concatv2sf, vec_setv2sf, vec_extractv2sf,
vec_initv2sf, vec_dupv4hi, vec_dupv2si, mmx_concatv2si, vec_setv2si,
vec_extractv2si, vec_initv2si, vec_setv4hi, vec_extractv4hi,
vec_initv4hi, vec_setv8qi, vec_extractv8qi, vec_initv8qi): New.
(mmx_pinsrw): Fix operand ordering.
* config/i386/sse.md (movv4sf splitter): Use direct pattern,
rather than sse_loadss expander.
(movv2df splitter): Similarly.
(sse_loadss, sse_loadlss): Remove.
(vec_dupv4sf, sse_concatv2sf, sse_concatv4sf, vec_extractv4sf_0): New.
(vec_setv4sf, vec_setv2df): Use ix86_expand_vector_set.
(vec_extractv4sf, vec_extractv2df): Use ix86_expand_vector_extract.
(sse3_movddup): Rename with '*'.
(sse3_movddup splitter): Use gen_rtx_REG instead of gen_lowpart.
(sse2_loadsd): Remove.
(vec_dupv2df_sse3): Rename from sse3_loadddup.
(vec_dupv2df, vec_concatv2df_sse3, vec_concatv2df): New.
(sse2_pinsrw): Fix argument ordering.
(sse2_loadld, sse2_loadq): Add sse1 alternatives.
(sse2_stored): Remove 'r' destination.
(vec_dupv4si, vec_dupv2di, sse2_concatv2si, sse1_concatv2si,
vec_concatv4si_1, vec_concatv2di, vec_setv2di, vec_extractv2di,
vec_initv2di, vec_setv4si, vec_extractv4si, vec_initv4si,
vec_setv8hi, vec_extractv8hi, vec_initv8hi, vec_setv16qi,
vec_extractv16qi, vec_initv16qi): New.
* config/i386/emmintrin.h (__m128i, __m128d): Use typedef, not define.
(_mm_set_sd, _mm_set1_pd, _mm_setzero_pd, _mm_set_epi64x,
_mm_set_epi32, _mm_set_epi16, _mm_set_epi8, _mm_setzero_si128): Use
constructor form.
(_mm_load_pd, _mm_store_pd): Use plain dereference.
(_mm_load_si128, _mm_store_si128): Likewise.
(_mm_load1_pd): Use _mm_set1_pd.
(_mm_load_sd): Use _mm_set_sd.
(_mm_store_sd, _mm_storeh_pd): Use __builtin_ia32_vec_ext_v2df.
(_mm_store1_pd, _mm_storer_pd): Use _mm_store_pd.
(_mm_set_epi64): Use _mm_set_epi64x.
(_mm_set1_epi64x, _mm_set1_epi64, _mm_set1_epi32, _mm_set_epi16,
_mm_set1_epi8, _mm_setr_epi64, _mm_setr_epi32, _mm_setr_epi16,
_mm_setr_epi8): Use _mm_set_foo form.
(_mm_loadl_epi64, _mm_movpi64_epi64, _mm_move_epi64): Use _mm_set_epi64.
(_mm_storel_epi64, _mm_movepi64_pi64): Use __builtin_ia32_vec_ext_v2di.
(_mm_extract_epi16): Use __builtin_ia32_vec_ext_v8hi.
(_mm_insert_epi16): Use __builtin_ia32_vec_set_v8hi.
* config/i386/mmintrin.h (_mm_setzero_si64): Use plain cast.
(_mm_set_pi32): Use __builtin_ia32_vec_init_v2si.
(_mm_set_pi16): Use __builtin_ia32_vec_init_v4hi.
(_mm_set_pi8): Use __builtin_ia32_vec_init_v8qi.
(_mm_set1_pi16, _mm_set1_pi8): Use _mm_set_piN variant.
* config/i386/pmmintrin.h (_mm_loaddup_pd): Use _mm_load1_pd.
(_mm_movedup_pd): Use _mm_shuffle_pd.
* config/i386/xmmintrin.h (_mm_setzero_ps, _mm_set_ss,
_mm_set1_ps, _mm_set_ps, _mm_setr_ps): Use constructor form.
(_mm_cvtpi16_ps, _mm_cvtpu16_ps, _mm_cvtpi8_ps, _mm_cvtpu8_ps,
_mm_cvtps_pi8, _mm_cvtpi32x2_ps): Avoid __builtin_ia32_mmx_zero;
Use _mm_setzero_ps.
(_mm_load_ss, _mm_load1_ps): Use _mm_set* form.
(_mm_load_ps, _mm_loadr_ps): Use raw dereference.
(_mm_store_ss): Use __builtin_ia32_vec_ext_v4sf.
(_mm_store_ps): Use raw dereference.
(_mm_store1_ps): Use _mm_storeu_ps.
(_mm_storer_ps): Use _mm_store_ps.
(_mm_extract_pi16): Use __builtin_ia32_vec_ext_v4hi.
(_mm_insert_pi16): Use __builtin_ia32_vec_set_v4hi.
From-SVN: r93199
2005-01-11 22:33:14 +01:00
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/* Copyright (C) 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
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2002-01-12 08:38:50 +01:00
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i386-aout.h, [...]: GNU CC -> GCC.
* config/i386/i386-aout.h, config/i386/i386-coff.h,
config/i386/i386-interix.h, config/i386/i386-interix3.h,
config/i386/i386-modes.def, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.h, config/i386/i386.md,
config/i386/i386elf.h, config/i386/k6.md, config/i386/kaos-i386.h,
config/i386/linux-aout.h, config/i386/linux.h, config/i386/linux64.h,
config/i386/lynx-ng.h, config/i386/lynx.h, config/i386/mingw32.h,
config/i386/mmintrin.h, config/i386/moss.h: GNU CC -> GCC.
"GNU compiler" -> GCC.
From-SVN: r71811
2003-09-26 05:46:06 +02:00
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This file is part of GCC.
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2002-01-12 08:38:50 +01:00
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i386-aout.h, [...]: GNU CC -> GCC.
* config/i386/i386-aout.h, config/i386/i386-coff.h,
config/i386/i386-interix.h, config/i386/i386-interix3.h,
config/i386/i386-modes.def, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.h, config/i386/i386.md,
config/i386/i386elf.h, config/i386/k6.md, config/i386/kaos-i386.h,
config/i386/linux-aout.h, config/i386/linux.h, config/i386/linux64.h,
config/i386/lynx-ng.h, config/i386/lynx.h, config/i386/mingw32.h,
config/i386/mmintrin.h, config/i386/moss.h: GNU CC -> GCC.
"GNU compiler" -> GCC.
From-SVN: r71811
2003-09-26 05:46:06 +02:00
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GCC is free software; you can redistribute it and/or modify
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2002-01-12 08:38:50 +01:00
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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i386-aout.h, [...]: GNU CC -> GCC.
* config/i386/i386-aout.h, config/i386/i386-coff.h,
config/i386/i386-interix.h, config/i386/i386-interix3.h,
config/i386/i386-modes.def, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.h, config/i386/i386.md,
config/i386/i386elf.h, config/i386/k6.md, config/i386/kaos-i386.h,
config/i386/linux-aout.h, config/i386/linux.h, config/i386/linux64.h,
config/i386/lynx-ng.h, config/i386/lynx.h, config/i386/mingw32.h,
config/i386/mmintrin.h, config/i386/moss.h: GNU CC -> GCC.
"GNU compiler" -> GCC.
From-SVN: r71811
2003-09-26 05:46:06 +02:00
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GCC is distributed in the hope that it will be useful,
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2002-01-12 08:38:50 +01:00
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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i386-aout.h, [...]: GNU CC -> GCC.
* config/i386/i386-aout.h, config/i386/i386-coff.h,
config/i386/i386-interix.h, config/i386/i386-interix3.h,
config/i386/i386-modes.def, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.h, config/i386/i386.md,
config/i386/i386elf.h, config/i386/k6.md, config/i386/kaos-i386.h,
config/i386/linux-aout.h, config/i386/linux.h, config/i386/linux64.h,
config/i386/lynx-ng.h, config/i386/lynx.h, config/i386/mingw32.h,
config/i386/mmintrin.h, config/i386/moss.h: GNU CC -> GCC.
"GNU compiler" -> GCC.
From-SVN: r71811
2003-09-26 05:46:06 +02:00
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along with GCC; see the file COPYING. If not, write to
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2005-06-25 03:22:41 +02:00
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the Free Software Foundation, 51 Franklin Street, Fifth Floor,
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Boston, MA 02110-1301, USA. */
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2002-01-12 08:38:50 +01:00
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/* As a special exception, if you include this header file into source
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files compiled by GCC, this header file does not by itself cause
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the resulting executable to be covered by the GNU General Public
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License. This exception does not however invalidate any other
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reasons why the executable file might be covered by the GNU General
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Public License. */
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/* Implemented from the specification included in the Intel C++ Compiler
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2003-06-06 15:52:17 +02:00
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User Guide and Reference, version 8.0. */
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2002-01-12 08:38:50 +01:00
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#ifndef _MMINTRIN_H_INCLUDED
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#define _MMINTRIN_H_INCLUDED
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2002-10-17 19:09:17 +02:00
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#ifndef __MMX__
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# error "MMX instruction set not enabled"
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#else
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2002-01-12 08:38:50 +01:00
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/* The data type intended for user use. */
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2004-12-20 11:55:11 +01:00
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typedef int __m64 __attribute__ ((__vector_size__ (8)));
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2002-01-12 08:38:50 +01:00
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/* Internal data types for implementing the intrinsics. */
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2004-12-20 11:55:11 +01:00
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typedef int __v2si __attribute__ ((__vector_size__ (8)));
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typedef short __v4hi __attribute__ ((__vector_size__ (8)));
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typedef char __v8qi __attribute__ ((__vector_size__ (8)));
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2002-01-12 08:38:50 +01:00
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/* Empty the multimedia state. */
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2005-06-29 18:14:17 +02:00
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static __inline void __attribute__((__always_inline__))
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2002-01-12 08:38:50 +01:00
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_mm_empty (void)
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{
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__builtin_ia32_emms ();
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}
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2005-06-29 18:14:17 +02:00
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static __inline void __attribute__((__always_inline__))
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2003-06-06 16:06:41 +02:00
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_m_empty (void)
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{
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_mm_empty ();
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}
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2002-01-12 08:38:50 +01:00
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/* Convert I to a __m64 object. The integer is zero-extended to 64-bits. */
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2005-06-29 18:14:17 +02:00
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static __inline __m64 __attribute__((__always_inline__))
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2002-01-12 08:38:50 +01:00
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_mm_cvtsi32_si64 (int __i)
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{
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2005-01-20 19:34:12 +01:00
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return (__m64) __builtin_ia32_vec_init_v2si (__i, 0);
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2002-01-12 08:38:50 +01:00
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}
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2005-06-29 18:14:17 +02:00
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static __inline __m64 __attribute__((__always_inline__))
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2003-06-06 16:06:41 +02:00
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_m_from_int (int __i)
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{
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return _mm_cvtsi32_si64 (__i);
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}
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i386.c (def_builtin): Special case 64bit builtins.
* i386.c (def_builtin): Special case 64bit builtins.
(MASK_SSE164, MASK_SSE264): New constants.
(builtin_description): Add 64bit builtins.
(ix86_init_mmx_sse_builtins): Likewise.
* i386.h (enum ix86_builtins): Likewise.
* i386.md (cvtss2siq, cvttss2siq, cvtsd2siq, cvttsd2siq, cvtsi2sdq,
sse2_movq2dq_rex64, sse2_movsq2q_rex64): New.
(sse2_movq2dq, sse2_movsq2q): Disable for 64bit.
* mmintrin.h (_mm_cvtsi64x_si64, _mm_set_pi64x, _mm_cvtsi64_si64x): New.
* xmmintrin.h (_mm_cvtss_si64x, _mm_cvttss_si64x, _mm_cvtsi64x_ss,
_mm_set_epi64x, _mm_set1_epi64x, _mm_cvtsd_si64x, _mm_cvttsd_si64x,
_mm_cvtsi64x_sd, _mm_cvtsi64x_si128, _mm_cvtsi128_si64x): New.
From-SVN: r63267
2003-02-22 03:09:06 +01:00
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#ifdef __x86_64__
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/* Convert I to a __m64 object. */
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2005-06-29 18:14:17 +02:00
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static __inline __m64 __attribute__((__always_inline__))
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i386.c (def_builtin): Special case 64bit builtins.
* i386.c (def_builtin): Special case 64bit builtins.
(MASK_SSE164, MASK_SSE264): New constants.
(builtin_description): Add 64bit builtins.
(ix86_init_mmx_sse_builtins): Likewise.
* i386.h (enum ix86_builtins): Likewise.
* i386.md (cvtss2siq, cvttss2siq, cvtsd2siq, cvttsd2siq, cvtsi2sdq,
sse2_movq2dq_rex64, sse2_movsq2q_rex64): New.
(sse2_movq2dq, sse2_movsq2q): Disable for 64bit.
* mmintrin.h (_mm_cvtsi64x_si64, _mm_set_pi64x, _mm_cvtsi64_si64x): New.
* xmmintrin.h (_mm_cvtss_si64x, _mm_cvttss_si64x, _mm_cvtsi64x_ss,
_mm_set_epi64x, _mm_set1_epi64x, _mm_cvtsd_si64x, _mm_cvttsd_si64x,
_mm_cvtsi64x_sd, _mm_cvtsi64x_si128, _mm_cvtsi128_si64x): New.
From-SVN: r63267
2003-02-22 03:09:06 +01:00
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_mm_cvtsi64x_si64 (long long __i)
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{
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return (__m64) __i;
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}
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/* Convert I to a __m64 object. */
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2005-06-29 18:14:17 +02:00
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static __inline __m64 __attribute__((__always_inline__))
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i386.c (def_builtin): Special case 64bit builtins.
* i386.c (def_builtin): Special case 64bit builtins.
(MASK_SSE164, MASK_SSE264): New constants.
(builtin_description): Add 64bit builtins.
(ix86_init_mmx_sse_builtins): Likewise.
* i386.h (enum ix86_builtins): Likewise.
* i386.md (cvtss2siq, cvttss2siq, cvtsd2siq, cvttsd2siq, cvtsi2sdq,
sse2_movq2dq_rex64, sse2_movsq2q_rex64): New.
(sse2_movq2dq, sse2_movsq2q): Disable for 64bit.
* mmintrin.h (_mm_cvtsi64x_si64, _mm_set_pi64x, _mm_cvtsi64_si64x): New.
* xmmintrin.h (_mm_cvtss_si64x, _mm_cvttss_si64x, _mm_cvtsi64x_ss,
_mm_set_epi64x, _mm_set1_epi64x, _mm_cvtsd_si64x, _mm_cvttsd_si64x,
_mm_cvtsi64x_sd, _mm_cvtsi64x_si128, _mm_cvtsi128_si64x): New.
From-SVN: r63267
2003-02-22 03:09:06 +01:00
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_mm_set_pi64x (long long __i)
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{
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return (__m64) __i;
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}
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#endif
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2002-01-12 08:38:50 +01:00
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/* Convert the lower 32 bits of the __m64 object into an integer. */
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2005-06-29 18:14:17 +02:00
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static __inline int __attribute__((__always_inline__))
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2002-01-12 08:38:50 +01:00
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_mm_cvtsi64_si32 (__m64 __i)
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{
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2005-01-20 19:34:12 +01:00
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return __builtin_ia32_vec_ext_v2si ((__v2si)__i, 0);
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2002-01-12 08:38:50 +01:00
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}
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2005-06-29 18:14:17 +02:00
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static __inline int __attribute__((__always_inline__))
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2003-06-06 16:06:41 +02:00
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_m_to_int (__m64 __i)
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{
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return _mm_cvtsi64_si32 (__i);
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}
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i386.c (def_builtin): Special case 64bit builtins.
* i386.c (def_builtin): Special case 64bit builtins.
(MASK_SSE164, MASK_SSE264): New constants.
(builtin_description): Add 64bit builtins.
(ix86_init_mmx_sse_builtins): Likewise.
* i386.h (enum ix86_builtins): Likewise.
* i386.md (cvtss2siq, cvttss2siq, cvtsd2siq, cvttsd2siq, cvtsi2sdq,
sse2_movq2dq_rex64, sse2_movsq2q_rex64): New.
(sse2_movq2dq, sse2_movsq2q): Disable for 64bit.
* mmintrin.h (_mm_cvtsi64x_si64, _mm_set_pi64x, _mm_cvtsi64_si64x): New.
* xmmintrin.h (_mm_cvtss_si64x, _mm_cvttss_si64x, _mm_cvtsi64x_ss,
_mm_set_epi64x, _mm_set1_epi64x, _mm_cvtsd_si64x, _mm_cvttsd_si64x,
_mm_cvtsi64x_sd, _mm_cvtsi64x_si128, _mm_cvtsi128_si64x): New.
From-SVN: r63267
2003-02-22 03:09:06 +01:00
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#ifdef __x86_64__
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/* Convert the lower 32 bits of the __m64 object into an integer. */
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2005-06-29 18:14:17 +02:00
|
|
|
static __inline long long __attribute__((__always_inline__))
|
i386.c (def_builtin): Special case 64bit builtins.
* i386.c (def_builtin): Special case 64bit builtins.
(MASK_SSE164, MASK_SSE264): New constants.
(builtin_description): Add 64bit builtins.
(ix86_init_mmx_sse_builtins): Likewise.
* i386.h (enum ix86_builtins): Likewise.
* i386.md (cvtss2siq, cvttss2siq, cvtsd2siq, cvttsd2siq, cvtsi2sdq,
sse2_movq2dq_rex64, sse2_movsq2q_rex64): New.
(sse2_movq2dq, sse2_movsq2q): Disable for 64bit.
* mmintrin.h (_mm_cvtsi64x_si64, _mm_set_pi64x, _mm_cvtsi64_si64x): New.
* xmmintrin.h (_mm_cvtss_si64x, _mm_cvttss_si64x, _mm_cvtsi64x_ss,
_mm_set_epi64x, _mm_set1_epi64x, _mm_cvtsd_si64x, _mm_cvttsd_si64x,
_mm_cvtsi64x_sd, _mm_cvtsi64x_si128, _mm_cvtsi128_si64x): New.
From-SVN: r63267
2003-02-22 03:09:06 +01:00
|
|
|
_mm_cvtsi64_si64x (__m64 __i)
|
|
|
|
{
|
|
|
|
return (long long)__i;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Pack the four 16-bit values from M1 into the lower four 8-bit values of
|
|
|
|
the result, and the four 16-bit values from M2 into the upper four 8-bit
|
|
|
|
values of the result, all with signed saturation. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_packs_pi16 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_packsswb ((__v4hi)__m1, (__v4hi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_packsswb (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_packs_pi16 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Pack the two 32-bit values from M1 in to the lower two 16-bit values of
|
|
|
|
the result, and the two 32-bit values from M2 into the upper two 16-bit
|
|
|
|
values of the result, all with signed saturation. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_packs_pi32 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_packssdw ((__v2si)__m1, (__v2si)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_packssdw (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_packs_pi32 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Pack the four 16-bit values from M1 into the lower four 8-bit values of
|
|
|
|
the result, and the four 16-bit values from M2 into the upper four 8-bit
|
|
|
|
values of the result, all with unsigned saturation. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_packs_pu16 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_packuswb ((__v4hi)__m1, (__v4hi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_packuswb (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_packs_pu16 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Interleave the four 8-bit values from the high half of M1 with the four
|
|
|
|
8-bit values from the high half of M2. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_unpackhi_pi8 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_punpckhbw ((__v8qi)__m1, (__v8qi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_punpckhbw (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_unpackhi_pi8 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Interleave the two 16-bit values from the high half of M1 with the two
|
|
|
|
16-bit values from the high half of M2. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_unpackhi_pi16 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_punpckhwd ((__v4hi)__m1, (__v4hi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_punpckhwd (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_unpackhi_pi16 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Interleave the 32-bit value from the high half of M1 with the 32-bit
|
|
|
|
value from the high half of M2. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_unpackhi_pi32 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_punpckhdq ((__v2si)__m1, (__v2si)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_punpckhdq (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_unpackhi_pi32 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Interleave the four 8-bit values from the low half of M1 with the four
|
|
|
|
8-bit values from the low half of M2. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_unpacklo_pi8 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_punpcklbw ((__v8qi)__m1, (__v8qi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_punpcklbw (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_unpacklo_pi8 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Interleave the two 16-bit values from the low half of M1 with the two
|
|
|
|
16-bit values from the low half of M2. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_unpacklo_pi16 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_punpcklwd ((__v4hi)__m1, (__v4hi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_punpcklwd (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_unpacklo_pi16 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Interleave the 32-bit value from the low half of M1 with the 32-bit
|
|
|
|
value from the low half of M2. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_unpacklo_pi32 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_punpckldq ((__v2si)__m1, (__v2si)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_punpckldq (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_unpacklo_pi32 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Add the 8-bit values in M1 to the 8-bit values in M2. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_add_pi8 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_paddb ((__v8qi)__m1, (__v8qi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_paddb (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_add_pi8 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Add the 16-bit values in M1 to the 16-bit values in M2. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_add_pi16 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_paddw ((__v4hi)__m1, (__v4hi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_paddw (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_add_pi16 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Add the 32-bit values in M1 to the 32-bit values in M2. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_add_pi32 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_paddd ((__v2si)__m1, (__v2si)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_paddd (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_add_pi32 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2003-02-22 01:32:09 +01:00
|
|
|
/* Add the 64-bit values in M1 to the 64-bit values in M2. */
|
2005-12-23 01:31:44 +01:00
|
|
|
#ifdef __SSE2__
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-02-22 01:32:09 +01:00
|
|
|
_mm_add_si64 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_paddq ((long long)__m1, (long long)__m2);
|
|
|
|
}
|
2005-12-23 01:31:44 +01:00
|
|
|
#endif
|
2003-02-22 01:32:09 +01:00
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Add the 8-bit values in M1 to the 8-bit values in M2 using signed
|
|
|
|
saturated arithmetic. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_adds_pi8 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_paddsb ((__v8qi)__m1, (__v8qi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_paddsb (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_adds_pi8 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Add the 16-bit values in M1 to the 16-bit values in M2 using signed
|
|
|
|
saturated arithmetic. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_adds_pi16 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_paddsw ((__v4hi)__m1, (__v4hi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_paddsw (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_adds_pi16 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Add the 8-bit values in M1 to the 8-bit values in M2 using unsigned
|
|
|
|
saturated arithmetic. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_adds_pu8 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_paddusb ((__v8qi)__m1, (__v8qi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_paddusb (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_adds_pu8 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Add the 16-bit values in M1 to the 16-bit values in M2 using unsigned
|
|
|
|
saturated arithmetic. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_adds_pu16 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_paddusw ((__v4hi)__m1, (__v4hi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_paddusw (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_adds_pu16 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Subtract the 8-bit values in M2 from the 8-bit values in M1. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_sub_pi8 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_psubb ((__v8qi)__m1, (__v8qi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_psubb (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_sub_pi8 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Subtract the 16-bit values in M2 from the 16-bit values in M1. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_sub_pi16 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_psubw ((__v4hi)__m1, (__v4hi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_psubw (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_sub_pi16 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Subtract the 32-bit values in M2 from the 32-bit values in M1. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_sub_pi32 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_psubd ((__v2si)__m1, (__v2si)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_psubd (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_sub_pi32 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2003-02-22 01:32:09 +01:00
|
|
|
/* Add the 64-bit values in M1 to the 64-bit values in M2. */
|
2005-12-23 01:31:44 +01:00
|
|
|
#ifdef __SSE2__
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-02-22 01:32:09 +01:00
|
|
|
_mm_sub_si64 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_psubq ((long long)__m1, (long long)__m2);
|
|
|
|
}
|
2005-12-23 01:31:44 +01:00
|
|
|
#endif
|
2003-02-22 01:32:09 +01:00
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Subtract the 8-bit values in M2 from the 8-bit values in M1 using signed
|
|
|
|
saturating arithmetic. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_subs_pi8 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_psubsb ((__v8qi)__m1, (__v8qi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_psubsb (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_subs_pi8 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Subtract the 16-bit values in M2 from the 16-bit values in M1 using
|
|
|
|
signed saturating arithmetic. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_subs_pi16 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_psubsw ((__v4hi)__m1, (__v4hi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_psubsw (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_subs_pi16 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Subtract the 8-bit values in M2 from the 8-bit values in M1 using
|
|
|
|
unsigned saturating arithmetic. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_subs_pu8 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_psubusb ((__v8qi)__m1, (__v8qi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_psubusb (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_subs_pu8 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Subtract the 16-bit values in M2 from the 16-bit values in M1 using
|
|
|
|
unsigned saturating arithmetic. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_subs_pu16 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_psubusw ((__v4hi)__m1, (__v4hi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_psubusw (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_subs_pu16 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Multiply four 16-bit values in M1 by four 16-bit values in M2 producing
|
|
|
|
four 32-bit intermediate results, which are then summed by pairs to
|
|
|
|
produce two 32-bit results. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_madd_pi16 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_pmaddwd ((__v4hi)__m1, (__v4hi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_pmaddwd (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_madd_pi16 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Multiply four signed 16-bit values in M1 by four signed 16-bit values in
|
|
|
|
M2 and produce the high 16 bits of the 32-bit results. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_mulhi_pi16 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_pmulhw ((__v4hi)__m1, (__v4hi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_pmulhw (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_mulhi_pi16 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Multiply four 16-bit values in M1 by four 16-bit values in M2 and produce
|
|
|
|
the low 16 bits of the results. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_mullo_pi16 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_pmullw ((__v4hi)__m1, (__v4hi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_pmullw (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_mullo_pi16 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Shift four 16-bit values in M left by COUNT. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_sll_pi16 (__m64 __m, __m64 __count)
|
|
|
|
{
|
re PR target/7693 (Typo in i386 mmintrin.h header)
* mmintrin.h (__m64): typedef it to v2si.
(_mm_cvtsi32_si64, _mm_cvtsi32_si64_mm_sll_pi16,
_mm_sll_pi32, _mm_sll_pi64, _mm_slli_pi64, _mm_sra_pi16,
_mm_sra_pi32, _mm_srl_pi16, _mm_srl_pi32, _mm_srl_pi64,
_mm_srli_pi64, _mm_and_si64, _mm_andnot_si64,
_mm_or_si64, _mm_xor_si64): Add neccesary casts.
* xmmintrin.h (_mm_setzero_si64): Likewise.
* i386.h (ALIGN_MODE_128): Update comment; add missing modes
(SSE_REG_MODE_P, MMX_REG_MODE_P): New macros.
PR target/7693
Patch by Shawn Wagner
* mmintrin.h: Replace pi64 by si64.
From-SVN: r58306
2002-10-19 10:48:37 +02:00
|
|
|
return (__m64) __builtin_ia32_psllw ((__v4hi)__m, (long long)__count);
|
2002-01-12 08:38:50 +01:00
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_psllw (__m64 __m, __m64 __count)
|
|
|
|
{
|
|
|
|
return _mm_sll_pi16 (__m, __count);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_slli_pi16 (__m64 __m, int __count)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_psllw ((__v4hi)__m, __count);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_psllwi (__m64 __m, int __count)
|
|
|
|
{
|
|
|
|
return _mm_slli_pi16 (__m, __count);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Shift two 32-bit values in M left by COUNT. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_sll_pi32 (__m64 __m, __m64 __count)
|
|
|
|
{
|
re PR target/7693 (Typo in i386 mmintrin.h header)
* mmintrin.h (__m64): typedef it to v2si.
(_mm_cvtsi32_si64, _mm_cvtsi32_si64_mm_sll_pi16,
_mm_sll_pi32, _mm_sll_pi64, _mm_slli_pi64, _mm_sra_pi16,
_mm_sra_pi32, _mm_srl_pi16, _mm_srl_pi32, _mm_srl_pi64,
_mm_srli_pi64, _mm_and_si64, _mm_andnot_si64,
_mm_or_si64, _mm_xor_si64): Add neccesary casts.
* xmmintrin.h (_mm_setzero_si64): Likewise.
* i386.h (ALIGN_MODE_128): Update comment; add missing modes
(SSE_REG_MODE_P, MMX_REG_MODE_P): New macros.
PR target/7693
Patch by Shawn Wagner
* mmintrin.h: Replace pi64 by si64.
From-SVN: r58306
2002-10-19 10:48:37 +02:00
|
|
|
return (__m64) __builtin_ia32_pslld ((__v2si)__m, (long long)__count);
|
2002-01-12 08:38:50 +01:00
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_pslld (__m64 __m, __m64 __count)
|
|
|
|
{
|
|
|
|
return _mm_sll_pi32 (__m, __count);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_slli_pi32 (__m64 __m, int __count)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_pslld ((__v2si)__m, __count);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_pslldi (__m64 __m, int __count)
|
|
|
|
{
|
|
|
|
return _mm_slli_pi32 (__m, __count);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Shift the 64-bit value in M left by COUNT. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
re PR target/7693 (Typo in i386 mmintrin.h header)
* mmintrin.h (__m64): typedef it to v2si.
(_mm_cvtsi32_si64, _mm_cvtsi32_si64_mm_sll_pi16,
_mm_sll_pi32, _mm_sll_pi64, _mm_slli_pi64, _mm_sra_pi16,
_mm_sra_pi32, _mm_srl_pi16, _mm_srl_pi32, _mm_srl_pi64,
_mm_srli_pi64, _mm_and_si64, _mm_andnot_si64,
_mm_or_si64, _mm_xor_si64): Add neccesary casts.
* xmmintrin.h (_mm_setzero_si64): Likewise.
* i386.h (ALIGN_MODE_128): Update comment; add missing modes
(SSE_REG_MODE_P, MMX_REG_MODE_P): New macros.
PR target/7693
Patch by Shawn Wagner
* mmintrin.h: Replace pi64 by si64.
From-SVN: r58306
2002-10-19 10:48:37 +02:00
|
|
|
_mm_sll_si64 (__m64 __m, __m64 __count)
|
2002-01-12 08:38:50 +01:00
|
|
|
{
|
re PR target/7693 (Typo in i386 mmintrin.h header)
* mmintrin.h (__m64): typedef it to v2si.
(_mm_cvtsi32_si64, _mm_cvtsi32_si64_mm_sll_pi16,
_mm_sll_pi32, _mm_sll_pi64, _mm_slli_pi64, _mm_sra_pi16,
_mm_sra_pi32, _mm_srl_pi16, _mm_srl_pi32, _mm_srl_pi64,
_mm_srli_pi64, _mm_and_si64, _mm_andnot_si64,
_mm_or_si64, _mm_xor_si64): Add neccesary casts.
* xmmintrin.h (_mm_setzero_si64): Likewise.
* i386.h (ALIGN_MODE_128): Update comment; add missing modes
(SSE_REG_MODE_P, MMX_REG_MODE_P): New macros.
PR target/7693
Patch by Shawn Wagner
* mmintrin.h: Replace pi64 by si64.
From-SVN: r58306
2002-10-19 10:48:37 +02:00
|
|
|
return (__m64) __builtin_ia32_psllq ((long long)__m, (long long)__count);
|
2002-01-12 08:38:50 +01:00
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_psllq (__m64 __m, __m64 __count)
|
|
|
|
{
|
|
|
|
return _mm_sll_si64 (__m, __count);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
re PR target/7693 (Typo in i386 mmintrin.h header)
* mmintrin.h (__m64): typedef it to v2si.
(_mm_cvtsi32_si64, _mm_cvtsi32_si64_mm_sll_pi16,
_mm_sll_pi32, _mm_sll_pi64, _mm_slli_pi64, _mm_sra_pi16,
_mm_sra_pi32, _mm_srl_pi16, _mm_srl_pi32, _mm_srl_pi64,
_mm_srli_pi64, _mm_and_si64, _mm_andnot_si64,
_mm_or_si64, _mm_xor_si64): Add neccesary casts.
* xmmintrin.h (_mm_setzero_si64): Likewise.
* i386.h (ALIGN_MODE_128): Update comment; add missing modes
(SSE_REG_MODE_P, MMX_REG_MODE_P): New macros.
PR target/7693
Patch by Shawn Wagner
* mmintrin.h: Replace pi64 by si64.
From-SVN: r58306
2002-10-19 10:48:37 +02:00
|
|
|
_mm_slli_si64 (__m64 __m, int __count)
|
2002-01-12 08:38:50 +01:00
|
|
|
{
|
re PR target/7693 (Typo in i386 mmintrin.h header)
* mmintrin.h (__m64): typedef it to v2si.
(_mm_cvtsi32_si64, _mm_cvtsi32_si64_mm_sll_pi16,
_mm_sll_pi32, _mm_sll_pi64, _mm_slli_pi64, _mm_sra_pi16,
_mm_sra_pi32, _mm_srl_pi16, _mm_srl_pi32, _mm_srl_pi64,
_mm_srli_pi64, _mm_and_si64, _mm_andnot_si64,
_mm_or_si64, _mm_xor_si64): Add neccesary casts.
* xmmintrin.h (_mm_setzero_si64): Likewise.
* i386.h (ALIGN_MODE_128): Update comment; add missing modes
(SSE_REG_MODE_P, MMX_REG_MODE_P): New macros.
PR target/7693
Patch by Shawn Wagner
* mmintrin.h: Replace pi64 by si64.
From-SVN: r58306
2002-10-19 10:48:37 +02:00
|
|
|
return (__m64) __builtin_ia32_psllq ((long long)__m, (long long)__count);
|
2002-01-12 08:38:50 +01:00
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_psllqi (__m64 __m, int __count)
|
|
|
|
{
|
|
|
|
return _mm_slli_si64 (__m, __count);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Shift four 16-bit values in M right by COUNT; shift in the sign bit. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_sra_pi16 (__m64 __m, __m64 __count)
|
|
|
|
{
|
re PR target/7693 (Typo in i386 mmintrin.h header)
* mmintrin.h (__m64): typedef it to v2si.
(_mm_cvtsi32_si64, _mm_cvtsi32_si64_mm_sll_pi16,
_mm_sll_pi32, _mm_sll_pi64, _mm_slli_pi64, _mm_sra_pi16,
_mm_sra_pi32, _mm_srl_pi16, _mm_srl_pi32, _mm_srl_pi64,
_mm_srli_pi64, _mm_and_si64, _mm_andnot_si64,
_mm_or_si64, _mm_xor_si64): Add neccesary casts.
* xmmintrin.h (_mm_setzero_si64): Likewise.
* i386.h (ALIGN_MODE_128): Update comment; add missing modes
(SSE_REG_MODE_P, MMX_REG_MODE_P): New macros.
PR target/7693
Patch by Shawn Wagner
* mmintrin.h: Replace pi64 by si64.
From-SVN: r58306
2002-10-19 10:48:37 +02:00
|
|
|
return (__m64) __builtin_ia32_psraw ((__v4hi)__m, (long long)__count);
|
2002-01-12 08:38:50 +01:00
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_psraw (__m64 __m, __m64 __count)
|
|
|
|
{
|
|
|
|
return _mm_sra_pi16 (__m, __count);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_srai_pi16 (__m64 __m, int __count)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_psraw ((__v4hi)__m, __count);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_psrawi (__m64 __m, int __count)
|
|
|
|
{
|
|
|
|
return _mm_srai_pi16 (__m, __count);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Shift two 32-bit values in M right by COUNT; shift in the sign bit. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_sra_pi32 (__m64 __m, __m64 __count)
|
|
|
|
{
|
re PR target/7693 (Typo in i386 mmintrin.h header)
* mmintrin.h (__m64): typedef it to v2si.
(_mm_cvtsi32_si64, _mm_cvtsi32_si64_mm_sll_pi16,
_mm_sll_pi32, _mm_sll_pi64, _mm_slli_pi64, _mm_sra_pi16,
_mm_sra_pi32, _mm_srl_pi16, _mm_srl_pi32, _mm_srl_pi64,
_mm_srli_pi64, _mm_and_si64, _mm_andnot_si64,
_mm_or_si64, _mm_xor_si64): Add neccesary casts.
* xmmintrin.h (_mm_setzero_si64): Likewise.
* i386.h (ALIGN_MODE_128): Update comment; add missing modes
(SSE_REG_MODE_P, MMX_REG_MODE_P): New macros.
PR target/7693
Patch by Shawn Wagner
* mmintrin.h: Replace pi64 by si64.
From-SVN: r58306
2002-10-19 10:48:37 +02:00
|
|
|
return (__m64) __builtin_ia32_psrad ((__v2si)__m, (long long)__count);
|
2002-01-12 08:38:50 +01:00
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_psrad (__m64 __m, __m64 __count)
|
|
|
|
{
|
|
|
|
return _mm_sra_pi32 (__m, __count);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_srai_pi32 (__m64 __m, int __count)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_psrad ((__v2si)__m, __count);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_psradi (__m64 __m, int __count)
|
|
|
|
{
|
|
|
|
return _mm_srai_pi32 (__m, __count);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Shift four 16-bit values in M right by COUNT; shift in zeros. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_srl_pi16 (__m64 __m, __m64 __count)
|
|
|
|
{
|
re PR target/7693 (Typo in i386 mmintrin.h header)
* mmintrin.h (__m64): typedef it to v2si.
(_mm_cvtsi32_si64, _mm_cvtsi32_si64_mm_sll_pi16,
_mm_sll_pi32, _mm_sll_pi64, _mm_slli_pi64, _mm_sra_pi16,
_mm_sra_pi32, _mm_srl_pi16, _mm_srl_pi32, _mm_srl_pi64,
_mm_srli_pi64, _mm_and_si64, _mm_andnot_si64,
_mm_or_si64, _mm_xor_si64): Add neccesary casts.
* xmmintrin.h (_mm_setzero_si64): Likewise.
* i386.h (ALIGN_MODE_128): Update comment; add missing modes
(SSE_REG_MODE_P, MMX_REG_MODE_P): New macros.
PR target/7693
Patch by Shawn Wagner
* mmintrin.h: Replace pi64 by si64.
From-SVN: r58306
2002-10-19 10:48:37 +02:00
|
|
|
return (__m64) __builtin_ia32_psrlw ((__v4hi)__m, (long long)__count);
|
2002-01-12 08:38:50 +01:00
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_psrlw (__m64 __m, __m64 __count)
|
|
|
|
{
|
|
|
|
return _mm_srl_pi16 (__m, __count);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_srli_pi16 (__m64 __m, int __count)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_psrlw ((__v4hi)__m, __count);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_psrlwi (__m64 __m, int __count)
|
|
|
|
{
|
|
|
|
return _mm_srli_pi16 (__m, __count);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Shift two 32-bit values in M right by COUNT; shift in zeros. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_srl_pi32 (__m64 __m, __m64 __count)
|
|
|
|
{
|
re PR target/7693 (Typo in i386 mmintrin.h header)
* mmintrin.h (__m64): typedef it to v2si.
(_mm_cvtsi32_si64, _mm_cvtsi32_si64_mm_sll_pi16,
_mm_sll_pi32, _mm_sll_pi64, _mm_slli_pi64, _mm_sra_pi16,
_mm_sra_pi32, _mm_srl_pi16, _mm_srl_pi32, _mm_srl_pi64,
_mm_srli_pi64, _mm_and_si64, _mm_andnot_si64,
_mm_or_si64, _mm_xor_si64): Add neccesary casts.
* xmmintrin.h (_mm_setzero_si64): Likewise.
* i386.h (ALIGN_MODE_128): Update comment; add missing modes
(SSE_REG_MODE_P, MMX_REG_MODE_P): New macros.
PR target/7693
Patch by Shawn Wagner
* mmintrin.h: Replace pi64 by si64.
From-SVN: r58306
2002-10-19 10:48:37 +02:00
|
|
|
return (__m64) __builtin_ia32_psrld ((__v2si)__m, (long long)__count);
|
2002-01-12 08:38:50 +01:00
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_psrld (__m64 __m, __m64 __count)
|
|
|
|
{
|
|
|
|
return _mm_srl_pi32 (__m, __count);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_srli_pi32 (__m64 __m, int __count)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_psrld ((__v2si)__m, __count);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_psrldi (__m64 __m, int __count)
|
|
|
|
{
|
|
|
|
return _mm_srli_pi32 (__m, __count);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Shift the 64-bit value in M left by COUNT; shift in zeros. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
re PR target/7693 (Typo in i386 mmintrin.h header)
* mmintrin.h (__m64): typedef it to v2si.
(_mm_cvtsi32_si64, _mm_cvtsi32_si64_mm_sll_pi16,
_mm_sll_pi32, _mm_sll_pi64, _mm_slli_pi64, _mm_sra_pi16,
_mm_sra_pi32, _mm_srl_pi16, _mm_srl_pi32, _mm_srl_pi64,
_mm_srli_pi64, _mm_and_si64, _mm_andnot_si64,
_mm_or_si64, _mm_xor_si64): Add neccesary casts.
* xmmintrin.h (_mm_setzero_si64): Likewise.
* i386.h (ALIGN_MODE_128): Update comment; add missing modes
(SSE_REG_MODE_P, MMX_REG_MODE_P): New macros.
PR target/7693
Patch by Shawn Wagner
* mmintrin.h: Replace pi64 by si64.
From-SVN: r58306
2002-10-19 10:48:37 +02:00
|
|
|
_mm_srl_si64 (__m64 __m, __m64 __count)
|
2002-01-12 08:38:50 +01:00
|
|
|
{
|
re PR target/7693 (Typo in i386 mmintrin.h header)
* mmintrin.h (__m64): typedef it to v2si.
(_mm_cvtsi32_si64, _mm_cvtsi32_si64_mm_sll_pi16,
_mm_sll_pi32, _mm_sll_pi64, _mm_slli_pi64, _mm_sra_pi16,
_mm_sra_pi32, _mm_srl_pi16, _mm_srl_pi32, _mm_srl_pi64,
_mm_srli_pi64, _mm_and_si64, _mm_andnot_si64,
_mm_or_si64, _mm_xor_si64): Add neccesary casts.
* xmmintrin.h (_mm_setzero_si64): Likewise.
* i386.h (ALIGN_MODE_128): Update comment; add missing modes
(SSE_REG_MODE_P, MMX_REG_MODE_P): New macros.
PR target/7693
Patch by Shawn Wagner
* mmintrin.h: Replace pi64 by si64.
From-SVN: r58306
2002-10-19 10:48:37 +02:00
|
|
|
return (__m64) __builtin_ia32_psrlq ((long long)__m, (long long)__count);
|
2002-01-12 08:38:50 +01:00
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_psrlq (__m64 __m, __m64 __count)
|
|
|
|
{
|
|
|
|
return _mm_srl_si64 (__m, __count);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
re PR target/7693 (Typo in i386 mmintrin.h header)
* mmintrin.h (__m64): typedef it to v2si.
(_mm_cvtsi32_si64, _mm_cvtsi32_si64_mm_sll_pi16,
_mm_sll_pi32, _mm_sll_pi64, _mm_slli_pi64, _mm_sra_pi16,
_mm_sra_pi32, _mm_srl_pi16, _mm_srl_pi32, _mm_srl_pi64,
_mm_srli_pi64, _mm_and_si64, _mm_andnot_si64,
_mm_or_si64, _mm_xor_si64): Add neccesary casts.
* xmmintrin.h (_mm_setzero_si64): Likewise.
* i386.h (ALIGN_MODE_128): Update comment; add missing modes
(SSE_REG_MODE_P, MMX_REG_MODE_P): New macros.
PR target/7693
Patch by Shawn Wagner
* mmintrin.h: Replace pi64 by si64.
From-SVN: r58306
2002-10-19 10:48:37 +02:00
|
|
|
_mm_srli_si64 (__m64 __m, int __count)
|
2002-01-12 08:38:50 +01:00
|
|
|
{
|
re PR target/7693 (Typo in i386 mmintrin.h header)
* mmintrin.h (__m64): typedef it to v2si.
(_mm_cvtsi32_si64, _mm_cvtsi32_si64_mm_sll_pi16,
_mm_sll_pi32, _mm_sll_pi64, _mm_slli_pi64, _mm_sra_pi16,
_mm_sra_pi32, _mm_srl_pi16, _mm_srl_pi32, _mm_srl_pi64,
_mm_srli_pi64, _mm_and_si64, _mm_andnot_si64,
_mm_or_si64, _mm_xor_si64): Add neccesary casts.
* xmmintrin.h (_mm_setzero_si64): Likewise.
* i386.h (ALIGN_MODE_128): Update comment; add missing modes
(SSE_REG_MODE_P, MMX_REG_MODE_P): New macros.
PR target/7693
Patch by Shawn Wagner
* mmintrin.h: Replace pi64 by si64.
From-SVN: r58306
2002-10-19 10:48:37 +02:00
|
|
|
return (__m64) __builtin_ia32_psrlq ((long long)__m, (long long)__count);
|
2002-01-12 08:38:50 +01:00
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_psrlqi (__m64 __m, int __count)
|
|
|
|
{
|
|
|
|
return _mm_srli_si64 (__m, __count);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Bit-wise AND the 64-bit values in M1 and M2. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_and_si64 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
i386.c (bdesc_2arg): Update names for mmx_ prefixes.
* config/i386/i386.c (bdesc_2arg): Update names for mmx_ prefixes.
(ix86_expand_builtin): Likewise. Frob MASKMOVQ wrt the input mem
just like MASKMOVDQU. Return plain zero for MMX_ZERO.
* config/i386/i386.md (MMXMODEI, mov<MMXMODEI>,
mov<MMXMODEI>_internal_rex64, mov<MMXMODEI>_internal, movv2sf,
movv2sf_internal_rex64, movv2sf_internal, MMXMODE,
movmisalign<MMXMODE>, mmx_pmovmskb, mmx_maskmovq, mmx_maskmovq_rex,
sse_movntdi, addv8qi3, addv4hi3, addv2si3, mmx_adddi3, ssaddv8qi3,
ssaddv4hi3, usaddv8qi3, usaddv4hi3, subv8qi3, subv4hi3, subv2si3,
mmx_subdi3, sssubv8qi3, sssubv4hi3, ussubv8qi3, ussubv4hi3,
mulv4hi3, smulv4hi3_highpart, umulv4hi3_highpart, mmx_pmaddwd,
sse2_umulsidi3, mmx_iordi3, mmx_xordi3, mmx_anddi3, mmx_nanddi3,
mmx_uavgv8qi3, mmx_uavgv4hi3, mmx_psadbw, mmx_pinsrw, mmx_pinsrw,
mmx_pextrw, mmx_pshufw, eqv8qi3, eqv4hi3, eqv2si3, gtv8qi3, gtv4hi3,
gtv2si3, umaxv8qi3, smaxv4hi3, uminv8qi3, sminv4hi3, ashrv4hi3,
ashrv2si3, lshrv4hi3, lshrv2si3, mmx_lshrdi3, ashlv4hi3, ashlv2si3,
mmx_ashldi3, mmx_packsswb, mmx_packssdw, mmx_packuswb, mmx_punpckhbw,
mmx_punpckhwd, mmx_punpckhdq, mmx_punpcklbw, mmx_punpcklwd,
mmx_punpckldq, emms, addv2sf3, subv2sf3, subrv2sf3, gtv2sf3, gev2sf3,
eqv2sf3, pfmaxv2sf3, pfminv2sf3, mulv2sf3, femms, pf2id, pf2iw,
pfacc, pfnacc, pfpnacc, pi2fw, floatv2si2, pfrcpv2sf2, pfrcpit1v2sf3,
pfrcpit2v2sf3, pfrsqrtv2sf2, pfrsqit1v2sf3, pmulhrwv4hi3, pswapdv2si2,
pswapdv2sf2): Move to mmx.md; rename as necessary with leading
mmx_ prefix.
(mmx_clrdi, pavgusb): Remove.
(ldmxcsr, stmxcsr, sfence, sfence_insn): Move to sse.md; rename
with leading sse_ prefix.
* config/i386/sse.md: Receive them.
* config/i386/mmx.md: New file.
(MMXMODE12, MMXMODE24, mmxvecsize): New.
(subrv2sf3): Turn into expander for normal subtraction.
(mmx_addv2sf3, mmx_mulv2sf3, mmx_smaxv2sf3, mmx_sminv2sf3,
mmx_eqv2sf3, mmx_mulv4hi3, mmx_smulv4hi3_highpart,
mmx_umulv4hi3_highpart, mmx_pmaddwd, mmx_pmulhrwv4hi3, sse2_umulsidi3,
mmx_umaxv8qi3, mmx_smaxv4hi3, mmx_uminv8qi3, mmx_sminv4hi3): Mark
commutative; use ix86_binary_operator_ok.
(mmx_add<MMXMODEI>3, mmx_ssadd<MMXMODE12>3, mmx_usadd<MMXMODE12>3,
mmx_sub<MMXMODEI>3, mmx_sssub<MMXMODE12>3, mmx_ussub<MMXMODE12>3
mmx_ashr<MMXMODE24>3, mmx_lshr<MMXMODE23>3, mmx_ashl<MMXMODE24>3
mmx_eq<MMXMODEI>3, mmx_gt<MMXMODEI>3, mmx_and<MMXMODEI>3,
mmx_nand<MMXMODEI>3, mmx_ior<MMXMODEI>3, mmx_xor<MMXMODEI>3):
Macroize from existing patterns; use ix86_binary_operator_ok.
(mmx_packsswb, mmx_packssdw, mmx_packuswb): Add memory alternative.
(mmx_punpckhbw, mmx_punpcklbw, mmx_punpckhwd, mmx_punpcklwd,
mmx_punpckhdq, mmx_punpckhdq, mmx_punpckldq): Likewise. Model
with vec_select+vec_concat.
(mmx_pshufw, mmx_pshufw_1): Likewise.
(mmx_uavgv8qi3): Merge pavgusb. Model correcty.
(mmx_uavgv4hi3): Model correctly.
* config/i386/mmintrin.h (_mm_and_si64, _mm_andnot_si64, _mm_or_si64,
_mm_xor_si64): Remove casts.
From-SVN: r93107
2005-01-09 12:23:25 +01:00
|
|
|
return __builtin_ia32_pand (__m1, __m2);
|
2002-01-12 08:38:50 +01:00
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_pand (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_and_si64 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Bit-wise complement the 64-bit value in M1 and bit-wise AND it with the
|
|
|
|
64-bit value in M2. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_andnot_si64 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
i386.c (bdesc_2arg): Update names for mmx_ prefixes.
* config/i386/i386.c (bdesc_2arg): Update names for mmx_ prefixes.
(ix86_expand_builtin): Likewise. Frob MASKMOVQ wrt the input mem
just like MASKMOVDQU. Return plain zero for MMX_ZERO.
* config/i386/i386.md (MMXMODEI, mov<MMXMODEI>,
mov<MMXMODEI>_internal_rex64, mov<MMXMODEI>_internal, movv2sf,
movv2sf_internal_rex64, movv2sf_internal, MMXMODE,
movmisalign<MMXMODE>, mmx_pmovmskb, mmx_maskmovq, mmx_maskmovq_rex,
sse_movntdi, addv8qi3, addv4hi3, addv2si3, mmx_adddi3, ssaddv8qi3,
ssaddv4hi3, usaddv8qi3, usaddv4hi3, subv8qi3, subv4hi3, subv2si3,
mmx_subdi3, sssubv8qi3, sssubv4hi3, ussubv8qi3, ussubv4hi3,
mulv4hi3, smulv4hi3_highpart, umulv4hi3_highpart, mmx_pmaddwd,
sse2_umulsidi3, mmx_iordi3, mmx_xordi3, mmx_anddi3, mmx_nanddi3,
mmx_uavgv8qi3, mmx_uavgv4hi3, mmx_psadbw, mmx_pinsrw, mmx_pinsrw,
mmx_pextrw, mmx_pshufw, eqv8qi3, eqv4hi3, eqv2si3, gtv8qi3, gtv4hi3,
gtv2si3, umaxv8qi3, smaxv4hi3, uminv8qi3, sminv4hi3, ashrv4hi3,
ashrv2si3, lshrv4hi3, lshrv2si3, mmx_lshrdi3, ashlv4hi3, ashlv2si3,
mmx_ashldi3, mmx_packsswb, mmx_packssdw, mmx_packuswb, mmx_punpckhbw,
mmx_punpckhwd, mmx_punpckhdq, mmx_punpcklbw, mmx_punpcklwd,
mmx_punpckldq, emms, addv2sf3, subv2sf3, subrv2sf3, gtv2sf3, gev2sf3,
eqv2sf3, pfmaxv2sf3, pfminv2sf3, mulv2sf3, femms, pf2id, pf2iw,
pfacc, pfnacc, pfpnacc, pi2fw, floatv2si2, pfrcpv2sf2, pfrcpit1v2sf3,
pfrcpit2v2sf3, pfrsqrtv2sf2, pfrsqit1v2sf3, pmulhrwv4hi3, pswapdv2si2,
pswapdv2sf2): Move to mmx.md; rename as necessary with leading
mmx_ prefix.
(mmx_clrdi, pavgusb): Remove.
(ldmxcsr, stmxcsr, sfence, sfence_insn): Move to sse.md; rename
with leading sse_ prefix.
* config/i386/sse.md: Receive them.
* config/i386/mmx.md: New file.
(MMXMODE12, MMXMODE24, mmxvecsize): New.
(subrv2sf3): Turn into expander for normal subtraction.
(mmx_addv2sf3, mmx_mulv2sf3, mmx_smaxv2sf3, mmx_sminv2sf3,
mmx_eqv2sf3, mmx_mulv4hi3, mmx_smulv4hi3_highpart,
mmx_umulv4hi3_highpart, mmx_pmaddwd, mmx_pmulhrwv4hi3, sse2_umulsidi3,
mmx_umaxv8qi3, mmx_smaxv4hi3, mmx_uminv8qi3, mmx_sminv4hi3): Mark
commutative; use ix86_binary_operator_ok.
(mmx_add<MMXMODEI>3, mmx_ssadd<MMXMODE12>3, mmx_usadd<MMXMODE12>3,
mmx_sub<MMXMODEI>3, mmx_sssub<MMXMODE12>3, mmx_ussub<MMXMODE12>3
mmx_ashr<MMXMODE24>3, mmx_lshr<MMXMODE23>3, mmx_ashl<MMXMODE24>3
mmx_eq<MMXMODEI>3, mmx_gt<MMXMODEI>3, mmx_and<MMXMODEI>3,
mmx_nand<MMXMODEI>3, mmx_ior<MMXMODEI>3, mmx_xor<MMXMODEI>3):
Macroize from existing patterns; use ix86_binary_operator_ok.
(mmx_packsswb, mmx_packssdw, mmx_packuswb): Add memory alternative.
(mmx_punpckhbw, mmx_punpcklbw, mmx_punpckhwd, mmx_punpcklwd,
mmx_punpckhdq, mmx_punpckhdq, mmx_punpckldq): Likewise. Model
with vec_select+vec_concat.
(mmx_pshufw, mmx_pshufw_1): Likewise.
(mmx_uavgv8qi3): Merge pavgusb. Model correcty.
(mmx_uavgv4hi3): Model correctly.
* config/i386/mmintrin.h (_mm_and_si64, _mm_andnot_si64, _mm_or_si64,
_mm_xor_si64): Remove casts.
From-SVN: r93107
2005-01-09 12:23:25 +01:00
|
|
|
return __builtin_ia32_pandn (__m1, __m2);
|
2002-01-12 08:38:50 +01:00
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_pandn (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_andnot_si64 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Bit-wise inclusive OR the 64-bit values in M1 and M2. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_or_si64 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
i386.c (bdesc_2arg): Update names for mmx_ prefixes.
* config/i386/i386.c (bdesc_2arg): Update names for mmx_ prefixes.
(ix86_expand_builtin): Likewise. Frob MASKMOVQ wrt the input mem
just like MASKMOVDQU. Return plain zero for MMX_ZERO.
* config/i386/i386.md (MMXMODEI, mov<MMXMODEI>,
mov<MMXMODEI>_internal_rex64, mov<MMXMODEI>_internal, movv2sf,
movv2sf_internal_rex64, movv2sf_internal, MMXMODE,
movmisalign<MMXMODE>, mmx_pmovmskb, mmx_maskmovq, mmx_maskmovq_rex,
sse_movntdi, addv8qi3, addv4hi3, addv2si3, mmx_adddi3, ssaddv8qi3,
ssaddv4hi3, usaddv8qi3, usaddv4hi3, subv8qi3, subv4hi3, subv2si3,
mmx_subdi3, sssubv8qi3, sssubv4hi3, ussubv8qi3, ussubv4hi3,
mulv4hi3, smulv4hi3_highpart, umulv4hi3_highpart, mmx_pmaddwd,
sse2_umulsidi3, mmx_iordi3, mmx_xordi3, mmx_anddi3, mmx_nanddi3,
mmx_uavgv8qi3, mmx_uavgv4hi3, mmx_psadbw, mmx_pinsrw, mmx_pinsrw,
mmx_pextrw, mmx_pshufw, eqv8qi3, eqv4hi3, eqv2si3, gtv8qi3, gtv4hi3,
gtv2si3, umaxv8qi3, smaxv4hi3, uminv8qi3, sminv4hi3, ashrv4hi3,
ashrv2si3, lshrv4hi3, lshrv2si3, mmx_lshrdi3, ashlv4hi3, ashlv2si3,
mmx_ashldi3, mmx_packsswb, mmx_packssdw, mmx_packuswb, mmx_punpckhbw,
mmx_punpckhwd, mmx_punpckhdq, mmx_punpcklbw, mmx_punpcklwd,
mmx_punpckldq, emms, addv2sf3, subv2sf3, subrv2sf3, gtv2sf3, gev2sf3,
eqv2sf3, pfmaxv2sf3, pfminv2sf3, mulv2sf3, femms, pf2id, pf2iw,
pfacc, pfnacc, pfpnacc, pi2fw, floatv2si2, pfrcpv2sf2, pfrcpit1v2sf3,
pfrcpit2v2sf3, pfrsqrtv2sf2, pfrsqit1v2sf3, pmulhrwv4hi3, pswapdv2si2,
pswapdv2sf2): Move to mmx.md; rename as necessary with leading
mmx_ prefix.
(mmx_clrdi, pavgusb): Remove.
(ldmxcsr, stmxcsr, sfence, sfence_insn): Move to sse.md; rename
with leading sse_ prefix.
* config/i386/sse.md: Receive them.
* config/i386/mmx.md: New file.
(MMXMODE12, MMXMODE24, mmxvecsize): New.
(subrv2sf3): Turn into expander for normal subtraction.
(mmx_addv2sf3, mmx_mulv2sf3, mmx_smaxv2sf3, mmx_sminv2sf3,
mmx_eqv2sf3, mmx_mulv4hi3, mmx_smulv4hi3_highpart,
mmx_umulv4hi3_highpart, mmx_pmaddwd, mmx_pmulhrwv4hi3, sse2_umulsidi3,
mmx_umaxv8qi3, mmx_smaxv4hi3, mmx_uminv8qi3, mmx_sminv4hi3): Mark
commutative; use ix86_binary_operator_ok.
(mmx_add<MMXMODEI>3, mmx_ssadd<MMXMODE12>3, mmx_usadd<MMXMODE12>3,
mmx_sub<MMXMODEI>3, mmx_sssub<MMXMODE12>3, mmx_ussub<MMXMODE12>3
mmx_ashr<MMXMODE24>3, mmx_lshr<MMXMODE23>3, mmx_ashl<MMXMODE24>3
mmx_eq<MMXMODEI>3, mmx_gt<MMXMODEI>3, mmx_and<MMXMODEI>3,
mmx_nand<MMXMODEI>3, mmx_ior<MMXMODEI>3, mmx_xor<MMXMODEI>3):
Macroize from existing patterns; use ix86_binary_operator_ok.
(mmx_packsswb, mmx_packssdw, mmx_packuswb): Add memory alternative.
(mmx_punpckhbw, mmx_punpcklbw, mmx_punpckhwd, mmx_punpcklwd,
mmx_punpckhdq, mmx_punpckhdq, mmx_punpckldq): Likewise. Model
with vec_select+vec_concat.
(mmx_pshufw, mmx_pshufw_1): Likewise.
(mmx_uavgv8qi3): Merge pavgusb. Model correcty.
(mmx_uavgv4hi3): Model correctly.
* config/i386/mmintrin.h (_mm_and_si64, _mm_andnot_si64, _mm_or_si64,
_mm_xor_si64): Remove casts.
From-SVN: r93107
2005-01-09 12:23:25 +01:00
|
|
|
return __builtin_ia32_por (__m1, __m2);
|
2002-01-12 08:38:50 +01:00
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_por (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_or_si64 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Bit-wise exclusive OR the 64-bit values in M1 and M2. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_xor_si64 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
i386.c (bdesc_2arg): Update names for mmx_ prefixes.
* config/i386/i386.c (bdesc_2arg): Update names for mmx_ prefixes.
(ix86_expand_builtin): Likewise. Frob MASKMOVQ wrt the input mem
just like MASKMOVDQU. Return plain zero for MMX_ZERO.
* config/i386/i386.md (MMXMODEI, mov<MMXMODEI>,
mov<MMXMODEI>_internal_rex64, mov<MMXMODEI>_internal, movv2sf,
movv2sf_internal_rex64, movv2sf_internal, MMXMODE,
movmisalign<MMXMODE>, mmx_pmovmskb, mmx_maskmovq, mmx_maskmovq_rex,
sse_movntdi, addv8qi3, addv4hi3, addv2si3, mmx_adddi3, ssaddv8qi3,
ssaddv4hi3, usaddv8qi3, usaddv4hi3, subv8qi3, subv4hi3, subv2si3,
mmx_subdi3, sssubv8qi3, sssubv4hi3, ussubv8qi3, ussubv4hi3,
mulv4hi3, smulv4hi3_highpart, umulv4hi3_highpart, mmx_pmaddwd,
sse2_umulsidi3, mmx_iordi3, mmx_xordi3, mmx_anddi3, mmx_nanddi3,
mmx_uavgv8qi3, mmx_uavgv4hi3, mmx_psadbw, mmx_pinsrw, mmx_pinsrw,
mmx_pextrw, mmx_pshufw, eqv8qi3, eqv4hi3, eqv2si3, gtv8qi3, gtv4hi3,
gtv2si3, umaxv8qi3, smaxv4hi3, uminv8qi3, sminv4hi3, ashrv4hi3,
ashrv2si3, lshrv4hi3, lshrv2si3, mmx_lshrdi3, ashlv4hi3, ashlv2si3,
mmx_ashldi3, mmx_packsswb, mmx_packssdw, mmx_packuswb, mmx_punpckhbw,
mmx_punpckhwd, mmx_punpckhdq, mmx_punpcklbw, mmx_punpcklwd,
mmx_punpckldq, emms, addv2sf3, subv2sf3, subrv2sf3, gtv2sf3, gev2sf3,
eqv2sf3, pfmaxv2sf3, pfminv2sf3, mulv2sf3, femms, pf2id, pf2iw,
pfacc, pfnacc, pfpnacc, pi2fw, floatv2si2, pfrcpv2sf2, pfrcpit1v2sf3,
pfrcpit2v2sf3, pfrsqrtv2sf2, pfrsqit1v2sf3, pmulhrwv4hi3, pswapdv2si2,
pswapdv2sf2): Move to mmx.md; rename as necessary with leading
mmx_ prefix.
(mmx_clrdi, pavgusb): Remove.
(ldmxcsr, stmxcsr, sfence, sfence_insn): Move to sse.md; rename
with leading sse_ prefix.
* config/i386/sse.md: Receive them.
* config/i386/mmx.md: New file.
(MMXMODE12, MMXMODE24, mmxvecsize): New.
(subrv2sf3): Turn into expander for normal subtraction.
(mmx_addv2sf3, mmx_mulv2sf3, mmx_smaxv2sf3, mmx_sminv2sf3,
mmx_eqv2sf3, mmx_mulv4hi3, mmx_smulv4hi3_highpart,
mmx_umulv4hi3_highpart, mmx_pmaddwd, mmx_pmulhrwv4hi3, sse2_umulsidi3,
mmx_umaxv8qi3, mmx_smaxv4hi3, mmx_uminv8qi3, mmx_sminv4hi3): Mark
commutative; use ix86_binary_operator_ok.
(mmx_add<MMXMODEI>3, mmx_ssadd<MMXMODE12>3, mmx_usadd<MMXMODE12>3,
mmx_sub<MMXMODEI>3, mmx_sssub<MMXMODE12>3, mmx_ussub<MMXMODE12>3
mmx_ashr<MMXMODE24>3, mmx_lshr<MMXMODE23>3, mmx_ashl<MMXMODE24>3
mmx_eq<MMXMODEI>3, mmx_gt<MMXMODEI>3, mmx_and<MMXMODEI>3,
mmx_nand<MMXMODEI>3, mmx_ior<MMXMODEI>3, mmx_xor<MMXMODEI>3):
Macroize from existing patterns; use ix86_binary_operator_ok.
(mmx_packsswb, mmx_packssdw, mmx_packuswb): Add memory alternative.
(mmx_punpckhbw, mmx_punpcklbw, mmx_punpckhwd, mmx_punpcklwd,
mmx_punpckhdq, mmx_punpckhdq, mmx_punpckldq): Likewise. Model
with vec_select+vec_concat.
(mmx_pshufw, mmx_pshufw_1): Likewise.
(mmx_uavgv8qi3): Merge pavgusb. Model correcty.
(mmx_uavgv4hi3): Model correctly.
* config/i386/mmintrin.h (_mm_and_si64, _mm_andnot_si64, _mm_or_si64,
_mm_xor_si64): Remove casts.
From-SVN: r93107
2005-01-09 12:23:25 +01:00
|
|
|
return __builtin_ia32_pxor (__m1, __m2);
|
2002-01-12 08:38:50 +01:00
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_pxor (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_xor_si64 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Compare eight 8-bit values. The result of the comparison is 0xFF if the
|
|
|
|
test is true and zero if false. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_cmpeq_pi8 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_pcmpeqb ((__v8qi)__m1, (__v8qi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_pcmpeqb (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_cmpeq_pi8 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_cmpgt_pi8 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_pcmpgtb ((__v8qi)__m1, (__v8qi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_pcmpgtb (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_cmpgt_pi8 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Compare four 16-bit values. The result of the comparison is 0xFFFF if
|
|
|
|
the test is true and zero if false. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_cmpeq_pi16 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_pcmpeqw ((__v4hi)__m1, (__v4hi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_pcmpeqw (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_cmpeq_pi16 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_cmpgt_pi16 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_pcmpgtw ((__v4hi)__m1, (__v4hi)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_pcmpgtw (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_cmpgt_pi16 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Compare two 32-bit values. The result of the comparison is 0xFFFFFFFF if
|
|
|
|
the test is true and zero if false. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_cmpeq_pi32 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_pcmpeqd ((__v2si)__m1, (__v2si)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_pcmpeqd (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_cmpeq_pi32 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_cmpgt_pi32 (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return (__m64) __builtin_ia32_pcmpgtd ((__v2si)__m1, (__v2si)__m2);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2003-06-06 16:06:41 +02:00
|
|
|
_m_pcmpgtd (__m64 __m1, __m64 __m2)
|
|
|
|
{
|
|
|
|
return _mm_cmpgt_pi32 (__m1, __m2);
|
|
|
|
}
|
|
|
|
|
2002-01-12 08:38:50 +01:00
|
|
|
/* Creates a 64-bit zero. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_setzero_si64 (void)
|
|
|
|
{
|
re PR rtl-optimization/13366 (ICE using MMX/SSE builtins with -O)
PR target/13366
* config/i386/i386.h (enum ix86_builtins): Move ...
* config/i386/i386.c: ... here.
(IX86_BUILTIN_MOVDDUP, IX86_BUILTIN_MMX_ZERO, IX86_BUILTIN_PEXTRW,
IX86_BUILTIN_PINSRW, IX86_BUILTIN_LOADAPS, IX86_BUILTIN_LOADSS,
IX86_BUILTIN_STORESS, IX86_BUILTIN_SSE_ZERO, IX86_BUILTIN_PEXTRW128,
IX86_BUILTIN_PINSRW128, IX86_BUILTIN_LOADAPD, IX86_BUILTIN_LOADSD,
IX86_BUILTIN_STOREAPD, IX86_BUILTIN_STORESD, IX86_BUILTIN_STOREHPD,
IX86_BUILTIN_STORELPD, IX86_BUILTIN_SETPD1, IX86_BUILTIN_SETPD,
IX86_BUILTIN_CLRPD, IX86_BUILTIN_LOADPD1, IX86_BUILTIN_LOADRPD,
IX86_BUILTIN_STOREPD1, IX86_BUILTIN_STORERPD, IX86_BUILTIN_LOADDQA,
IX86_BUILTIN_STOREDQA, IX86_BUILTIN_CLRTI,
IX86_BUILTIN_LOADDDUP): Remove.
(IX86_BUILTIN_VEC_INIT_V2SI, IX86_BUILTIN_VEC_INIT_V4HI,
IX86_BUILTIN_VEC_INIT_V8QI, IX86_BUILTIN_VEC_EXT_V2DF,
IX86_BUILTIN_VEC_EXT_V2DI, IX86_BUILTIN_VEC_EXT_V4SF,
IX86_BUILTIN_VEC_EXT_V8HI, IX86_BUILTIN_VEC_EXT_V4HI,
IX86_BUILTIN_VEC_SET_V8HI, IX86_BUILTIN_VEC_SET_V4HI): New.
(ix86_init_builtins): Make static.
(ix86_init_mmx_sse_builtins): Update for changed builtins.
(ix86_expand_binop_builtin): Only use ix86_fixup_binary_operands
if all the modes match. Otherwise, fake it.
(get_element_number, ix86_expand_vec_init_builtin,
ix86_expand_vec_ext_builtin, ix86_expand_vec_set_builtin): New.
(ix86_expand_builtin): Make static. Update for changed builtins.
(ix86_expand_vector_move_misalign): Use sse2_loadlpd with zero
operand instead of sse2_loadsd. Cast sse1 fallback to V4SFmode.
(ix86_expand_vector_init_duplicate): New.
(ix86_expand_vector_init_low_nonzero): New.
(ix86_expand_vector_init_one_var, ix86_expand_vector_init_general):
Split out from ix86_expand_vector_init; handle integer modes.
(ix86_expand_vector_init): Use them.
(ix86_expand_vector_set, ix86_expand_vector_extract): New.
* config/i386/i386-protos.h: Update.
* config/i386/predicates.md (reg_or_0_operand): New.
* config/i386/mmx.md (mov<MMXMODEI>_internal): Add 'r' variants.
(movv2sf_internal): Likewise. And a splitter to match them all.
(vec_dupv2sf, mmx_concatv2sf, vec_setv2sf, vec_extractv2sf,
vec_initv2sf, vec_dupv4hi, vec_dupv2si, mmx_concatv2si, vec_setv2si,
vec_extractv2si, vec_initv2si, vec_setv4hi, vec_extractv4hi,
vec_initv4hi, vec_setv8qi, vec_extractv8qi, vec_initv8qi): New.
(mmx_pinsrw): Fix operand ordering.
* config/i386/sse.md (movv4sf splitter): Use direct pattern,
rather than sse_loadss expander.
(movv2df splitter): Similarly.
(sse_loadss, sse_loadlss): Remove.
(vec_dupv4sf, sse_concatv2sf, sse_concatv4sf, vec_extractv4sf_0): New.
(vec_setv4sf, vec_setv2df): Use ix86_expand_vector_set.
(vec_extractv4sf, vec_extractv2df): Use ix86_expand_vector_extract.
(sse3_movddup): Rename with '*'.
(sse3_movddup splitter): Use gen_rtx_REG instead of gen_lowpart.
(sse2_loadsd): Remove.
(vec_dupv2df_sse3): Rename from sse3_loadddup.
(vec_dupv2df, vec_concatv2df_sse3, vec_concatv2df): New.
(sse2_pinsrw): Fix argument ordering.
(sse2_loadld, sse2_loadq): Add sse1 alternatives.
(sse2_stored): Remove 'r' destination.
(vec_dupv4si, vec_dupv2di, sse2_concatv2si, sse1_concatv2si,
vec_concatv4si_1, vec_concatv2di, vec_setv2di, vec_extractv2di,
vec_initv2di, vec_setv4si, vec_extractv4si, vec_initv4si,
vec_setv8hi, vec_extractv8hi, vec_initv8hi, vec_setv16qi,
vec_extractv16qi, vec_initv16qi): New.
* config/i386/emmintrin.h (__m128i, __m128d): Use typedef, not define.
(_mm_set_sd, _mm_set1_pd, _mm_setzero_pd, _mm_set_epi64x,
_mm_set_epi32, _mm_set_epi16, _mm_set_epi8, _mm_setzero_si128): Use
constructor form.
(_mm_load_pd, _mm_store_pd): Use plain dereference.
(_mm_load_si128, _mm_store_si128): Likewise.
(_mm_load1_pd): Use _mm_set1_pd.
(_mm_load_sd): Use _mm_set_sd.
(_mm_store_sd, _mm_storeh_pd): Use __builtin_ia32_vec_ext_v2df.
(_mm_store1_pd, _mm_storer_pd): Use _mm_store_pd.
(_mm_set_epi64): Use _mm_set_epi64x.
(_mm_set1_epi64x, _mm_set1_epi64, _mm_set1_epi32, _mm_set_epi16,
_mm_set1_epi8, _mm_setr_epi64, _mm_setr_epi32, _mm_setr_epi16,
_mm_setr_epi8): Use _mm_set_foo form.
(_mm_loadl_epi64, _mm_movpi64_epi64, _mm_move_epi64): Use _mm_set_epi64.
(_mm_storel_epi64, _mm_movepi64_pi64): Use __builtin_ia32_vec_ext_v2di.
(_mm_extract_epi16): Use __builtin_ia32_vec_ext_v8hi.
(_mm_insert_epi16): Use __builtin_ia32_vec_set_v8hi.
* config/i386/mmintrin.h (_mm_setzero_si64): Use plain cast.
(_mm_set_pi32): Use __builtin_ia32_vec_init_v2si.
(_mm_set_pi16): Use __builtin_ia32_vec_init_v4hi.
(_mm_set_pi8): Use __builtin_ia32_vec_init_v8qi.
(_mm_set1_pi16, _mm_set1_pi8): Use _mm_set_piN variant.
* config/i386/pmmintrin.h (_mm_loaddup_pd): Use _mm_load1_pd.
(_mm_movedup_pd): Use _mm_shuffle_pd.
* config/i386/xmmintrin.h (_mm_setzero_ps, _mm_set_ss,
_mm_set1_ps, _mm_set_ps, _mm_setr_ps): Use constructor form.
(_mm_cvtpi16_ps, _mm_cvtpu16_ps, _mm_cvtpi8_ps, _mm_cvtpu8_ps,
_mm_cvtps_pi8, _mm_cvtpi32x2_ps): Avoid __builtin_ia32_mmx_zero;
Use _mm_setzero_ps.
(_mm_load_ss, _mm_load1_ps): Use _mm_set* form.
(_mm_load_ps, _mm_loadr_ps): Use raw dereference.
(_mm_store_ss): Use __builtin_ia32_vec_ext_v4sf.
(_mm_store_ps): Use raw dereference.
(_mm_store1_ps): Use _mm_storeu_ps.
(_mm_storer_ps): Use _mm_store_ps.
(_mm_extract_pi16): Use __builtin_ia32_vec_ext_v4hi.
(_mm_insert_pi16): Use __builtin_ia32_vec_set_v4hi.
From-SVN: r93199
2005-01-11 22:33:14 +01:00
|
|
|
return (__m64)0LL;
|
2002-01-12 08:38:50 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Creates a vector of two 32-bit values; I0 is least significant. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_set_pi32 (int __i1, int __i0)
|
|
|
|
{
|
re PR rtl-optimization/13366 (ICE using MMX/SSE builtins with -O)
PR target/13366
* config/i386/i386.h (enum ix86_builtins): Move ...
* config/i386/i386.c: ... here.
(IX86_BUILTIN_MOVDDUP, IX86_BUILTIN_MMX_ZERO, IX86_BUILTIN_PEXTRW,
IX86_BUILTIN_PINSRW, IX86_BUILTIN_LOADAPS, IX86_BUILTIN_LOADSS,
IX86_BUILTIN_STORESS, IX86_BUILTIN_SSE_ZERO, IX86_BUILTIN_PEXTRW128,
IX86_BUILTIN_PINSRW128, IX86_BUILTIN_LOADAPD, IX86_BUILTIN_LOADSD,
IX86_BUILTIN_STOREAPD, IX86_BUILTIN_STORESD, IX86_BUILTIN_STOREHPD,
IX86_BUILTIN_STORELPD, IX86_BUILTIN_SETPD1, IX86_BUILTIN_SETPD,
IX86_BUILTIN_CLRPD, IX86_BUILTIN_LOADPD1, IX86_BUILTIN_LOADRPD,
IX86_BUILTIN_STOREPD1, IX86_BUILTIN_STORERPD, IX86_BUILTIN_LOADDQA,
IX86_BUILTIN_STOREDQA, IX86_BUILTIN_CLRTI,
IX86_BUILTIN_LOADDDUP): Remove.
(IX86_BUILTIN_VEC_INIT_V2SI, IX86_BUILTIN_VEC_INIT_V4HI,
IX86_BUILTIN_VEC_INIT_V8QI, IX86_BUILTIN_VEC_EXT_V2DF,
IX86_BUILTIN_VEC_EXT_V2DI, IX86_BUILTIN_VEC_EXT_V4SF,
IX86_BUILTIN_VEC_EXT_V8HI, IX86_BUILTIN_VEC_EXT_V4HI,
IX86_BUILTIN_VEC_SET_V8HI, IX86_BUILTIN_VEC_SET_V4HI): New.
(ix86_init_builtins): Make static.
(ix86_init_mmx_sse_builtins): Update for changed builtins.
(ix86_expand_binop_builtin): Only use ix86_fixup_binary_operands
if all the modes match. Otherwise, fake it.
(get_element_number, ix86_expand_vec_init_builtin,
ix86_expand_vec_ext_builtin, ix86_expand_vec_set_builtin): New.
(ix86_expand_builtin): Make static. Update for changed builtins.
(ix86_expand_vector_move_misalign): Use sse2_loadlpd with zero
operand instead of sse2_loadsd. Cast sse1 fallback to V4SFmode.
(ix86_expand_vector_init_duplicate): New.
(ix86_expand_vector_init_low_nonzero): New.
(ix86_expand_vector_init_one_var, ix86_expand_vector_init_general):
Split out from ix86_expand_vector_init; handle integer modes.
(ix86_expand_vector_init): Use them.
(ix86_expand_vector_set, ix86_expand_vector_extract): New.
* config/i386/i386-protos.h: Update.
* config/i386/predicates.md (reg_or_0_operand): New.
* config/i386/mmx.md (mov<MMXMODEI>_internal): Add 'r' variants.
(movv2sf_internal): Likewise. And a splitter to match them all.
(vec_dupv2sf, mmx_concatv2sf, vec_setv2sf, vec_extractv2sf,
vec_initv2sf, vec_dupv4hi, vec_dupv2si, mmx_concatv2si, vec_setv2si,
vec_extractv2si, vec_initv2si, vec_setv4hi, vec_extractv4hi,
vec_initv4hi, vec_setv8qi, vec_extractv8qi, vec_initv8qi): New.
(mmx_pinsrw): Fix operand ordering.
* config/i386/sse.md (movv4sf splitter): Use direct pattern,
rather than sse_loadss expander.
(movv2df splitter): Similarly.
(sse_loadss, sse_loadlss): Remove.
(vec_dupv4sf, sse_concatv2sf, sse_concatv4sf, vec_extractv4sf_0): New.
(vec_setv4sf, vec_setv2df): Use ix86_expand_vector_set.
(vec_extractv4sf, vec_extractv2df): Use ix86_expand_vector_extract.
(sse3_movddup): Rename with '*'.
(sse3_movddup splitter): Use gen_rtx_REG instead of gen_lowpart.
(sse2_loadsd): Remove.
(vec_dupv2df_sse3): Rename from sse3_loadddup.
(vec_dupv2df, vec_concatv2df_sse3, vec_concatv2df): New.
(sse2_pinsrw): Fix argument ordering.
(sse2_loadld, sse2_loadq): Add sse1 alternatives.
(sse2_stored): Remove 'r' destination.
(vec_dupv4si, vec_dupv2di, sse2_concatv2si, sse1_concatv2si,
vec_concatv4si_1, vec_concatv2di, vec_setv2di, vec_extractv2di,
vec_initv2di, vec_setv4si, vec_extractv4si, vec_initv4si,
vec_setv8hi, vec_extractv8hi, vec_initv8hi, vec_setv16qi,
vec_extractv16qi, vec_initv16qi): New.
* config/i386/emmintrin.h (__m128i, __m128d): Use typedef, not define.
(_mm_set_sd, _mm_set1_pd, _mm_setzero_pd, _mm_set_epi64x,
_mm_set_epi32, _mm_set_epi16, _mm_set_epi8, _mm_setzero_si128): Use
constructor form.
(_mm_load_pd, _mm_store_pd): Use plain dereference.
(_mm_load_si128, _mm_store_si128): Likewise.
(_mm_load1_pd): Use _mm_set1_pd.
(_mm_load_sd): Use _mm_set_sd.
(_mm_store_sd, _mm_storeh_pd): Use __builtin_ia32_vec_ext_v2df.
(_mm_store1_pd, _mm_storer_pd): Use _mm_store_pd.
(_mm_set_epi64): Use _mm_set_epi64x.
(_mm_set1_epi64x, _mm_set1_epi64, _mm_set1_epi32, _mm_set_epi16,
_mm_set1_epi8, _mm_setr_epi64, _mm_setr_epi32, _mm_setr_epi16,
_mm_setr_epi8): Use _mm_set_foo form.
(_mm_loadl_epi64, _mm_movpi64_epi64, _mm_move_epi64): Use _mm_set_epi64.
(_mm_storel_epi64, _mm_movepi64_pi64): Use __builtin_ia32_vec_ext_v2di.
(_mm_extract_epi16): Use __builtin_ia32_vec_ext_v8hi.
(_mm_insert_epi16): Use __builtin_ia32_vec_set_v8hi.
* config/i386/mmintrin.h (_mm_setzero_si64): Use plain cast.
(_mm_set_pi32): Use __builtin_ia32_vec_init_v2si.
(_mm_set_pi16): Use __builtin_ia32_vec_init_v4hi.
(_mm_set_pi8): Use __builtin_ia32_vec_init_v8qi.
(_mm_set1_pi16, _mm_set1_pi8): Use _mm_set_piN variant.
* config/i386/pmmintrin.h (_mm_loaddup_pd): Use _mm_load1_pd.
(_mm_movedup_pd): Use _mm_shuffle_pd.
* config/i386/xmmintrin.h (_mm_setzero_ps, _mm_set_ss,
_mm_set1_ps, _mm_set_ps, _mm_setr_ps): Use constructor form.
(_mm_cvtpi16_ps, _mm_cvtpu16_ps, _mm_cvtpi8_ps, _mm_cvtpu8_ps,
_mm_cvtps_pi8, _mm_cvtpi32x2_ps): Avoid __builtin_ia32_mmx_zero;
Use _mm_setzero_ps.
(_mm_load_ss, _mm_load1_ps): Use _mm_set* form.
(_mm_load_ps, _mm_loadr_ps): Use raw dereference.
(_mm_store_ss): Use __builtin_ia32_vec_ext_v4sf.
(_mm_store_ps): Use raw dereference.
(_mm_store1_ps): Use _mm_storeu_ps.
(_mm_storer_ps): Use _mm_store_ps.
(_mm_extract_pi16): Use __builtin_ia32_vec_ext_v4hi.
(_mm_insert_pi16): Use __builtin_ia32_vec_set_v4hi.
From-SVN: r93199
2005-01-11 22:33:14 +01:00
|
|
|
return (__m64) __builtin_ia32_vec_init_v2si (__i0, __i1);
|
2002-01-12 08:38:50 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Creates a vector of four 16-bit values; W0 is least significant. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_set_pi16 (short __w3, short __w2, short __w1, short __w0)
|
|
|
|
{
|
re PR rtl-optimization/13366 (ICE using MMX/SSE builtins with -O)
PR target/13366
* config/i386/i386.h (enum ix86_builtins): Move ...
* config/i386/i386.c: ... here.
(IX86_BUILTIN_MOVDDUP, IX86_BUILTIN_MMX_ZERO, IX86_BUILTIN_PEXTRW,
IX86_BUILTIN_PINSRW, IX86_BUILTIN_LOADAPS, IX86_BUILTIN_LOADSS,
IX86_BUILTIN_STORESS, IX86_BUILTIN_SSE_ZERO, IX86_BUILTIN_PEXTRW128,
IX86_BUILTIN_PINSRW128, IX86_BUILTIN_LOADAPD, IX86_BUILTIN_LOADSD,
IX86_BUILTIN_STOREAPD, IX86_BUILTIN_STORESD, IX86_BUILTIN_STOREHPD,
IX86_BUILTIN_STORELPD, IX86_BUILTIN_SETPD1, IX86_BUILTIN_SETPD,
IX86_BUILTIN_CLRPD, IX86_BUILTIN_LOADPD1, IX86_BUILTIN_LOADRPD,
IX86_BUILTIN_STOREPD1, IX86_BUILTIN_STORERPD, IX86_BUILTIN_LOADDQA,
IX86_BUILTIN_STOREDQA, IX86_BUILTIN_CLRTI,
IX86_BUILTIN_LOADDDUP): Remove.
(IX86_BUILTIN_VEC_INIT_V2SI, IX86_BUILTIN_VEC_INIT_V4HI,
IX86_BUILTIN_VEC_INIT_V8QI, IX86_BUILTIN_VEC_EXT_V2DF,
IX86_BUILTIN_VEC_EXT_V2DI, IX86_BUILTIN_VEC_EXT_V4SF,
IX86_BUILTIN_VEC_EXT_V8HI, IX86_BUILTIN_VEC_EXT_V4HI,
IX86_BUILTIN_VEC_SET_V8HI, IX86_BUILTIN_VEC_SET_V4HI): New.
(ix86_init_builtins): Make static.
(ix86_init_mmx_sse_builtins): Update for changed builtins.
(ix86_expand_binop_builtin): Only use ix86_fixup_binary_operands
if all the modes match. Otherwise, fake it.
(get_element_number, ix86_expand_vec_init_builtin,
ix86_expand_vec_ext_builtin, ix86_expand_vec_set_builtin): New.
(ix86_expand_builtin): Make static. Update for changed builtins.
(ix86_expand_vector_move_misalign): Use sse2_loadlpd with zero
operand instead of sse2_loadsd. Cast sse1 fallback to V4SFmode.
(ix86_expand_vector_init_duplicate): New.
(ix86_expand_vector_init_low_nonzero): New.
(ix86_expand_vector_init_one_var, ix86_expand_vector_init_general):
Split out from ix86_expand_vector_init; handle integer modes.
(ix86_expand_vector_init): Use them.
(ix86_expand_vector_set, ix86_expand_vector_extract): New.
* config/i386/i386-protos.h: Update.
* config/i386/predicates.md (reg_or_0_operand): New.
* config/i386/mmx.md (mov<MMXMODEI>_internal): Add 'r' variants.
(movv2sf_internal): Likewise. And a splitter to match them all.
(vec_dupv2sf, mmx_concatv2sf, vec_setv2sf, vec_extractv2sf,
vec_initv2sf, vec_dupv4hi, vec_dupv2si, mmx_concatv2si, vec_setv2si,
vec_extractv2si, vec_initv2si, vec_setv4hi, vec_extractv4hi,
vec_initv4hi, vec_setv8qi, vec_extractv8qi, vec_initv8qi): New.
(mmx_pinsrw): Fix operand ordering.
* config/i386/sse.md (movv4sf splitter): Use direct pattern,
rather than sse_loadss expander.
(movv2df splitter): Similarly.
(sse_loadss, sse_loadlss): Remove.
(vec_dupv4sf, sse_concatv2sf, sse_concatv4sf, vec_extractv4sf_0): New.
(vec_setv4sf, vec_setv2df): Use ix86_expand_vector_set.
(vec_extractv4sf, vec_extractv2df): Use ix86_expand_vector_extract.
(sse3_movddup): Rename with '*'.
(sse3_movddup splitter): Use gen_rtx_REG instead of gen_lowpart.
(sse2_loadsd): Remove.
(vec_dupv2df_sse3): Rename from sse3_loadddup.
(vec_dupv2df, vec_concatv2df_sse3, vec_concatv2df): New.
(sse2_pinsrw): Fix argument ordering.
(sse2_loadld, sse2_loadq): Add sse1 alternatives.
(sse2_stored): Remove 'r' destination.
(vec_dupv4si, vec_dupv2di, sse2_concatv2si, sse1_concatv2si,
vec_concatv4si_1, vec_concatv2di, vec_setv2di, vec_extractv2di,
vec_initv2di, vec_setv4si, vec_extractv4si, vec_initv4si,
vec_setv8hi, vec_extractv8hi, vec_initv8hi, vec_setv16qi,
vec_extractv16qi, vec_initv16qi): New.
* config/i386/emmintrin.h (__m128i, __m128d): Use typedef, not define.
(_mm_set_sd, _mm_set1_pd, _mm_setzero_pd, _mm_set_epi64x,
_mm_set_epi32, _mm_set_epi16, _mm_set_epi8, _mm_setzero_si128): Use
constructor form.
(_mm_load_pd, _mm_store_pd): Use plain dereference.
(_mm_load_si128, _mm_store_si128): Likewise.
(_mm_load1_pd): Use _mm_set1_pd.
(_mm_load_sd): Use _mm_set_sd.
(_mm_store_sd, _mm_storeh_pd): Use __builtin_ia32_vec_ext_v2df.
(_mm_store1_pd, _mm_storer_pd): Use _mm_store_pd.
(_mm_set_epi64): Use _mm_set_epi64x.
(_mm_set1_epi64x, _mm_set1_epi64, _mm_set1_epi32, _mm_set_epi16,
_mm_set1_epi8, _mm_setr_epi64, _mm_setr_epi32, _mm_setr_epi16,
_mm_setr_epi8): Use _mm_set_foo form.
(_mm_loadl_epi64, _mm_movpi64_epi64, _mm_move_epi64): Use _mm_set_epi64.
(_mm_storel_epi64, _mm_movepi64_pi64): Use __builtin_ia32_vec_ext_v2di.
(_mm_extract_epi16): Use __builtin_ia32_vec_ext_v8hi.
(_mm_insert_epi16): Use __builtin_ia32_vec_set_v8hi.
* config/i386/mmintrin.h (_mm_setzero_si64): Use plain cast.
(_mm_set_pi32): Use __builtin_ia32_vec_init_v2si.
(_mm_set_pi16): Use __builtin_ia32_vec_init_v4hi.
(_mm_set_pi8): Use __builtin_ia32_vec_init_v8qi.
(_mm_set1_pi16, _mm_set1_pi8): Use _mm_set_piN variant.
* config/i386/pmmintrin.h (_mm_loaddup_pd): Use _mm_load1_pd.
(_mm_movedup_pd): Use _mm_shuffle_pd.
* config/i386/xmmintrin.h (_mm_setzero_ps, _mm_set_ss,
_mm_set1_ps, _mm_set_ps, _mm_setr_ps): Use constructor form.
(_mm_cvtpi16_ps, _mm_cvtpu16_ps, _mm_cvtpi8_ps, _mm_cvtpu8_ps,
_mm_cvtps_pi8, _mm_cvtpi32x2_ps): Avoid __builtin_ia32_mmx_zero;
Use _mm_setzero_ps.
(_mm_load_ss, _mm_load1_ps): Use _mm_set* form.
(_mm_load_ps, _mm_loadr_ps): Use raw dereference.
(_mm_store_ss): Use __builtin_ia32_vec_ext_v4sf.
(_mm_store_ps): Use raw dereference.
(_mm_store1_ps): Use _mm_storeu_ps.
(_mm_storer_ps): Use _mm_store_ps.
(_mm_extract_pi16): Use __builtin_ia32_vec_ext_v4hi.
(_mm_insert_pi16): Use __builtin_ia32_vec_set_v4hi.
From-SVN: r93199
2005-01-11 22:33:14 +01:00
|
|
|
return (__m64) __builtin_ia32_vec_init_v4hi (__w0, __w1, __w2, __w3);
|
2002-01-12 08:38:50 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Creates a vector of eight 8-bit values; B0 is least significant. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_set_pi8 (char __b7, char __b6, char __b5, char __b4,
|
|
|
|
char __b3, char __b2, char __b1, char __b0)
|
|
|
|
{
|
re PR rtl-optimization/13366 (ICE using MMX/SSE builtins with -O)
PR target/13366
* config/i386/i386.h (enum ix86_builtins): Move ...
* config/i386/i386.c: ... here.
(IX86_BUILTIN_MOVDDUP, IX86_BUILTIN_MMX_ZERO, IX86_BUILTIN_PEXTRW,
IX86_BUILTIN_PINSRW, IX86_BUILTIN_LOADAPS, IX86_BUILTIN_LOADSS,
IX86_BUILTIN_STORESS, IX86_BUILTIN_SSE_ZERO, IX86_BUILTIN_PEXTRW128,
IX86_BUILTIN_PINSRW128, IX86_BUILTIN_LOADAPD, IX86_BUILTIN_LOADSD,
IX86_BUILTIN_STOREAPD, IX86_BUILTIN_STORESD, IX86_BUILTIN_STOREHPD,
IX86_BUILTIN_STORELPD, IX86_BUILTIN_SETPD1, IX86_BUILTIN_SETPD,
IX86_BUILTIN_CLRPD, IX86_BUILTIN_LOADPD1, IX86_BUILTIN_LOADRPD,
IX86_BUILTIN_STOREPD1, IX86_BUILTIN_STORERPD, IX86_BUILTIN_LOADDQA,
IX86_BUILTIN_STOREDQA, IX86_BUILTIN_CLRTI,
IX86_BUILTIN_LOADDDUP): Remove.
(IX86_BUILTIN_VEC_INIT_V2SI, IX86_BUILTIN_VEC_INIT_V4HI,
IX86_BUILTIN_VEC_INIT_V8QI, IX86_BUILTIN_VEC_EXT_V2DF,
IX86_BUILTIN_VEC_EXT_V2DI, IX86_BUILTIN_VEC_EXT_V4SF,
IX86_BUILTIN_VEC_EXT_V8HI, IX86_BUILTIN_VEC_EXT_V4HI,
IX86_BUILTIN_VEC_SET_V8HI, IX86_BUILTIN_VEC_SET_V4HI): New.
(ix86_init_builtins): Make static.
(ix86_init_mmx_sse_builtins): Update for changed builtins.
(ix86_expand_binop_builtin): Only use ix86_fixup_binary_operands
if all the modes match. Otherwise, fake it.
(get_element_number, ix86_expand_vec_init_builtin,
ix86_expand_vec_ext_builtin, ix86_expand_vec_set_builtin): New.
(ix86_expand_builtin): Make static. Update for changed builtins.
(ix86_expand_vector_move_misalign): Use sse2_loadlpd with zero
operand instead of sse2_loadsd. Cast sse1 fallback to V4SFmode.
(ix86_expand_vector_init_duplicate): New.
(ix86_expand_vector_init_low_nonzero): New.
(ix86_expand_vector_init_one_var, ix86_expand_vector_init_general):
Split out from ix86_expand_vector_init; handle integer modes.
(ix86_expand_vector_init): Use them.
(ix86_expand_vector_set, ix86_expand_vector_extract): New.
* config/i386/i386-protos.h: Update.
* config/i386/predicates.md (reg_or_0_operand): New.
* config/i386/mmx.md (mov<MMXMODEI>_internal): Add 'r' variants.
(movv2sf_internal): Likewise. And a splitter to match them all.
(vec_dupv2sf, mmx_concatv2sf, vec_setv2sf, vec_extractv2sf,
vec_initv2sf, vec_dupv4hi, vec_dupv2si, mmx_concatv2si, vec_setv2si,
vec_extractv2si, vec_initv2si, vec_setv4hi, vec_extractv4hi,
vec_initv4hi, vec_setv8qi, vec_extractv8qi, vec_initv8qi): New.
(mmx_pinsrw): Fix operand ordering.
* config/i386/sse.md (movv4sf splitter): Use direct pattern,
rather than sse_loadss expander.
(movv2df splitter): Similarly.
(sse_loadss, sse_loadlss): Remove.
(vec_dupv4sf, sse_concatv2sf, sse_concatv4sf, vec_extractv4sf_0): New.
(vec_setv4sf, vec_setv2df): Use ix86_expand_vector_set.
(vec_extractv4sf, vec_extractv2df): Use ix86_expand_vector_extract.
(sse3_movddup): Rename with '*'.
(sse3_movddup splitter): Use gen_rtx_REG instead of gen_lowpart.
(sse2_loadsd): Remove.
(vec_dupv2df_sse3): Rename from sse3_loadddup.
(vec_dupv2df, vec_concatv2df_sse3, vec_concatv2df): New.
(sse2_pinsrw): Fix argument ordering.
(sse2_loadld, sse2_loadq): Add sse1 alternatives.
(sse2_stored): Remove 'r' destination.
(vec_dupv4si, vec_dupv2di, sse2_concatv2si, sse1_concatv2si,
vec_concatv4si_1, vec_concatv2di, vec_setv2di, vec_extractv2di,
vec_initv2di, vec_setv4si, vec_extractv4si, vec_initv4si,
vec_setv8hi, vec_extractv8hi, vec_initv8hi, vec_setv16qi,
vec_extractv16qi, vec_initv16qi): New.
* config/i386/emmintrin.h (__m128i, __m128d): Use typedef, not define.
(_mm_set_sd, _mm_set1_pd, _mm_setzero_pd, _mm_set_epi64x,
_mm_set_epi32, _mm_set_epi16, _mm_set_epi8, _mm_setzero_si128): Use
constructor form.
(_mm_load_pd, _mm_store_pd): Use plain dereference.
(_mm_load_si128, _mm_store_si128): Likewise.
(_mm_load1_pd): Use _mm_set1_pd.
(_mm_load_sd): Use _mm_set_sd.
(_mm_store_sd, _mm_storeh_pd): Use __builtin_ia32_vec_ext_v2df.
(_mm_store1_pd, _mm_storer_pd): Use _mm_store_pd.
(_mm_set_epi64): Use _mm_set_epi64x.
(_mm_set1_epi64x, _mm_set1_epi64, _mm_set1_epi32, _mm_set_epi16,
_mm_set1_epi8, _mm_setr_epi64, _mm_setr_epi32, _mm_setr_epi16,
_mm_setr_epi8): Use _mm_set_foo form.
(_mm_loadl_epi64, _mm_movpi64_epi64, _mm_move_epi64): Use _mm_set_epi64.
(_mm_storel_epi64, _mm_movepi64_pi64): Use __builtin_ia32_vec_ext_v2di.
(_mm_extract_epi16): Use __builtin_ia32_vec_ext_v8hi.
(_mm_insert_epi16): Use __builtin_ia32_vec_set_v8hi.
* config/i386/mmintrin.h (_mm_setzero_si64): Use plain cast.
(_mm_set_pi32): Use __builtin_ia32_vec_init_v2si.
(_mm_set_pi16): Use __builtin_ia32_vec_init_v4hi.
(_mm_set_pi8): Use __builtin_ia32_vec_init_v8qi.
(_mm_set1_pi16, _mm_set1_pi8): Use _mm_set_piN variant.
* config/i386/pmmintrin.h (_mm_loaddup_pd): Use _mm_load1_pd.
(_mm_movedup_pd): Use _mm_shuffle_pd.
* config/i386/xmmintrin.h (_mm_setzero_ps, _mm_set_ss,
_mm_set1_ps, _mm_set_ps, _mm_setr_ps): Use constructor form.
(_mm_cvtpi16_ps, _mm_cvtpu16_ps, _mm_cvtpi8_ps, _mm_cvtpu8_ps,
_mm_cvtps_pi8, _mm_cvtpi32x2_ps): Avoid __builtin_ia32_mmx_zero;
Use _mm_setzero_ps.
(_mm_load_ss, _mm_load1_ps): Use _mm_set* form.
(_mm_load_ps, _mm_loadr_ps): Use raw dereference.
(_mm_store_ss): Use __builtin_ia32_vec_ext_v4sf.
(_mm_store_ps): Use raw dereference.
(_mm_store1_ps): Use _mm_storeu_ps.
(_mm_storer_ps): Use _mm_store_ps.
(_mm_extract_pi16): Use __builtin_ia32_vec_ext_v4hi.
(_mm_insert_pi16): Use __builtin_ia32_vec_set_v4hi.
From-SVN: r93199
2005-01-11 22:33:14 +01:00
|
|
|
return (__m64) __builtin_ia32_vec_init_v8qi (__b0, __b1, __b2, __b3,
|
|
|
|
__b4, __b5, __b6, __b7);
|
2002-01-12 08:38:50 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Similar, but with the arguments in reverse order. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_setr_pi32 (int __i0, int __i1)
|
|
|
|
{
|
|
|
|
return _mm_set_pi32 (__i1, __i0);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_setr_pi16 (short __w0, short __w1, short __w2, short __w3)
|
|
|
|
{
|
|
|
|
return _mm_set_pi16 (__w3, __w2, __w1, __w0);
|
|
|
|
}
|
|
|
|
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_setr_pi8 (char __b0, char __b1, char __b2, char __b3,
|
|
|
|
char __b4, char __b5, char __b6, char __b7)
|
|
|
|
{
|
|
|
|
return _mm_set_pi8 (__b7, __b6, __b5, __b4, __b3, __b2, __b1, __b0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Creates a vector of two 32-bit values, both elements containing I. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_set1_pi32 (int __i)
|
|
|
|
{
|
|
|
|
return _mm_set_pi32 (__i, __i);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Creates a vector of four 16-bit values, all elements containing W. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_set1_pi16 (short __w)
|
|
|
|
{
|
re PR rtl-optimization/13366 (ICE using MMX/SSE builtins with -O)
PR target/13366
* config/i386/i386.h (enum ix86_builtins): Move ...
* config/i386/i386.c: ... here.
(IX86_BUILTIN_MOVDDUP, IX86_BUILTIN_MMX_ZERO, IX86_BUILTIN_PEXTRW,
IX86_BUILTIN_PINSRW, IX86_BUILTIN_LOADAPS, IX86_BUILTIN_LOADSS,
IX86_BUILTIN_STORESS, IX86_BUILTIN_SSE_ZERO, IX86_BUILTIN_PEXTRW128,
IX86_BUILTIN_PINSRW128, IX86_BUILTIN_LOADAPD, IX86_BUILTIN_LOADSD,
IX86_BUILTIN_STOREAPD, IX86_BUILTIN_STORESD, IX86_BUILTIN_STOREHPD,
IX86_BUILTIN_STORELPD, IX86_BUILTIN_SETPD1, IX86_BUILTIN_SETPD,
IX86_BUILTIN_CLRPD, IX86_BUILTIN_LOADPD1, IX86_BUILTIN_LOADRPD,
IX86_BUILTIN_STOREPD1, IX86_BUILTIN_STORERPD, IX86_BUILTIN_LOADDQA,
IX86_BUILTIN_STOREDQA, IX86_BUILTIN_CLRTI,
IX86_BUILTIN_LOADDDUP): Remove.
(IX86_BUILTIN_VEC_INIT_V2SI, IX86_BUILTIN_VEC_INIT_V4HI,
IX86_BUILTIN_VEC_INIT_V8QI, IX86_BUILTIN_VEC_EXT_V2DF,
IX86_BUILTIN_VEC_EXT_V2DI, IX86_BUILTIN_VEC_EXT_V4SF,
IX86_BUILTIN_VEC_EXT_V8HI, IX86_BUILTIN_VEC_EXT_V4HI,
IX86_BUILTIN_VEC_SET_V8HI, IX86_BUILTIN_VEC_SET_V4HI): New.
(ix86_init_builtins): Make static.
(ix86_init_mmx_sse_builtins): Update for changed builtins.
(ix86_expand_binop_builtin): Only use ix86_fixup_binary_operands
if all the modes match. Otherwise, fake it.
(get_element_number, ix86_expand_vec_init_builtin,
ix86_expand_vec_ext_builtin, ix86_expand_vec_set_builtin): New.
(ix86_expand_builtin): Make static. Update for changed builtins.
(ix86_expand_vector_move_misalign): Use sse2_loadlpd with zero
operand instead of sse2_loadsd. Cast sse1 fallback to V4SFmode.
(ix86_expand_vector_init_duplicate): New.
(ix86_expand_vector_init_low_nonzero): New.
(ix86_expand_vector_init_one_var, ix86_expand_vector_init_general):
Split out from ix86_expand_vector_init; handle integer modes.
(ix86_expand_vector_init): Use them.
(ix86_expand_vector_set, ix86_expand_vector_extract): New.
* config/i386/i386-protos.h: Update.
* config/i386/predicates.md (reg_or_0_operand): New.
* config/i386/mmx.md (mov<MMXMODEI>_internal): Add 'r' variants.
(movv2sf_internal): Likewise. And a splitter to match them all.
(vec_dupv2sf, mmx_concatv2sf, vec_setv2sf, vec_extractv2sf,
vec_initv2sf, vec_dupv4hi, vec_dupv2si, mmx_concatv2si, vec_setv2si,
vec_extractv2si, vec_initv2si, vec_setv4hi, vec_extractv4hi,
vec_initv4hi, vec_setv8qi, vec_extractv8qi, vec_initv8qi): New.
(mmx_pinsrw): Fix operand ordering.
* config/i386/sse.md (movv4sf splitter): Use direct pattern,
rather than sse_loadss expander.
(movv2df splitter): Similarly.
(sse_loadss, sse_loadlss): Remove.
(vec_dupv4sf, sse_concatv2sf, sse_concatv4sf, vec_extractv4sf_0): New.
(vec_setv4sf, vec_setv2df): Use ix86_expand_vector_set.
(vec_extractv4sf, vec_extractv2df): Use ix86_expand_vector_extract.
(sse3_movddup): Rename with '*'.
(sse3_movddup splitter): Use gen_rtx_REG instead of gen_lowpart.
(sse2_loadsd): Remove.
(vec_dupv2df_sse3): Rename from sse3_loadddup.
(vec_dupv2df, vec_concatv2df_sse3, vec_concatv2df): New.
(sse2_pinsrw): Fix argument ordering.
(sse2_loadld, sse2_loadq): Add sse1 alternatives.
(sse2_stored): Remove 'r' destination.
(vec_dupv4si, vec_dupv2di, sse2_concatv2si, sse1_concatv2si,
vec_concatv4si_1, vec_concatv2di, vec_setv2di, vec_extractv2di,
vec_initv2di, vec_setv4si, vec_extractv4si, vec_initv4si,
vec_setv8hi, vec_extractv8hi, vec_initv8hi, vec_setv16qi,
vec_extractv16qi, vec_initv16qi): New.
* config/i386/emmintrin.h (__m128i, __m128d): Use typedef, not define.
(_mm_set_sd, _mm_set1_pd, _mm_setzero_pd, _mm_set_epi64x,
_mm_set_epi32, _mm_set_epi16, _mm_set_epi8, _mm_setzero_si128): Use
constructor form.
(_mm_load_pd, _mm_store_pd): Use plain dereference.
(_mm_load_si128, _mm_store_si128): Likewise.
(_mm_load1_pd): Use _mm_set1_pd.
(_mm_load_sd): Use _mm_set_sd.
(_mm_store_sd, _mm_storeh_pd): Use __builtin_ia32_vec_ext_v2df.
(_mm_store1_pd, _mm_storer_pd): Use _mm_store_pd.
(_mm_set_epi64): Use _mm_set_epi64x.
(_mm_set1_epi64x, _mm_set1_epi64, _mm_set1_epi32, _mm_set_epi16,
_mm_set1_epi8, _mm_setr_epi64, _mm_setr_epi32, _mm_setr_epi16,
_mm_setr_epi8): Use _mm_set_foo form.
(_mm_loadl_epi64, _mm_movpi64_epi64, _mm_move_epi64): Use _mm_set_epi64.
(_mm_storel_epi64, _mm_movepi64_pi64): Use __builtin_ia32_vec_ext_v2di.
(_mm_extract_epi16): Use __builtin_ia32_vec_ext_v8hi.
(_mm_insert_epi16): Use __builtin_ia32_vec_set_v8hi.
* config/i386/mmintrin.h (_mm_setzero_si64): Use plain cast.
(_mm_set_pi32): Use __builtin_ia32_vec_init_v2si.
(_mm_set_pi16): Use __builtin_ia32_vec_init_v4hi.
(_mm_set_pi8): Use __builtin_ia32_vec_init_v8qi.
(_mm_set1_pi16, _mm_set1_pi8): Use _mm_set_piN variant.
* config/i386/pmmintrin.h (_mm_loaddup_pd): Use _mm_load1_pd.
(_mm_movedup_pd): Use _mm_shuffle_pd.
* config/i386/xmmintrin.h (_mm_setzero_ps, _mm_set_ss,
_mm_set1_ps, _mm_set_ps, _mm_setr_ps): Use constructor form.
(_mm_cvtpi16_ps, _mm_cvtpu16_ps, _mm_cvtpi8_ps, _mm_cvtpu8_ps,
_mm_cvtps_pi8, _mm_cvtpi32x2_ps): Avoid __builtin_ia32_mmx_zero;
Use _mm_setzero_ps.
(_mm_load_ss, _mm_load1_ps): Use _mm_set* form.
(_mm_load_ps, _mm_loadr_ps): Use raw dereference.
(_mm_store_ss): Use __builtin_ia32_vec_ext_v4sf.
(_mm_store_ps): Use raw dereference.
(_mm_store1_ps): Use _mm_storeu_ps.
(_mm_storer_ps): Use _mm_store_ps.
(_mm_extract_pi16): Use __builtin_ia32_vec_ext_v4hi.
(_mm_insert_pi16): Use __builtin_ia32_vec_set_v4hi.
From-SVN: r93199
2005-01-11 22:33:14 +01:00
|
|
|
return _mm_set_pi16 (__w, __w, __w, __w);
|
2002-01-12 08:38:50 +01:00
|
|
|
}
|
|
|
|
|
2003-10-26 17:18:31 +01:00
|
|
|
/* Creates a vector of eight 8-bit values, all elements containing B. */
|
2005-06-29 18:14:17 +02:00
|
|
|
static __inline __m64 __attribute__((__always_inline__))
|
2002-01-12 08:38:50 +01:00
|
|
|
_mm_set1_pi8 (char __b)
|
|
|
|
{
|
re PR rtl-optimization/13366 (ICE using MMX/SSE builtins with -O)
PR target/13366
* config/i386/i386.h (enum ix86_builtins): Move ...
* config/i386/i386.c: ... here.
(IX86_BUILTIN_MOVDDUP, IX86_BUILTIN_MMX_ZERO, IX86_BUILTIN_PEXTRW,
IX86_BUILTIN_PINSRW, IX86_BUILTIN_LOADAPS, IX86_BUILTIN_LOADSS,
IX86_BUILTIN_STORESS, IX86_BUILTIN_SSE_ZERO, IX86_BUILTIN_PEXTRW128,
IX86_BUILTIN_PINSRW128, IX86_BUILTIN_LOADAPD, IX86_BUILTIN_LOADSD,
IX86_BUILTIN_STOREAPD, IX86_BUILTIN_STORESD, IX86_BUILTIN_STOREHPD,
IX86_BUILTIN_STORELPD, IX86_BUILTIN_SETPD1, IX86_BUILTIN_SETPD,
IX86_BUILTIN_CLRPD, IX86_BUILTIN_LOADPD1, IX86_BUILTIN_LOADRPD,
IX86_BUILTIN_STOREPD1, IX86_BUILTIN_STORERPD, IX86_BUILTIN_LOADDQA,
IX86_BUILTIN_STOREDQA, IX86_BUILTIN_CLRTI,
IX86_BUILTIN_LOADDDUP): Remove.
(IX86_BUILTIN_VEC_INIT_V2SI, IX86_BUILTIN_VEC_INIT_V4HI,
IX86_BUILTIN_VEC_INIT_V8QI, IX86_BUILTIN_VEC_EXT_V2DF,
IX86_BUILTIN_VEC_EXT_V2DI, IX86_BUILTIN_VEC_EXT_V4SF,
IX86_BUILTIN_VEC_EXT_V8HI, IX86_BUILTIN_VEC_EXT_V4HI,
IX86_BUILTIN_VEC_SET_V8HI, IX86_BUILTIN_VEC_SET_V4HI): New.
(ix86_init_builtins): Make static.
(ix86_init_mmx_sse_builtins): Update for changed builtins.
(ix86_expand_binop_builtin): Only use ix86_fixup_binary_operands
if all the modes match. Otherwise, fake it.
(get_element_number, ix86_expand_vec_init_builtin,
ix86_expand_vec_ext_builtin, ix86_expand_vec_set_builtin): New.
(ix86_expand_builtin): Make static. Update for changed builtins.
(ix86_expand_vector_move_misalign): Use sse2_loadlpd with zero
operand instead of sse2_loadsd. Cast sse1 fallback to V4SFmode.
(ix86_expand_vector_init_duplicate): New.
(ix86_expand_vector_init_low_nonzero): New.
(ix86_expand_vector_init_one_var, ix86_expand_vector_init_general):
Split out from ix86_expand_vector_init; handle integer modes.
(ix86_expand_vector_init): Use them.
(ix86_expand_vector_set, ix86_expand_vector_extract): New.
* config/i386/i386-protos.h: Update.
* config/i386/predicates.md (reg_or_0_operand): New.
* config/i386/mmx.md (mov<MMXMODEI>_internal): Add 'r' variants.
(movv2sf_internal): Likewise. And a splitter to match them all.
(vec_dupv2sf, mmx_concatv2sf, vec_setv2sf, vec_extractv2sf,
vec_initv2sf, vec_dupv4hi, vec_dupv2si, mmx_concatv2si, vec_setv2si,
vec_extractv2si, vec_initv2si, vec_setv4hi, vec_extractv4hi,
vec_initv4hi, vec_setv8qi, vec_extractv8qi, vec_initv8qi): New.
(mmx_pinsrw): Fix operand ordering.
* config/i386/sse.md (movv4sf splitter): Use direct pattern,
rather than sse_loadss expander.
(movv2df splitter): Similarly.
(sse_loadss, sse_loadlss): Remove.
(vec_dupv4sf, sse_concatv2sf, sse_concatv4sf, vec_extractv4sf_0): New.
(vec_setv4sf, vec_setv2df): Use ix86_expand_vector_set.
(vec_extractv4sf, vec_extractv2df): Use ix86_expand_vector_extract.
(sse3_movddup): Rename with '*'.
(sse3_movddup splitter): Use gen_rtx_REG instead of gen_lowpart.
(sse2_loadsd): Remove.
(vec_dupv2df_sse3): Rename from sse3_loadddup.
(vec_dupv2df, vec_concatv2df_sse3, vec_concatv2df): New.
(sse2_pinsrw): Fix argument ordering.
(sse2_loadld, sse2_loadq): Add sse1 alternatives.
(sse2_stored): Remove 'r' destination.
(vec_dupv4si, vec_dupv2di, sse2_concatv2si, sse1_concatv2si,
vec_concatv4si_1, vec_concatv2di, vec_setv2di, vec_extractv2di,
vec_initv2di, vec_setv4si, vec_extractv4si, vec_initv4si,
vec_setv8hi, vec_extractv8hi, vec_initv8hi, vec_setv16qi,
vec_extractv16qi, vec_initv16qi): New.
* config/i386/emmintrin.h (__m128i, __m128d): Use typedef, not define.
(_mm_set_sd, _mm_set1_pd, _mm_setzero_pd, _mm_set_epi64x,
_mm_set_epi32, _mm_set_epi16, _mm_set_epi8, _mm_setzero_si128): Use
constructor form.
(_mm_load_pd, _mm_store_pd): Use plain dereference.
(_mm_load_si128, _mm_store_si128): Likewise.
(_mm_load1_pd): Use _mm_set1_pd.
(_mm_load_sd): Use _mm_set_sd.
(_mm_store_sd, _mm_storeh_pd): Use __builtin_ia32_vec_ext_v2df.
(_mm_store1_pd, _mm_storer_pd): Use _mm_store_pd.
(_mm_set_epi64): Use _mm_set_epi64x.
(_mm_set1_epi64x, _mm_set1_epi64, _mm_set1_epi32, _mm_set_epi16,
_mm_set1_epi8, _mm_setr_epi64, _mm_setr_epi32, _mm_setr_epi16,
_mm_setr_epi8): Use _mm_set_foo form.
(_mm_loadl_epi64, _mm_movpi64_epi64, _mm_move_epi64): Use _mm_set_epi64.
(_mm_storel_epi64, _mm_movepi64_pi64): Use __builtin_ia32_vec_ext_v2di.
(_mm_extract_epi16): Use __builtin_ia32_vec_ext_v8hi.
(_mm_insert_epi16): Use __builtin_ia32_vec_set_v8hi.
* config/i386/mmintrin.h (_mm_setzero_si64): Use plain cast.
(_mm_set_pi32): Use __builtin_ia32_vec_init_v2si.
(_mm_set_pi16): Use __builtin_ia32_vec_init_v4hi.
(_mm_set_pi8): Use __builtin_ia32_vec_init_v8qi.
(_mm_set1_pi16, _mm_set1_pi8): Use _mm_set_piN variant.
* config/i386/pmmintrin.h (_mm_loaddup_pd): Use _mm_load1_pd.
(_mm_movedup_pd): Use _mm_shuffle_pd.
* config/i386/xmmintrin.h (_mm_setzero_ps, _mm_set_ss,
_mm_set1_ps, _mm_set_ps, _mm_setr_ps): Use constructor form.
(_mm_cvtpi16_ps, _mm_cvtpu16_ps, _mm_cvtpi8_ps, _mm_cvtpu8_ps,
_mm_cvtps_pi8, _mm_cvtpi32x2_ps): Avoid __builtin_ia32_mmx_zero;
Use _mm_setzero_ps.
(_mm_load_ss, _mm_load1_ps): Use _mm_set* form.
(_mm_load_ps, _mm_loadr_ps): Use raw dereference.
(_mm_store_ss): Use __builtin_ia32_vec_ext_v4sf.
(_mm_store_ps): Use raw dereference.
(_mm_store1_ps): Use _mm_storeu_ps.
(_mm_storer_ps): Use _mm_store_ps.
(_mm_extract_pi16): Use __builtin_ia32_vec_ext_v4hi.
(_mm_insert_pi16): Use __builtin_ia32_vec_set_v4hi.
From-SVN: r93199
2005-01-11 22:33:14 +01:00
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return _mm_set_pi8 (__b, __b, __b, __b, __b, __b, __b, __b);
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2002-01-12 08:38:50 +01:00
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}
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2002-10-17 19:09:17 +02:00
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#endif /* __MMX__ */
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2002-01-12 08:38:50 +01:00
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#endif /* _MMINTRIN_H_INCLUDED */
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