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gcc/gcc/config/mips/mips.opt

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config.gcc (mips*-*-*): Rename MASK_SPLIT_ADDRS to MASK_SPLIT_ADDRESSES. * config.gcc (mips*-*-*): Rename MASK_SPLIT_ADDRS to MASK_SPLIT_ADDRESSES. * config/mips/mips.h (target_flags, mips_fix_vr4130_string): Delete. (MASK_INT64, MASK_LONG64, MASK_SPLIT_ADDR, MASK_NO_FUSED_MADD) (MASK_EXPLICIT_RELOCS, MASK_MEMCPY, MASK_SOFT_FLOAT) (MASK_FLOAT64, MASK_ABICALLS, MASK_XGOT, MASK_LONG_CALLS) (MASK_64BIT, MASK_EMBEDDED_DATA, MASK_BIG_ENDIAN) (MASK_SINGLE_FLOAT, MASK_MAD, MASK_4300_MUL_FIX, MASK_MIPS16) (MASK_NO_CHECK_ZERO_DIV, MASK_BRANCHLIKELY) (MASK_UNINIT_CONST_IN_RODATA, MASK_FIX_R4000, MASK_FIX_R4400) (MASK_FIX_SB1, MASK_FIX_VR4120, MASK_VR4130_ALIGN) (MASK_FP_EXCEPTIONS, MASK_DIVIDE_BREAKS, MASK_PAIRED_SINGLE) (MASK_MIPS3D, MASK_SYM32, MASK_DEBUG, MASK_DEBUG_D) (MASK_MIPS_TFILE, TARGET_INT64, TARGET_LONG64, TARGET_FLOAT64) (TARGET_64BIT, TARGET_SPLIT_ADDRESSES, TARGET_DEBUG_MODE) (TARGET_DEBUG_D_MODE, TARGET_MEMCPY, TARGET_ABICALLS) (TARGET_XGOT, TARGET_SOFT_FLOAT, TARGET_HARD_FLOAT) (TARGET_LONG_CALLS, TARGET_EMBEDDED_DATA) (TARGET_UNINIT_CONST_IN_RODATA, TARGET_BIG_ENDIAN) (TARGET_SINGLE_FLOAT, TARGET_DOUBLE_FLOAT, TARGET_MAD) (TARGET_FUSED_MADD, TARGET_4300_MUL_FIX, TARGET_CHECK_ZERO_DIV) (TARGET_DIVIDE_TRAPS, TARGET_BRANCHLIKELY, TARGET_FIX_SB1) (TARGET_FIX_R4000, TARGET_FIX_R4400, TARGET_FIX_VR4120) (TARGET_FIX_VR4130, TARGET_VR4130_ALIGN, TARGET_FP_EXCEPTIONS) (TARGET_PAIRED_SINGLE_FLOAT, TARGET_MIPS3D, TARGET_SYM32) (TARGET_EXPLICIT_RELOCS): Delete. (TARGET_SWITCHES, SUBTARGET_TARGET_SWITCHES): Delete. (TARGET_OPTIONS): Remove entry for -mfix-vr4130. * config/mips/mips.c (TARGET_DEFAULT_TARGET_FLAGS): Define. (override_options): Set MASK_LONG64 if -mint64 is given and no -mlongXX option is. Complain about -mint64 -mlong32. (override_options, CMP_BUILTINS, mips_bdesc, sb1_desc): Rename MASK_PAIRED_SINGLE to MASK_PAIRED_SINGLE_FLOAT. * config/mips/mips.opt: New file. From-SVN: r96452
2005-03-14 21:40:57 +01:00
mabicalls
Target Report Mask(ABICALLS)
Use SVR4-style PIC
mad
Target Report Var(TARGET_MAD)
Use PMC-style 'mad' instructions
mbranch-likely
Target Report Mask(BRANCHLIKELY)
Use Branch Likely instructions, overriding the architecture default
mcheck-zero-division
Target Report Mask(CHECK_ZERO_DIV)
Trap on integer divide by zero
mdivide-breaks
Target Report Mask(DIVIDE_BREAKS)
Use branch-and-break sequences to check for integer divide by zero
mdivide-traps
Target Report InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
Use trap instructions to check for integer divide by zero
mdouble-float
Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
mdebug
Target Var(TARGET_DEBUG_MODE) Undocumented
mdebugd
Target Var(TARGET_DEBUG_D_MODE) Undocumented
meb
Target Report RejectNegative Mask(BIG_ENDIAN)
Use big-endian byte order
mel
Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
Use little-endian byte order
membedded-data
Target Report Var(TARGET_EMBEDDED_DATA)
Use ROM instead of RAM
mexplicit-relocs
Target Report Mask(EXPLICIT_RELOCS)
Use NewABI-style %reloc() assembly operators
mfix-r4000
Target Report Mask(FIX_R4000)
Work around certain R4000 errata
mfix-r4400
Target Report Mask(FIX_R4400)
Work around certain R4400 errata
mfix-sb1
Target Report Var(TARGET_FIX_SB1)
Work around errata for early SB-1 revision 2 cores
mfix-vr4120
Target Report Var(TARGET_FIX_VR4120)
Work around certain VR4120 errata
mfix-vr4130
Target Report Var(TARGET_FIX_VR4130)
Work around VR4130 mflo/mfhi errata
mfix4300
Target Report Var(TARGET_4300_MUL_FIX)
Work around an early 4300 hardware bug
mfp-exceptions
Target Report Mask(FP_EXCEPTIONS)
FP exceptions are enabled
mfp32
Target Report RejectNegative InverseMask(FLOAT64)
Use 32-bit floating-point registers
mfp64
Target Report RejectNegative Mask(FLOAT64)
Use 64-bit floating-point registers
mfused-madd
Target Report Mask(FUSED_MADD)
Generate floating-point multiply-add instructions
mgp32
Target Report RejectNegative InverseMask(64BIT)
Use 32-bit general registers
mgp64
Target Report RejectNegative Mask(64BIT)
Use 64-bit general registers
mhard-float
Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT)
Allow the use of hardware floating-point instructions
mint64
Target Report RejectNegative Mask(INT64)
Use a 64-bit int type
mips16
Target Report RejectNegative Mask(MIPS16)
Generate mips16 code
mips3d
Target Report RejectNegative Mask(MIPS3D)
Use MIPS-3D instructions
mlong-calls
Target Report Var(TARGET_LONG_CALLS)
Use indirect calls
mlong32
Target Report RejectNegative InverseMask(LONG64, LONG32)
Use a 32-bit long type
mlong64
Target Report RejectNegative Mask(LONG64)
Use a 64-bit long type
mmemcpy
Target Report Var(TARGET_MEMCPY)
Don't optimize block moves
mmips-tfile
Target
Use the mips-tfile postpass
mno-mips16
Target Report RejectNegative InverseMask(MIPS16)
Generate normal-mode code
mno-mips3d
Target Report RejectNegative InverseMask(MIPS3D)
Do not use MIPS-3D instructions
mpaired-single
Target Report Mask(PAIRED_SINGLE_FLOAT)
Use paired-single floating-point instructions
msingle-float
Target Report RejectNegative Mask(SINGLE_FLOAT)
Restrict the use of hardware floating-point instructions to 32-bit operations
msoft-float
Target Report RejectNegative Mask(SOFT_FLOAT)
Prevent the use of all hardware floating-point instructions
msplit-addresses
Target Report Mask(SPLIT_ADDRESSES)
Optimize lui/addiu address loads
msym32
Target Report Var(TARGET_SYM32)
Assume all symbols have 32-bit values
muninit-const-in-rodata
Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
Put uninitialized constants in ROM (needs -membedded-data)
mvr4130-align
Target Report Mask(VR4130_ALIGN)
Perform VR4130-specific alignment optimizations
mxgot
Target Report Var(TARGET_XGOT)
Lift restrictions on GOT size