2020-11-13 17:06:48 +01:00
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//===-- hwasan_checks.h -----------------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file is a part of HWAddressSanitizer.
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//
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//===----------------------------------------------------------------------===//
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#ifndef HWASAN_CHECKS_H
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#define HWASAN_CHECKS_H
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2021-05-12 14:37:22 +02:00
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#include "hwasan_allocator.h"
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2020-11-13 17:06:48 +01:00
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#include "hwasan_mapping.h"
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#include "sanitizer_common/sanitizer_common.h"
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namespace __hwasan {
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template <unsigned X>
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__attribute__((always_inline)) static void SigTrap(uptr p) {
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#if defined(__aarch64__)
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(void)p;
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// 0x900 is added to do not interfere with the kernel use of lower values of
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// brk immediate.
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register uptr x0 asm("x0") = p;
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asm("brk %1\n\t" ::"r"(x0), "n"(0x900 + X));
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#elif defined(__x86_64__)
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// INT3 + NOP DWORD ptr [EAX + X] to pass X to our signal handler, 5 bytes
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// total. The pointer is passed via rdi.
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// 0x40 is added as a safeguard, to help distinguish our trap from others and
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// to avoid 0 offsets in the command (otherwise it'll be reduced to a
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// different nop command, the three bytes one).
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asm volatile(
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"int3\n"
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"nopl %c0(%%rax)\n" ::"n"(0x40 + X),
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"D"(p));
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#else
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// FIXME: not always sigill.
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__builtin_trap();
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#endif
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// __builtin_unreachable();
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}
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// Version with access size which is not power of 2
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template <unsigned X>
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__attribute__((always_inline)) static void SigTrap(uptr p, uptr size) {
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#if defined(__aarch64__)
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register uptr x0 asm("x0") = p;
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register uptr x1 asm("x1") = size;
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asm("brk %2\n\t" ::"r"(x0), "r"(x1), "n"(0x900 + X));
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#elif defined(__x86_64__)
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// Size is stored in rsi.
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asm volatile(
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"int3\n"
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"nopl %c0(%%rax)\n" ::"n"(0x40 + X),
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"D"(p), "S"(size));
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#else
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__builtin_trap();
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#endif
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// __builtin_unreachable();
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}
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__attribute__((always_inline, nodebug)) static bool PossiblyShortTagMatches(
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tag_t mem_tag, uptr ptr, uptr sz) {
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tag_t ptr_tag = GetTagFromPointer(ptr);
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if (ptr_tag == mem_tag)
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return true;
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if (mem_tag >= kShadowAlignment)
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return false;
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if ((ptr & (kShadowAlignment - 1)) + sz > mem_tag)
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return false;
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#ifndef __aarch64__
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ptr = UntagAddr(ptr);
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#endif
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return *(u8 *)(ptr | (kShadowAlignment - 1)) == ptr_tag;
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}
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enum class ErrorAction { Abort, Recover };
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enum class AccessType { Load, Store };
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template <ErrorAction EA, AccessType AT, unsigned LogSize>
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__attribute__((always_inline, nodebug)) static void CheckAddress(uptr p) {
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if (!InTaggableRegion(p))
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return;
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2020-11-13 17:06:48 +01:00
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uptr ptr_raw = p & ~kAddressTagMask;
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tag_t mem_tag = *(tag_t *)MemToShadow(ptr_raw);
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if (UNLIKELY(!PossiblyShortTagMatches(mem_tag, p, 1 << LogSize))) {
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SigTrap<0x20 * (EA == ErrorAction::Recover) +
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0x10 * (AT == AccessType::Store) + LogSize>(p);
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if (EA == ErrorAction::Abort)
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__builtin_unreachable();
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}
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}
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template <ErrorAction EA, AccessType AT>
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__attribute__((always_inline, nodebug)) static void CheckAddressSized(uptr p,
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uptr sz) {
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2021-05-12 14:37:22 +02:00
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if (sz == 0 || !InTaggableRegion(p))
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2020-11-13 17:06:48 +01:00
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return;
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tag_t ptr_tag = GetTagFromPointer(p);
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uptr ptr_raw = p & ~kAddressTagMask;
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tag_t *shadow_first = (tag_t *)MemToShadow(ptr_raw);
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tag_t *shadow_last = (tag_t *)MemToShadow(ptr_raw + sz);
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for (tag_t *t = shadow_first; t < shadow_last; ++t)
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if (UNLIKELY(ptr_tag != *t)) {
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SigTrap<0x20 * (EA == ErrorAction::Recover) +
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0x10 * (AT == AccessType::Store) + 0xf>(p, sz);
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if (EA == ErrorAction::Abort)
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__builtin_unreachable();
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}
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uptr end = p + sz;
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uptr tail_sz = end & 0xf;
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if (UNLIKELY(tail_sz != 0 &&
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!PossiblyShortTagMatches(
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*shadow_last, end & ~(kShadowAlignment - 1), tail_sz))) {
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SigTrap<0x20 * (EA == ErrorAction::Recover) +
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0x10 * (AT == AccessType::Store) + 0xf>(p, sz);
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if (EA == ErrorAction::Abort)
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__builtin_unreachable();
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}
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}
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} // end namespace __hwasan
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#endif // HWASAN_CHECKS_H
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