2002-04-03 22:13:50 +02:00
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/*
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2021-01-04 10:26:59 +01:00
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* Copyright (C) 2001-2021 Free Software Foundation, Inc.
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2002-04-03 22:13:50 +02:00
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* Contributed by David S. Miller (davem@redhat.com)
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*
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* This file is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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2009-04-09 17:00:19 +02:00
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* Free Software Foundation; either version 3, or (at your option) any
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2002-04-03 22:13:50 +02:00
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* later version.
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*
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* This file is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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2009-04-09 17:00:19 +02:00
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* Under Section 7 of GPL version 3, you are granted additional
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* permissions described in the GCC Runtime Library Exception, version
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* 3.1, as published by the Free Software Foundation.
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*
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* You should have received a copy of the GNU General Public License and
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* a copy of the GCC Runtime Library Exception along with this program;
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* see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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* <http://www.gnu.org/licenses/>.
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2002-04-03 22:13:50 +02:00
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*/
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#define FPRS_NS (1 << 22) /* Non-Standard fpu results */
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static void __attribute__((constructor))
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set_fast_math (void)
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{
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2002-04-04 01:48:39 +02:00
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unsigned int fsr;
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2002-04-03 22:13:50 +02:00
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/* This works for the 64-bit case because, even if 32-bit ld/st of
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the fsr register modified the upper 32-bit, the only thing up there
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are the 3 other condition codes which are "do not care" at the time
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that this runs. */
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__asm__("st %%fsr, %0"
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: "=m" (fsr));
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fsr |= FPRS_NS;
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__asm__("ld %0, %%fsr"
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: : "m" (fsr));
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}
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