S/390: Load and test peephole.

gcc/ChangeLog:

2017-04-25  Dominik Vogt  <vogt@linux.vnet.ibm.com>

	Backport from mainline
	2017-04-25  Dominik Vogt  <vogt@linux.vnet.ibm.com>

        * config/s390/s390.md (define_peephole2): New peephole to help
        combining the load-and-test pattern with volatile memory.

From-SVN: r247188
This commit is contained in:
Dominik Vogt 2017-04-25 11:08:06 +00:00 committed by Andreas Krebbel
parent 16fce46b16
commit 009c145997
2 changed files with 24 additions and 0 deletions

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@ -6,6 +6,15 @@
* config/s390/s390.md (define_peephole2): New peephole to help
combining the load-and-test pattern with volatile memory.
2017-04-25 Dominik Vogt <vogt@linux.vnet.ibm.com>
Backport from mainline
2017-04-25 Dominik Vogt <vogt@linux.vnet.ibm.com>
* config/s390/s390.md ("cstorecc4"): Use load-on-condition and deal
with CCZmode for TARGET_Z196.
2017-04-25 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/80501

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@ -907,6 +907,21 @@
[(set_attr "op_type" "RR<E>,RXY")
(set_attr "z10prop" "z10_fr_E1,z10_fwd_A3") ])
; Peephole to combine a load-and-test from volatile memory which combine does
; not do.
(define_peephole2
[(set (match_operand:GPR 0 "register_operand")
(match_operand:GPR 2 "memory_operand"))
(set (reg CC_REGNUM)
(compare (match_dup 0) (match_operand:GPR 1 "const0_operand")))]
"s390_match_ccmode(insn, CCSmode) && TARGET_EXTIMM
&& GENERAL_REG_P (operands[0])
&& satisfies_constraint_T (operands[2])"
[(parallel
[(set (reg:CCS CC_REGNUM)
(compare:CCS (match_dup 2) (match_dup 1)))
(set (match_dup 0) (match_dup 2))])])
; ltr, lt, ltgr, ltg
(define_insn "*tst<mode>_cconly_extimm"
[(set (reg CC_REGNUM)