reg-stack.c (convert_regs_entry, [...]): Delete prototypes.
* reg-stack.c (convert_regs_entry, convert_regs_exit, convert_regs_1, convert_regs_2, convert_regs): Delete prototypes. (reg_to_stack): Move to end of the file. Initialize the per basic block information here, instead of... (convert_regs_entry): Here. (convert_regs): Change unused return type to void. From-SVN: r100238
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6f43e0a201
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00b9ce5c19
@ -1,3 +1,12 @@
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2005-05-26 Roger Sayle <roger@eyesopen.com>
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* reg-stack.c (convert_regs_entry, convert_regs_exit,
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convert_regs_1, convert_regs_2, convert_regs): Delete prototypes.
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(reg_to_stack): Move to end of the file. Initialize the per
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basic block information here, instead of...
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(convert_regs_entry): Here.
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(convert_regs): Change unused return type to void.
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2005-05-27 Kazu Hirata <kazu@cs.umass.edu>
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* c-pch.c, timevar.c, timevar.h, unwind-compat.c,
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229
gcc/reg-stack.c
229
gcc/reg-stack.c
@ -259,11 +259,6 @@ static bool subst_stack_regs_pat (rtx, stack, rtx);
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static void subst_asm_stack_regs (rtx, stack);
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static bool subst_stack_regs (rtx, stack);
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static void change_stack (rtx, stack, stack, enum emit_where);
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static int convert_regs_entry (void);
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static void convert_regs_exit (void);
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static int convert_regs_1 (FILE *, basic_block);
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static int convert_regs_2 (FILE *, basic_block);
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static int convert_regs (FILE *);
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static void print_stack (FILE *, stack);
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static rtx next_flags_user (rtx);
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static bool compensate_edge (edge, FILE *);
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@ -397,101 +392,6 @@ pop_stack (stack regstack, int regno)
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}
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}
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}
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/* Convert register usage from "flat" register file usage to a "stack
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register file. FILE is the dump file, if used.
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Construct a CFG and run life analysis. Then convert each insn one
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by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
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code duplication created when the converter inserts pop insns on
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the edges. */
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bool
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reg_to_stack (FILE *file)
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{
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basic_block bb;
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int i;
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int max_uid;
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/* Clean up previous run. */
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stack_regs_mentioned_data = 0;
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/* See if there is something to do. Flow analysis is quite
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expensive so we might save some compilation time. */
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for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
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if (regs_ever_live[i])
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break;
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if (i > LAST_STACK_REG)
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return false;
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/* Ok, floating point instructions exist. If not optimizing,
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build the CFG and run life analysis.
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Also need to rebuild life when superblock scheduling is done
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as it don't update liveness yet. */
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if (!optimize
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|| (flag_sched2_use_superblocks
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&& flag_schedule_insns_after_reload))
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{
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count_or_remove_death_notes (NULL, 1);
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life_analysis (file, PROP_DEATH_NOTES);
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}
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mark_dfs_back_edges ();
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/* Set up block info for each basic block. */
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alloc_aux_for_blocks (sizeof (struct block_info_def));
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FOR_EACH_BB_REVERSE (bb)
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{
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edge e;
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edge_iterator ei;
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FOR_EACH_EDGE (e, ei, bb->preds)
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if (!(e->flags & EDGE_DFS_BACK)
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&& e->src != ENTRY_BLOCK_PTR)
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BLOCK_INFO (bb)->predecessors++;
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}
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/* Create the replacement registers up front. */
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for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
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{
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enum machine_mode mode;
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for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
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mode != VOIDmode;
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mode = GET_MODE_WIDER_MODE (mode))
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FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
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for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
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mode != VOIDmode;
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mode = GET_MODE_WIDER_MODE (mode))
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FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
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}
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ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
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/* A QNaN for initializing uninitialized variables.
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??? We can't load from constant memory in PIC mode, because
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we're inserting these instructions before the prologue and
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the PIC register hasn't been set up. In that case, fall back
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on zero, which we can get from `ldz'. */
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if (flag_pic)
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not_a_num = CONST0_RTX (SFmode);
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else
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{
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not_a_num = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
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not_a_num = force_const_mem (SFmode, not_a_num);
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}
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/* Allocate a cache for stack_regs_mentioned. */
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max_uid = get_max_uid ();
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VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
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"stack_regs_mentioned cache");
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convert_regs (file);
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free_aux_for_blocks ();
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return true;
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}
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/* Return a pointer to the REG expression within PAT. If PAT is not a
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REG, possible enclosed by a conversion rtx, return the inner part of
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@ -2608,25 +2508,6 @@ convert_regs_entry (void)
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int inserted = 0;
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edge e;
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edge_iterator ei;
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basic_block block;
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FOR_EACH_BB_REVERSE (block)
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{
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block_info bi = BLOCK_INFO (block);
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int reg;
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/* Set current register status at last instruction `uninitialized'. */
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bi->stack_in.top = -2;
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/* Copy live_at_end and live_at_start into temporaries. */
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for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
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{
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if (REGNO_REG_SET_P (block->global_live_at_end, reg))
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SET_HARD_REG_BIT (bi->out_reg_set, reg);
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if (REGNO_REG_SET_P (block->global_live_at_start, reg))
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SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
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}
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}
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/* Load something into each stack register live at function entry.
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Such live registers can be caused by uninitialized variables or
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@ -3082,7 +2963,7 @@ convert_regs_2 (FILE *file, basic_block block)
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references in each insn from the "flat" register file that gcc uses,
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to the stack-like registers the 387 uses. */
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static int
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static void
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convert_regs (FILE *file)
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{
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int inserted;
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@ -3122,8 +3003,114 @@ convert_regs (FILE *file)
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if (file)
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fputc ('\n', file);
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}
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/* Convert register usage from "flat" register file usage to a "stack
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register file. FILE is the dump file, if used.
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return inserted;
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Construct a CFG and run life analysis. Then convert each insn one
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by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
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code duplication created when the converter inserts pop insns on
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the edges. */
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bool
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reg_to_stack (FILE *file)
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{
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basic_block bb;
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int i;
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int max_uid;
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/* Clean up previous run. */
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stack_regs_mentioned_data = 0;
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/* See if there is something to do. Flow analysis is quite
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expensive so we might save some compilation time. */
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for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
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if (regs_ever_live[i])
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break;
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if (i > LAST_STACK_REG)
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return false;
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/* Ok, floating point instructions exist. If not optimizing,
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build the CFG and run life analysis.
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Also need to rebuild life when superblock scheduling is done
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as it don't update liveness yet. */
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if (!optimize
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|| (flag_sched2_use_superblocks
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&& flag_schedule_insns_after_reload))
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{
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count_or_remove_death_notes (NULL, 1);
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life_analysis (file, PROP_DEATH_NOTES);
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}
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mark_dfs_back_edges ();
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/* Set up block info for each basic block. */
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alloc_aux_for_blocks (sizeof (struct block_info_def));
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FOR_EACH_BB_REVERSE (bb)
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{
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block_info bi = BLOCK_INFO (bb);
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edge_iterator ei;
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edge e;
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int reg;
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FOR_EACH_EDGE (e, ei, bb->preds)
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if (!(e->flags & EDGE_DFS_BACK)
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&& e->src != ENTRY_BLOCK_PTR)
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bi->predecessors++;
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/* Set current register status at last instruction `uninitialized'. */
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bi->stack_in.top = -2;
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/* Copy live_at_end and live_at_start into temporaries. */
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for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
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{
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if (REGNO_REG_SET_P (bb->global_live_at_end, reg))
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SET_HARD_REG_BIT (bi->out_reg_set, reg);
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if (REGNO_REG_SET_P (bb->global_live_at_start, reg))
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SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
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}
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}
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/* Create the replacement registers up front. */
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for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
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{
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enum machine_mode mode;
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for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
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mode != VOIDmode;
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mode = GET_MODE_WIDER_MODE (mode))
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FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
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for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
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mode != VOIDmode;
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mode = GET_MODE_WIDER_MODE (mode))
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FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
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}
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ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
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/* A QNaN for initializing uninitialized variables.
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??? We can't load from constant memory in PIC mode, because
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we're inserting these instructions before the prologue and
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the PIC register hasn't been set up. In that case, fall back
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on zero, which we can get from `ldz'. */
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if (flag_pic)
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not_a_num = CONST0_RTX (SFmode);
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else
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{
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not_a_num = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
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not_a_num = force_const_mem (SFmode, not_a_num);
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}
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/* Allocate a cache for stack_regs_mentioned. */
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max_uid = get_max_uid ();
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VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
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"stack_regs_mentioned cache");
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convert_regs (file);
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free_aux_for_blocks ();
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return true;
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}
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#endif /* STACK_REGS */
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