s390-modes.def: Added cc modes documentation.
2004-11-30 Andreas Krebbel <krebbel1@de.ibm.com> * config/s390/s390-modes.def: Added cc modes documentation. * config/s390/s390.c: (s390_tm_ccmode, s390_select_ccmode, s390_expand_addcc): Added cc mode comments. * config/s390/s390.md: Removed old cc mode documentation. From-SVN: r91528
This commit is contained in:
Andreas Krebbel
Ulrich Weigand
parent
017e0eb94d
commit
00bda9206b
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@ -1,3 +1,10 @@
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2004-11-30 Andreas Krebbel <krebbel1@de.ibm.com>
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* config/s390/s390-modes.def: Added cc modes documentation.
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* config/s390/s390.c: (s390_tm_ccmode, s390_select_ccmode,
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s390_expand_addcc): Added cc mode comments.
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* config/s390/s390.md: Removed old cc mode documentation.
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2004-11-30 Mark Dettinger <dettinge@de.ibm.com>
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* config/s390/s390.c (struct processor_costs): New data type.
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@ -25,6 +25,127 @@ INT_MODE (OI, 32);
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/* Add any extra modes needed to represent the condition code. */
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/*
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Condition Codes
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Check for zero
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CCZ: EQ NE NE NE
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Unsigned compares
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CCU: EQ LTU GTU NE (CLG/R, CL/R/Y, CLM/Y, CLI/Y)
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CCUR: EQ GTU LTU NE (CLGF/R)
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Signed compares
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CCS: EQ LT GT UNORDERED (LTGFR, LTGR, LTR, ICM/Y,
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LTDBR, LTDR, LTEBR, LTER,
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CG/R, C/R/Y, CGHI, CHI,
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CDB/R, CD/R, CEB/R, CE/R,
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ADB/R, AEB/R, SDB/R, SEB/R,
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SRAG, SRA, SRDA)
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CCSR: EQ GT LT UNORDERED (CGF/R, CH/Y)
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Condition codes resulting from add with overflow
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CCA: EQ LT GT Overflow
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CCAP: EQ LT GT LT (AGHI, AHI)
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CCAN: EQ LT GT GT (AGHI, AHI)
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Condition codes of unsigned adds and subs
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CCL: EQ NE EQ NE (ALGF/R, ALG/R, AL/R/Y,
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ALCG/R, ALC/R,
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SLGF/R, SLG/R, SL/R/Y,
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SLBG/R, SLB/R)
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CCL1: GEU GEU LTU LTU (ALG/R, AL/R/Y)
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CCL2: GTU GTU LEU LEU (SLG/R, SL/R/Y)
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CCL3: EQ LTU EQ GTU (SLG/R, SL/R/Y)
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Test under mask checks
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CCT: EQ NE NE NE (ICM/Y, TML, CG/R, CGHI,
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C/R/Y, CHI, NG/R, N/R/Y,
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OG/R, O/R/Y, XG/R, X/R/Y)
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CCT1: NE EQ NE NE (TMH, TML)
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CCT2: NE NE EQ NE (TMH, TML)
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CCT3: NE NE NE EQ (TMH, TML)
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CCA and CCT modes are request only modes. These modes are never returned by
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s390_select_cc_mode. They are only intended to match other modes.
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Requested mode -> Destination CC register mode
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CCS, CCU, CCT, CCSR, CCUR -> CCZ
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CCA -> CCAP, CCAN
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*** Comments ***
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CCAP, CCAN
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The CC obtained from add instruction usually can't be used for comparisons
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because its coupling with overflow flag. In case of an overflow the
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less than/greater than data are lost. Nevertheless a comparison can be done
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whenever immediate values are involved because they are known at compile time.
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If you know whether the used constant is positive or negative you can predict
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the sign of the result even in case of an overflow.
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CCT, CCT1, CCT2, CCT3
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If bits of an integer masked with an AND instruction are checked, the test under
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mask instructions turn out to be very handy for a set of special cases.
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The simple cases are checks whether all masked bits are zero or ones:
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int a;
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if ((a & (16 + 128)) == 0) -> CCT/CCZ
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if ((a & (16 + 128)) == 16 + 128) -> CCT3
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Using two extra modes makes it possible to do complete checks on two bits of an
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integer (This is possible on register operands only. TM does not provide the
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information necessary for CCT1 and CCT2 modes.):
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int a;
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if ((a & (16 + 128)) == 16) -> CCT1
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if ((a & (16 + 128)) == 128) -> CCT2
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CCSR, CCUR
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There are several instructions comparing 32 bit with 64 bit unsigned/signed
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values. Such instructions can be considered to have a builtin zero/sign_extend.
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The problem is that in the RTL (to be canonical) the zero/sign extended operand
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has to be the first one but the machine instructions like it the other way
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around. The following both modes can be considered as CCS and CCU modes with
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exchanged operands.
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CCL1, CCL2
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These modes represent the result of overflow checks.
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if (a + b < a) -> CCL1 state of the carry bit (CC2 | CC3)
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if (a - b > a) -> CCL2 state of the borrow bit (CC0 | CC1)
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They are used when multi word numbers are computed dealing one SImode part after
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another or whenever manual overflow checks like the examples above are
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compiled.
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CCL3
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A logical subtract instruction sets the borrow bit in case of an overflow.
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The resulting condition code of those instructions is represented by the
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CCL3 mode. Together with the CCU mode this mode is used for jumpless
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implementations of several if-constructs - see s390_expand_addcc for more
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details.
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*/
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CC_MODE (CCZ);
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CC_MODE (CCA);
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CC_MODE (CCAP);
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@ -472,15 +472,20 @@ s390_tm_ccmode (rtx op1, rtx op2, int mixed)
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if (GET_CODE (op1) != CONST_INT || GET_CODE (op2) != CONST_INT)
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return VOIDmode;
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/* Selected bits all zero: CC0. */
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/* Selected bits all zero: CC0.
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e.g.: int a; if ((a & (16 + 128)) == 0) */
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if (INTVAL (op2) == 0)
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return CCTmode;
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/* Selected bits all one: CC3. */
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/* Selected bits all one: CC3.
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e.g.: int a; if ((a & (16 + 128)) == 16 + 128) */
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if (INTVAL (op2) == INTVAL (op1))
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return CCT3mode;
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/* Exactly two bits selected, mixed zeroes and ones: CC1 or CC2. */
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/* Exactly two bits selected, mixed zeroes and ones: CC1 or CC2. e.g.:
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int a;
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if ((a & (16 + 128)) == 16) -> CCT1
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if ((a & (16 + 128)) == 128) -> CCT2 */
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if (mixed)
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{
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bit1 = exact_log2 (INTVAL (op2));
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@ -542,9 +547,19 @@ s390_select_ccmode (enum rtx_code code, rtx op0, rtx op1)
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case LT:
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case GE:
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case GT:
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/* The only overflow condition of NEG and ABS happens when
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-INT_MAX is used as parameter, which stays negative. So
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we have an overflow from a positive value to a negative.
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Using CCAP mode the resulting cc can be used for comparisons. */
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if ((GET_CODE (op0) == NEG || GET_CODE (op0) == ABS)
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&& GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
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return CCAPmode;
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/* If constants are involved in an add instruction it is possible to use
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the resulting cc for comparisons with zero. Knowing the sign of the
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constant the overflow behaviour gets predictable. e.g.:
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int a, b; if ((b = a + c) > 0)
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with c as a constant value: c < 0 -> CCAN and c >= 0 -> CCAP */
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if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
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&& CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
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{
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@ -3772,7 +3787,21 @@ s390_expand_cmpmem (rtx target, rtx op0, rtx op1, rtx len)
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/* Expand conditional increment or decrement using alc/slb instructions.
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Should generate code setting DST to either SRC or SRC + INCREMENT,
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depending on the result of the comparison CMP_OP0 CMP_CODE CMP_OP1.
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Returns true if successful, false otherwise. */
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Returns true if successful, false otherwise.
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That makes it possible to implement some if-constructs without jumps e.g.:
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(borrow = CC0 | CC1 and carry = CC2 | CC3)
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unsigned int a, b, c;
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if (a < b) c++; -> CCU b > a -> CC2; c += carry;
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if (a < b) c--; -> CCL3 a - b -> borrow; c -= borrow;
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if (a <= b) c++; -> CCL3 b - a -> borrow; c += carry;
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if (a <= b) c--; -> CCU a <= b -> borrow; c -= borrow;
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Checks for EQ and NE with a nonzero value need an additional xor e.g.:
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if (a == b) c++; -> CCL3 a ^= b; 0 - a -> borrow; c += carry;
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if (a == b) c--; -> CCU a ^= b; a <= 0 -> CC0 | CC1; c -= borrow;
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if (a != b) c++; -> CCU a ^= b; a > 0 -> CC2; c += carry;
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if (a != b) c--; -> CCL3 a ^= b; 0 - a -> borrow; c -= borrow; */
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bool
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s390_expand_addcc (enum rtx_code cmp_code, rtx cmp_op0, rtx cmp_op1,
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@ -228,25 +228,6 @@
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;; Pipeline description for z990.
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(include "2084.md")
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;;
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;; Condition Codes
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;;
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;
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; CCL: Zero Nonzero Zero Nonzero (AL, ALR, SL, SLR, N, NC, NI, NR, O, OC, OI, OR, X, XC, XI, XR)
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; CCA: Zero <Zero >Zero Overflow (A, AR, AH, AHI, S, SR, SH, SHI, LTR, LCR, LNR, LPR, SLA, SLDA, SLA, SRDA)
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; CCU: Equal ULess UGreater -- (CL, CLR, CLI, CLM)
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; CCS: Equal SLess SGreater -- (C, CR, CH, CHI, ICM)
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; CCT: Zero Mixed Mixed Ones (TM, TMH, TML)
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; CCZ -> CCL / CCZ1
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; CCZ1 -> CCA/CCU/CCS/CCT
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; CCS -> CCA
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; String: CLC, CLCL, CLCLE, CLST, CUSE, MVCL, MVCLE, MVPG, MVST, SRST
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; Clobber: CKSM, CFC, CS, CDS, CUUTF, CUTFU, PLO, SPM, STCK, STCKE, TS, TRT, TRE, UPT
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;;
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;;- Compare instructions.
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;;
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