From 015e8b63f414805a0dc670d43c15a6a352b74079 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Mon, 31 Oct 2011 22:09:12 +0000 Subject: [PATCH] Allow zero operand in sparc VIS3 cmask patterns. * config/sparc/sparc.md (cmask patterns): Allow zero operand. From-SVN: r180715 --- gcc/ChangeLog | 2 ++ gcc/config/sparc/sparc.md | 6 +++--- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4848147bf62..ebf8cdc0e58 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,7 @@ 2011-10-31 David S. Miller + * config/sparc/sparc.md (cmask patterns): Allow zero operand. + * dwarf2out.c (cached_next_real_insn): New. (dwarf2out_end_epilogue): Set it to NULL_RTX. (dwarf2out_var_location): Remove cached_next_real_insn local static. diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index 6dd390952c3..fbd1a871921 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -8452,7 +8452,7 @@ ;; Conditional moves are possible via fcmpX --> cmaskX -> bshuffle (define_insn "cmask8_vis" [(set (reg:DI GSR_REG) - (unspec:DI [(match_operand:P 0 "register_operand" "r") + (unspec:DI [(match_operand:P 0 "register_or_zero_operand" "rJ") (reg:DI GSR_REG)] UNSPEC_CMASK8))] "TARGET_VIS3" @@ -8460,7 +8460,7 @@ (define_insn "cmask16_vis" [(set (reg:DI GSR_REG) - (unspec:DI [(match_operand:P 0 "register_operand" "r") + (unspec:DI [(match_operand:P 0 "register_or_zero_operand" "rJ") (reg:DI GSR_REG)] UNSPEC_CMASK16))] "TARGET_VIS3" @@ -8468,7 +8468,7 @@ (define_insn "cmask32_vis" [(set (reg:DI GSR_REG) - (unspec:DI [(match_operand:P 0 "register_operand" "r") + (unspec:DI [(match_operand:P 0 "register_or_zero_operand" "rJ") (reg:DI GSR_REG)] UNSPEC_CMASK32))] "TARGET_VIS3"