pr36141.c: Move to ...

* gcc.c-torture/pr36141.c: Move to ...
	* gcc.c-torture/compile/pr36141.c: ... here.
	* gcc.dg/arm-g2.c: Move to ...
	* gcc.target/arm/g2.c: ... here.
	* gcc.dg/arm-vfp1.c: Move to ...
	* gcc.target/arm/vfp1.c: ... here.
	* gcc.dg/20031108-1: Move to ...
	* gcc.target/arm/20031108-1.c: ... here.
	* gcc.dg/20030909-1: Move to ...
	* gcc.target/arm/20030909-1.c: ... here.
	* gcc.dg/arm-mmx-1.c: Move to ...
	* gcc.target/arm/mmx-1.c: ... here.
	* gcc.dg/arm-scd[123].c: Move to ...
	* gcc.target/arm/scd[123].c: ... here.
	* gcc.dg/arm-asm.c: Move to ...
	* gcc.target/arm/asm.c: ... here.
	* gcc.dg/20080410-1: Move to ...
	* gcc.target/sh/20080410-1.c: ... here.
	* gcc.dg/globalreg-1.c: Move to ...
	* gcc.target/sparc/globalreg-1.c: ... here.

From-SVN: r140340

gcc/testsuite/ChangeLog

@@ -1,3 +1,26 @@
+2008-09-13  Uros Bizjak  <ubizjak@gmail.com>
+
+	* gcc.c-torture/pr36141.c: Move to ...
+	* gcc.c-torture/compile/pr36141.c: ... here.
+	* gcc.dg/arm-g2.c: Move to ...
+	* gcc.target/arm/g2.c: ... here.
+	* gcc.dg/arm-vfp1.c: Move to ...
+	* gcc.target/arm/vfp1.c: ... here.
+	* gcc.dg/20031108-1: Move to ...
+	* gcc.target/arm/20031108-1.c: ... here.
+	* gcc.dg/20030909-1: Move to ...
+	* gcc.target/arm/20030909-1.c: ... here.
+	* gcc.dg/arm-mmx-1.c: Move to ...
+	* gcc.target/arm/mmx-1.c: ... here.
+	* gcc.dg/arm-scd[123].c: Move to ...
+	* gcc.target/arm/scd[123].c: ... here.
+	* gcc.dg/arm-asm.c: Move to ...
+	* gcc.target/arm/asm.c: ... here.
+	* gcc.dg/20080410-1: Move to ...
+	* gcc.target/sh/20080410-1.c: ... here.
+	* gcc.dg/globalreg-1.c: Move to ...
+	* gcc.target/sparc/globalreg-1.c: ... here.
+
 2008-09-13  Daniel Kraft  <d@domob.eu>
 
 	PR fortran/35770

gcc/testsuite/gcc.target/arm/20030909-1.c

@@ -1,5 +1,5 @@
 /* Verify that ands are combined.  */
-/* { dg-do compile { target arm*-*-* } } */
+/* { dg-do compile } */
 /* { dg-options "-O" } */
 /* { dg-final { scan-assembler-not "#255.*#255" } } */
 int f(int a, int b) { return ((a & 0xff) + (b & 0xff)) & 0xff; }

gcc/testsuite/gcc.target/arm/20031108-1.c

@@ -1,5 +1,5 @@
 /* PR optimization/10467  */
-/* { dg-do compile { target arm*-*-* } } */
+/* { dg-do compile } */
 /* { dg-options "-O2 -mthumb" } */
 
 typedef enum {Ident_1} Enumeration;

gcc/testsuite/gcc.target/arm/20051215-1.c

@@ -1,7 +1,7 @@
 /* ARM's load-and-call patterns used to allow automodified addresses.
    This was wrong, because if the modified register were spilled,
    the call would need an output reload.  */
-/* { dg-do run { target arm*-*-* } } */
+/* { dg-do run } */
 /* { dg-options "-O2 -fno-omit-frame-pointer" } */
 extern void abort (void);
 typedef void (*callback) (void);

gcc/testsuite/gcc.target/arm/asm.c

@@ -1,6 +1,6 @@
 /* ARM and Thumb asm statements should be able to access the constant
    pool.  */
-/* { dg-do compile { target arm*-*-* } } */
+/* { dg-do compile } */
 extern unsigned x[];
 unsigned *trapTable()
 {

gcc/testsuite/gcc.target/arm/scd42-1.c

@@ -1,5 +1,5 @@
 /* Verify that mov is preferred on XScale for loading a 1 byte constant. */
-/* { dg-do compile { target arm*-*-* } } */
+/* { dg-do compile } */
 /* { dg-options "-mcpu=xscale -O" } */
 
 unsigned load1(void) __attribute__ ((naked));

gcc/testsuite/gcc.target/arm/scd42-3.c

@@ -1,5 +1,5 @@
 /* Verify that ldr is preferred on XScale for loading a 3 or 4 byte constant. */
-/* { dg-do compile { target arm*-*-* } } */
+/* { dg-do compile } */
 /* { dg-options "-mcpu=xscale -O" } */
 
 unsigned load4(void) __attribute__ ((naked));

gcc/testsuite/gcc.target/sparc/globalreg-1.c

@@ -1,4 +1,4 @@
-/* { dg-do run { target sparc*-*-* } } */
+/* { dg-do run } */
 /* { dg-options "-std=gnu99 -Os" } */
 
 /* This is a massively distilled test case based upon