From 03ed2915c2a82c3b03966716bca4380ede36d33c Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Tue, 11 Jul 2017 00:01:06 +0200 Subject: [PATCH] re PR target/81375 (unrecognizable insn) PR target/81375 * config/i386/i386.md (divsf3): Add TARGET_SSE to TARGET_SSE_MATH. (rcpps): Ditto. (*rsqrtsf2_sse): Ditto. (rsqrtsf2): Ditto. (div3): Macroize insn from divdf3 and divsf3 using MODEF mode iterator. testsuite/ChangeLog: PR target/81375 * gcc.target/i386/pr81375.c: New test. From-SVN: r250107 --- gcc/ChangeLog | 10 ++++++++ gcc/config/i386/i386.md | 32 ++++++++++--------------- gcc/testsuite/ChangeLog | 10 ++++---- gcc/testsuite/gcc.target/i386/pr81375.c | 8 +++++++ 4 files changed, 36 insertions(+), 24 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr81375.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1e671dba476..908e8cad3e8 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2017-07-10 Uros Bizjak + + PR target/81375 + * config/i386/i386.md (divsf3): Add TARGET_SSE to TARGET_SSE_MATH. + (rcpps): Ditto. + (*rsqrtsf2_sse): Ditto. + (rsqrtsf2): Ditto. + (div3): Macroize insn from divdf3 and divsf3 + using MODEF mode iterator. + 2017-07-10 Martin Sebor PR tree-optimization/80397 diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index da0f7c256af..4018e6746b6 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -5504,7 +5504,7 @@ (define_expand "floatunsdisf2" [(use (match_operand:SF 0 "register_operand")) (use (match_operand:DI 1 "nonimmediate_operand"))] - "TARGET_64BIT && TARGET_SSE_MATH" + "TARGET_64BIT && TARGET_SSE && TARGET_SSE_MATH" "x86_emit_floatuns (operands); DONE;") (define_expand "floatunsdidf2" @@ -7545,21 +7545,15 @@ (match_operand:XF 2 "register_operand")))] "TARGET_80387") -(define_expand "divdf3" - [(set (match_operand:DF 0 "register_operand") - (div:DF (match_operand:DF 1 "register_operand") - (match_operand:DF 2 "nonimmediate_operand")))] - "(TARGET_80387 && X87_ENABLE_ARITH (DFmode)) - || (TARGET_SSE2 && TARGET_SSE_MATH)") - -(define_expand "divsf3" - [(set (match_operand:SF 0 "register_operand") - (div:SF (match_operand:SF 1 "register_operand") - (match_operand:SF 2 "nonimmediate_operand")))] - "(TARGET_80387 && X87_ENABLE_ARITH (SFmode)) - || TARGET_SSE_MATH" +(define_expand "div3" + [(set (match_operand:MODEF 0 "register_operand") + (div:MODEF (match_operand:MODEF 1 "register_operand") + (match_operand:MODEF 2 "nonimmediate_operand")))] + "(TARGET_80387 && X87_ENABLE_ARITH (mode)) + || (SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH)" { - if (TARGET_SSE_MATH + if (mode == SFmode + && TARGET_SSE && TARGET_SSE_MATH && TARGET_RECIP_DIV && optimize_insn_for_speed_p () && flag_finite_math_only && !flag_trapping_math @@ -14050,7 +14044,7 @@ [(set (match_operand:SF 0 "register_operand" "=x") (unspec:SF [(match_operand:SF 1 "nonimmediate_operand" "xm")] UNSPEC_RCP))] - "TARGET_SSE_MATH" + "TARGET_SSE && TARGET_SSE_MATH" "%vrcpss\t{%1, %d0|%d0, %1}" [(set_attr "type" "sse") (set_attr "atom_sse_attr" "rcp") @@ -14352,7 +14346,7 @@ [(set (match_operand:SF 0 "register_operand" "=x") (unspec:SF [(match_operand:SF 1 "nonimmediate_operand" "xm")] UNSPEC_RSQRT))] - "TARGET_SSE_MATH" + "TARGET_SSE && TARGET_SSE_MATH" "%vrsqrtss\t{%1, %d0|%d0, %1}" [(set_attr "type" "sse") (set_attr "atom_sse_attr" "rcp") @@ -14364,7 +14358,7 @@ [(set (match_operand:SF 0 "register_operand") (unspec:SF [(match_operand:SF 1 "nonimmediate_operand")] UNSPEC_RSQRT))] - "TARGET_SSE_MATH" + "TARGET_SSE && TARGET_SSE_MATH" { ix86_emit_swsqrtsf (operands[0], operands[1], SFmode, 1); DONE; @@ -14393,7 +14387,7 @@ || (SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH)" { if (mode == SFmode - && TARGET_SSE_MATH + && TARGET_SSE && TARGET_SSE_MATH && TARGET_RECIP_SQRT && !optimize_function_for_size_p (cfun) && flag_finite_math_only && !flag_trapping_math diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index f3b325c9f8d..f6dec47d048 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,12 +1,12 @@ +2017-07-10 Uros Bizjak + + PR target/81375 + * gcc.target/i386/pr81375.c: New test. + 2017-07-10 Martin Sebor PR tree-optimization/80397 * gcc.dg/tree-ssa/builtin-sprintf-warn-17.c: New test. -diff --git a/gcc/gimple-ssa-sprintf.c b/gcc/gimple-ssa-sprintf.c -index 2e62086..d63d5be 100644 ---- a/gcc/gimple-ssa-sprintf.c -+++ b/gcc/gimple-ssa-sprintf.c -@@ -1249,7 +1249,7 @@ format_integer (const directive &dir, tree arg) 2017-07-10 Martin Sebor diff --git a/gcc/testsuite/gcc.target/i386/pr81375.c b/gcc/testsuite/gcc.target/i386/pr81375.c new file mode 100644 index 00000000000..256a79df719 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr81375.c @@ -0,0 +1,8 @@ +/* PR target/81375 */ +/* { dg-do compile { target ia32 } } */ +/* { dg-options "-mno-80387 -mno-sse -mfpmath=sse" } */ + +float foo (float a, float b) +{ + return a / b; +}