OpenE2K
/
gcc
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

MSP430: Dont add offsets to addresses when emitting asm for post_inc 

Some insns, which operate on SImode operands, output assembler template
that comprise of multiple instructions using HImode operands. To access
the high word of an SImode operand, an operand selector '%H' is used to
offset the operand value by a constant amount.

When one of these HImode operands is a memory reference to a post_inc,
the address does not need to be offset, since the preceding instruction
has already offset the address to the correct value.

This fixes an ICE in change_address_1, at emit-rtl.c:2318 for
gcc.c-torture/execute/pr20527-1.c in the "-mlarge -O2 -flto
-fuse-linker-plugin -fno-fat-lto-objects" configuration.

This test generated the following insn, and the attempt to output the
high part of the post_inc address caused the ICE.
(set (reg:SI 6 R6)
     (minus:SI (reg:SI 6 R6)
               (mem:SI (post_inc:PSI (reg:PSI 10 R10)) {subsi3}

gcc/ChangeLog:

2020-04-13  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
	memory references in %B, %C and %D operand selectors when the inner
	operand is a post increment address.
This commit is contained in:
Jozef Lawrynowicz 2020-04-10 17:31:33 +01:00
parent 14f27ee6c9
commit 04637536a6
2 changed files with 13 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
gcc/ChangeLog
View File

@ -1,3 +1,9 @@
2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
memory references in %B, %C and %D operand selectors when the inner
operand is a post increment address.
2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* config/msp430/msp430.c (msp430_print_operand): Offset a %C memory

10
gcc/config/msp430/msp430.c
View File

@ -3474,7 +3474,9 @@ msp430_print_operand (FILE * file, rtx op, int letter)
switch (GET_CODE (op))
{
case MEM:
op = adjust_address (op, Pmode, 2);
/* We don't need to adjust the address for post_inc. */
op = adjust_address (op, Pmode,
(GET_CODE (XEXP (op, 0)) == POST_INC) ? 0 : 2);
break;
case REG:
op = gen_rtx_REG (Pmode, REGNO (op) + 1);
@ -3492,7 +3494,8 @@ msp430_print_operand (FILE * file, rtx op, int letter)
switch (GET_CODE (op))
{
case MEM:
op = adjust_address (op, Pmode, 4);
op = adjust_address (op, Pmode,
(GET_CODE (XEXP (op, 0)) == POST_INC) ? 0 : 4);
break;
case REG:
op = gen_rtx_REG (Pmode, REGNO (op) + 2);
@ -3510,7 +3513,8 @@ msp430_print_operand (FILE * file, rtx op, int letter)
switch (GET_CODE (op))
{
case MEM:
op = adjust_address (op, Pmode, 6);
op = adjust_address (op, Pmode,
(GET_CODE (XEXP (op, 0)) == POST_INC) ? 0 : 6);
break;
case REG:
op = gen_rtx_REG (Pmode, REGNO (op) + 3);