* gcc.dg/ppc64-abi-2.c: New test.
From-SVN: r76212
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Hartmut Penner
Hartmut Penner
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04bf686df7
@ -1,3 +1,7 @@
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2004-01-20 Hartmut Penner <hpenner@de.ibm.com>
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* gcc.dg/ppc64-abi-2.c: New test.
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2004-01-18 James A. Morrison <ja2morri@uwaterloo.ca>
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* lib/treelang.exp: Fill out this file.
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405
gcc/testsuite/gcc.dg/ppc64-abi-2.c
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405
gcc/testsuite/gcc.dg/ppc64-abi-2.c
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@ -0,0 +1,405 @@
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/* { dg-do run { target powerpc64-*-linux* } } */
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/* { dg-options "-O2 -fprofile -mprofile-kernel -maltivec -mabi=altivec" } */
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#include <stdarg.h>
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#include <signal.h>
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#include <altivec.h>
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/* Testcase to check for ABI compliance of parameter passing
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for the PowerPC64 ABI. */
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void __attribute__((no_instrument_function))
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sig_ill_handler (int sig)
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{
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exit(0);
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}
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extern void abort (void);
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typedef struct
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{
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unsigned long gprs[8];
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double fprs[13];
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long pad;
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vector int vrs[12];
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} reg_parms_t;
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reg_parms_t gparms;
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/* _mcount call is done on Linux ppc64 early in the prologue.
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my_mcount will provide a entry point _mcount,
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which will save all register to gparms.
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Note that _mcount need to restore lr to original value,
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therefor use ctr to return.
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*/
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void __attribute__((no_instrument_function))
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my_mcount()
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{
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asm volatile (".type _mcount,@function\n\t"
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".globl _mcount\n\t"
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"_mcount:\n\t"
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"mflr 0\n\t"
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"mtctr 0\n\t"
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"ld 0,16(1)\n\t"
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"mtlr 0\n\t"
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"ld 11,gparms@got(2)\n\t"
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"std 3,0(11)\n\t"
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"std 4,8(11)\n\t"
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"std 5,16(11)\n\t"
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"std 6,24(11)\n\t"
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"std 7,32(11)\n\t"
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"std 8,40(11)\n\t"
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"std 9,48(11)\n\t"
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"std 10,56(11)\n\t"
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"stfd 1,64(11)\n\t"
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"stfd 2,72(11)\n\t"
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"stfd 3,80(11)\n\t"
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"stfd 4,88(11)\n\t"
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"stfd 5,96(11)\n\t"
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"stfd 6,104(11)\n\t"
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"stfd 7,112(11)\n\t"
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"stfd 8,120(11)\n\t"
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"stfd 9,128(11)\n\t"
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"stfd 10,136(11)\n\t"
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"stfd 11,144(11)\n\t"
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"stfd 12,152(11)\n\t"
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"stfd 13,160(11)\n\t"
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"li 3,176\n\t"
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"stvx 2,3,11\n\t"
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"addi 3,3,16\n\t"
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"stvx 3,3,11\n\t"
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"addi 3,3,16\n\t"
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"stvx 4,3,11\n\t"
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"addi 3,3,16\n\t"
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"stvx 5,3,11\n\t"
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"addi 3,3,16\n\t"
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"stvx 6,3,11\n\t"
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"addi 3,3,16\n\t"
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"stvx 7,3,11\n\t"
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"addi 3,3,16\n\t"
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"stvx 8,3,11\n\t"
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"addi 3,3,16\n\t"
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"stvx 9,3,11\n\t"
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"addi 3,3,16\n\t"
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"stvx 10,3,11\n\t"
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"addi 3,3,16\n\t"
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"stvx 11,3,11\n\t"
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"addi 3,3,16\n\t"
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"stvx 12,3,11\n\t"
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"addi 3,3,16\n\t"
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"stvx 13,3,11\n\t"
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"ld 3,0(11)\n\t"
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"bctr");
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}
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/* Stackframe structure relevant for parameter passing. */
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typedef union
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{
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double d;
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unsigned long l;
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unsigned int i[2];
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} parm_t;
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typedef struct sf
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{
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struct sf *backchain;
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long a1;
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long a2;
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long a3;
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long a4;
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long a5;
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parm_t slot[100];
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} stack_frame_t;
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typedef union
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{
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unsigned int i[4];
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unsigned long l[2];
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vector int v;
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} vector_int_t;
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/* Paramter passing.
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s : gpr 3
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v : vpr 2
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i : gpr 7
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*/
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void __attribute__ ((noinline))
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fcvi (char *s, vector int v, int i)
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{
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reg_parms_t lparms = gparms;
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if (s != (char *) lparms.gprs[0])
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abort();
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if (!vec_all_eq (v, lparms.vrs[0]))
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abort ();
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if ((long) i != lparms.gprs[4])
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abort();
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}
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/* Paramter passing.
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s : gpr 3
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v : vpr 2
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w : vpr 3
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*/
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void __attribute__ ((noinline))
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fcvv (char *s, vector int v, vector int w)
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{
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vector int a, c = {6, 8, 10, 12};
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reg_parms_t lparms = gparms;
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if (s != (char *) lparms.gprs[0])
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abort();
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if (!vec_all_eq (v, lparms.vrs[0]))
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abort ();
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if (!vec_all_eq (w, lparms.vrs[1]))
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abort ();
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a = vec_add (v,w);
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if (!vec_all_eq (a, c))
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abort ();
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}
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/* Paramter passing.
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s : gpr 3
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i : gpr 4
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v : vpr 2
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w : vpr 3
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*/
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void __attribute__ ((noinline))
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fcivv (char *s, int i, vector int v, vector int w)
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{
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vector int a, c = {6, 8, 10, 12};
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reg_parms_t lparms = gparms;
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if (s != (char *) lparms.gprs[0])
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abort();
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if ((long) i != lparms.gprs[1])
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abort();
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if (!vec_all_eq (v, lparms.vrs[0]))
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abort ();
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if (!vec_all_eq (w, lparms.vrs[1]))
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abort ();
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a = vec_add (v,w);
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if (!vec_all_eq (a, c))
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abort ();
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}
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/* Paramter passing.
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s : gpr 3
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v : slot 2-3
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w : slot 4-5
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*/
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void __attribute__ ((noinline))
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fcevv (char *s, ...)
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{
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vector int a, c = {6, 8, 10, 12};
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vector int v,w;
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stack_frame_t *sp;
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reg_parms_t lparms = gparms;
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va_list arg;
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va_start (arg, s);
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if (s != (char *) lparms.gprs[0])
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abort();
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v = va_arg(arg, vector int);
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w = va_arg(arg, vector int);
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a = vec_add (v,w);
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if (!vec_all_eq (a, c))
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abort ();
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/* Go back one frame. */
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sp = __builtin_frame_address(0);
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sp = sp->backchain;
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if (sp->slot[2].l != 0x100000002ULL
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|| sp->slot[4].l != 0x500000006ULL)
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abort();
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}
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/* Paramter passing.
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s : gpr 3
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i : gpr 4
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j : gpr 5
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v : slot 4-5
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w : slot 6-7
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*/
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void __attribute__ ((noinline))
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fciievv (char *s, int i, int j, ...)
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{
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vector int a, c = {6, 8, 10, 12};
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vector int v,w;
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stack_frame_t *sp;
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reg_parms_t lparms = gparms;
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va_list arg;
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va_start (arg, j);
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if (s != (char *) lparms.gprs[0])
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abort();
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if ((long) i != lparms.gprs[1])
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abort();
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if ((long) j != lparms.gprs[2])
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abort();
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v = va_arg(arg, vector int);
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w = va_arg(arg, vector int);
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a = vec_add (v,w);
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if (!vec_all_eq (a, c))
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abort ();
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sp = __builtin_frame_address(0);
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sp = sp->backchain;
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if (sp->slot[4].l != 0x100000002ULL
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|| sp->slot[6].l != 0x500000006ULL)
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abort();
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}
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void __attribute__ ((noinline))
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fcvevv (char *s, vector int x, ...)
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{
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vector int a, c = {7, 10, 13, 16};
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vector int v,w;
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stack_frame_t *sp;
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reg_parms_t lparms = gparms;
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va_list arg;
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va_start (arg, x);
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v = va_arg(arg, vector int);
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w = va_arg(arg, vector int);
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a = vec_add (v,w);
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a = vec_add (a, x);
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if (!vec_all_eq (a, c))
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abort ();
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sp = __builtin_frame_address(0);
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sp = sp->backchain;
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if (sp->slot[4].l != 0x100000002ULL
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|| sp->slot[6].l != 0x500000006ULL)
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abort();
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}
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void fnp_cvvvv();
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int __attribute__((no_instrument_function, noinline))
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main1()
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{
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char *s = "vv";
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vector int v = {1, 2, 3, 4};
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vector int w = {5, 6, 7, 8};
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fcvi (s, v, 2);
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fcvv (s, v, w);
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fnp_cvvvv (s, v, w, v, w);
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fcivv (s, 1, v, w);
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fcevv (s, v, w);
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fciievv (s, 1, 2, v, w);
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fcvevv (s, v, v, w);
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return 0;
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}
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int __attribute__((no_instrument_function))
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main()
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{
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/* Exit on systems without altivec. */
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signal (SIGILL, sig_ill_handler);
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/* Altivec instruction, 'vor %v0,%v0,%v0'. */
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asm volatile (".long 0x10000484");
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signal (SIGILL, SIG_DFL);
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return main1 ();
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}
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/* Paramter passing.
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Function called with no prototype.
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s : gpr 3
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v : vpr 2 gpr 5-6
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w : vpr 3 gpr 7-8
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x : vpr 4 gpr 9-10
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y : vpr 5 slot 8-9
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*/
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void
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fnp_cvvvv (char *s, vector int v, vector int w,
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vector int x, vector int y)
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{
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vector int a, c = {12, 16, 20, 24};
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reg_parms_t lparms = gparms;
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stack_frame_t *sp;
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vector_int_t v0, v1, v2, v3;
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if (s != (char *) lparms.gprs[0])
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abort();
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if (!vec_all_eq (v, lparms.vrs[0]))
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abort ();
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if (!vec_all_eq (w, lparms.vrs[1]))
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abort ();
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if (!vec_all_eq (x, lparms.vrs[2]))
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abort ();
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if (!vec_all_eq (y, lparms.vrs[3]))
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abort ();
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a = vec_add (v,w);
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a = vec_add (a,x);
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a = vec_add (a,y);
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if (!vec_all_eq (a, c))
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abort ();
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v0.v = lparms.vrs[0];
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v1.v = lparms.vrs[1];
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v2.v = lparms.vrs[2];
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v3.v = lparms.vrs[3];
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if (v0.l[0] != lparms.gprs[2])
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abort ();
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if (v0.l[1] != lparms.gprs[3])
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abort ();
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if (v1.l[0] != lparms.gprs[4])
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abort ();
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if (v1.l[1] != lparms.gprs[5])
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abort ();
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if (v2.l[0] != lparms.gprs[6])
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abort ();
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if (v2.l[1] != lparms.gprs[7])
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abort ();
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sp = __builtin_frame_address(0);
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sp = sp->backchain;
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if (sp->slot[8].l != v3.l[0])
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abort ();
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if (sp->slot[9].l != v3.l[1])
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abort ();
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}
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