From 04dc44ac2176a137c38eff59138df59b230e6ee1 Mon Sep 17 00:00:00 2001 From: Terry Guo Date: Tue, 11 Nov 2014 09:18:35 +0000 Subject: [PATCH] invoke.texi (-masm-syntax-unified): Reword and fix typo. 2014-11-11 Terry Guo * doc/invoke.texi (-masm-syntax-unified): Reword and fix typo. * config/arm/thumb1.md (*thumb_mulsi3): Use movs to move low registers. (*thumb1_movhf): Likewise. From-SVN: r217341 --- gcc/ChangeLog | 7 +++++++ gcc/config/arm/thumb1.md | 12 ++++++------ gcc/doc/invoke.texi | 10 ++++------ 3 files changed, 17 insertions(+), 12 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index eac19cf30bb..b19ce48fb01 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2014-11-11 Terry Guo + + * doc/invoke.texi (-masm-syntax-unified): Reword and fix typo. + * config/arm/thumb1.md (*thumb_mulsi3): Use movs to move low + registers. + (*thumb1_movhf): Likewise. + 2014-11-11 Uros Bizjak * sreal.c (sreal::to_int): Use INTTYPE_MAXIMUM (int64_t) diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md index 8a2abe9610c..3d6f80b7de3 100644 --- a/gcc/config/arm/thumb1.md +++ b/gcc/config/arm/thumb1.md @@ -131,12 +131,10 @@ (mult:SI (match_operand:SI 1 "register_operand" "%l,*h,0") (match_operand:SI 2 "register_operand" "l,l,l")))] "TARGET_THUMB1 && !arm_arch6" - "* - if (which_alternative < 2) - return \"mov\\t%0, %1\;muls\\t%0, %2\"; - else - return \"muls\\t%0, %2\"; - " + "@ + movs\\t%0, %1\;muls\\t%0, %2 + mov\\t%0, %1\;muls\\t%0, %2 + muls\\t%0, %2" [(set_attr "length" "4,4,2") (set_attr "type" "muls")] ) @@ -787,6 +785,8 @@ "* switch (which_alternative) { + case 0: + return \"movs\\t%0, %1\"; case 1: { rtx addr; diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index cd20b6e3784..13270bc25ee 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -13040,13 +13040,11 @@ off by default. @item -masm-syntax-unified @opindex masm-syntax-unified -Assume the Thumb1 inline assembly code are using unified syntax. -The default is currently off, which means divided syntax is assumed. +Assume inline assembler is using unified asm syntax. The default is +currently off which implies divided syntax. Currently this option is +available only for Thumb1 and has no effect on ARM state and Thumb2. However, this may change in future releases of GCC. Divided syntax -should be considered deprecated. This option has no effect when -generating Thumb2 code. Thumb2 assembly code always uses unified syntax. -This option has no effect for ARM state assembly code which will still -uses divided syntax. +should be considered deprecated. @item -mrestrict-it @opindex mrestrict-it