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ChangeLog: Follow spelling conventions. 

* ChangeLog: Follow spelling conventions.
	* ChangeLog.0: Likewise.
	* ChangeLog.1: Likewise.
	* ChangeLog.2: Likewise.
	* ChangeLog.3: Likewise.
	* ChangeLog.4: Likewise.
	* ChangeLog.5: Likewise.
	* ChangeLog.6: Likewise.
	* FSFChangeLog.10: Likewise.
	* FSFChangeLog.11: Likewise.
	* c-common.c: Likewise.
	* c-common.h: Likewise.
	* c-format.c: Likewise.
	* c-opts.c: Likewise.
	* cpplib.c: Likewise.
	* langhooks.h: Likewise.
	* real.c: Likewise.
	* reg-stack.c: Likewise.
	* toplev.c: Likewise.
	* config/arm/arm.c: Likewise.
	* config/arm/arm.md: Likewise.
	* config/arm/linux-gas.h: Likewise.
	* config/arm/netbsd.h: Likewise.
	* config/c4x/c4x.c: Likewise.
	* config/c4x/c4x.h: Likewise.
	* config/c4x/c4x.md: Likewise.
	* config/c4x/libgcc.S: Likewise.
	* config/fr30/fr30.md: Likewise.
	* config/frv/frv.md: Likewise.
	* config/ia64/ia64.md: Likewise.
	* config/mips/mips.h: Likewise.
	* config/mn10300/mn10300.c: Likewise.
	* config/stormy16/stormy16.c: Likewise.
	* config/v850/v850.md: Likewise.
	* doc/extend.texi: Likewise.
	* doc/invoke.texi: Likewise.
	* doc/md.texi: Likewise.

From-SVN: r57166
This commit is contained in:
Kazu Hirata 2002-09-15 18:24:08 +00:00
parent 3baab4840e
commit 05713b80e0
37 changed files with 102 additions and 62 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

44
gcc/ChangeLog
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@ -1,3 +1,43 @@
2002-09-15 Kazu Hirata <kazu@cs.umass.edu>
* ChangeLog: Follow spelling conventions.
* ChangeLog.0: Likewise.
* ChangeLog.1: Likewise.
* ChangeLog.2: Likewise.
* ChangeLog.3: Likewise.
* ChangeLog.4: Likewise.
* ChangeLog.5: Likewise.
* ChangeLog.6: Likewise.
* FSFChangeLog.10: Likewise.
* FSFChangeLog.11: Likewise.
* c-common.c: Likewise.
* c-common.h: Likewise.
* c-format.c: Likewise.
* c-opts.c: Likewise.
* cpplib.c: Likewise.
* langhooks.h: Likewise.
* real.c: Likewise.
* reg-stack.c: Likewise.
* toplev.c: Likewise.
* config/arm/arm.c: Likewise.
* config/arm/arm.md: Likewise.
* config/arm/linux-gas.h: Likewise.
* config/arm/netbsd.h: Likewise.
* config/c4x/c4x.c: Likewise.
* config/c4x/c4x.h: Likewise.
* config/c4x/c4x.md: Likewise.
* config/c4x/libgcc.S: Likewise.
* config/fr30/fr30.md: Likewise.
* config/frv/frv.md: Likewise.
* config/ia64/ia64.md: Likewise.
* config/mips/mips.h: Likewise.
* config/mn10300/mn10300.c: Likewise.
* config/stormy16/stormy16.c: Likewise.
* config/v850/v850.md: Likewise.
* doc/extend.texi: Likewise.
* doc/invoke.texi: Likewise.
* doc/md.texi: Likewise.
2002-09-15 Jason Thorpe <thorpej@wasabisystems.com>
* config/netbsd.h (LIB_SPEC): Include the appropriate pthread
@ -9823,7 +9863,7 @@ Tue Jun 4 19:29:42 CEST 2002 Jan Hubicka <jh@suse.cz>
(gt_ggc_m_tree_node): Likewise.
* varasm.c (copy_constant): Call expand_constant if we hit
something we can't recognise.
something we can't recognize.
* ggc-common.c (ggc_mark_rtvec_children): Delete.
(ggc_mark_rtx_children): Use generic name for ggc_mark_rtvec.
@ -24905,7 +24945,7 @@ Mon Feb 4 09:05:58 2002 Jeffrey A Law (law@redhat.com)
* cpphash.c (_cpp_init_hashtable): Similarly.
* cppinit.c (cpp_create_reader): Default the signed_char flag.
(init_builtins): Define __CHAR_UNSIGNED__ appropriately.
(COMMAND_LINE_OPTIONS): Recognise -f{un,}signed-char.
(COMMAND_LINE_OPTIONS): Recognize -f{un,}signed-char.
(cpp_handle_option): Handle the new options.
* cpplex.c (cpp_interpret_charconst): Use new flag.
* cpplib.h (struct cpp_options): New member signed_char.

2
gcc/ChangeLog.0
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@ -12000,7 +12000,7 @@ Wed Sep 10 11:49:20 1997 Jason Merrill <jason@yorick.cygnus.com>
EXCEPTION_SECTION, mark the start of the frame info with a
collectible tag.
* collect2.c (frame_tables): New list.
(is_ctor_dtor): Recognise frame entries.
(is_ctor_dtor): Recognize frame entries.
(scan_prog_file): Likewise.
(main): Pass -fno-exceptions to sub-compile. Also do collection
if there are any frame entries.

4
gcc/ChangeLog.1
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@ -469,7 +469,7 @@ Sun May 2 15:16:42 1999 Joseph S. Myers <jsm28@cam.ac.uk>
(ASSEMBLER_DIALECT): Define.
(CONDITIONAL_REGISTER_USAGE): Rename floating point registers if
required for the UNIX assembler.
(ASM_OUTPUT_INT): Remove. The compiler will synthesise it.
(ASM_OUTPUT_INT): Remove. The compiler will synthesize it.
(ASM_OUTPUT_ADDR_VEC_PROLOGUE): Remove.
(ASM_OPEN_PAREN, ASM_CLOSE_PAREN): Change to "[" and "]".
(TRAMPOLINE_TEMPLATE): Use ASM_OUTPUT_SHORT.
@ -4454,7 +4454,7 @@ Mon Feb 22 19:36:33 1999 Andrew Cagney <cagney@b1.cygnus.com>
StrongARM.
(arm_is_6_or_7): New variable: true iff the target processor is an
ARM6 or and ARM7.
(arm_select): Fields reorganised.
(arm_select): Fields reorganized.
(struct processors): processor_type field removed.
(all_procs): Remove.
(all_cores): New array: Definitions of all known ARM cpu cores.

14
gcc/ChangeLog.2
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@ -2434,10 +2434,10 @@ Thu Nov 18 11:10:03 1999 Jan Hubicka <hubicka@freesoft.cz>
1999-11-18 Nick Clifton <nickc@cygnus.com>
* toplev.c (main): Correctly detect an unrecognised option.
* toplev.c (main): Correctly detect an unrecognized option.
* cppinit.c (cpp_handle_option): Do not claim to have consumed
a -f option if it has not been recognised.
a -f option if it has not been recognized.
Thu Nov 18 00:59:11 1999 Michael Gschwind <mikeg@alagoas.watson.ibm.com>
@ -4782,7 +4782,7 @@ Tue Oct 19 15:26:11 1999 Richard Earnshaw (rearnsha@arm.com)
Tue Oct 19 14:01:34 1999 Nick Clifton <nickc@cygnus.com>
* toplev.c (main): Do not generate an error message if an
unrecognised command line switch is recognisable by another
unrecognized command line switch is recognisable by another
language. If extra_warnings are enabled, then generate a
warning message instead.
@ -4960,7 +4960,7 @@ Sat Oct 16 13:42:29 1999 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
Sat Oct 16 13:37:46 1999 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
* config/c4x/c4x.md (movstrqi_small): Utilise parallel move
* config/c4x/c4x.md (movstrqi_small): Utilize parallel move
instructions.
Sat Oct 16 13:26:47 1999 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
@ -8316,7 +8316,7 @@ Thu Sep 9 13:46:06 1999 Geoffrey Keating <geoffk@cygnus.com>
* cppexp.c (cpp_lex): Handle `defined (xxx)' for poisoned xxx.
Include cpphash.h.
* cpphash.c (special_symbol): Handle plain `xxx' for poisoned xxx.
* cpplib.c (do_define): Generalise to handle poisoned definitions,
* cpplib.c (do_define): Generalize to handle poisoned definitions,
redefining poisoned identifiers, etc.
(do_undef): Don't allow poisoned identifiers to be undefined.
(do_pragma): Add #pragma poison.
@ -8325,7 +8325,7 @@ Thu Sep 9 13:46:06 1999 Geoffrey Keating <geoffk@cygnus.com>
* cccp.c: Add T_POISON node type.
(special_symbol): Handle `defined(xxx)' and plain `xxx' for
poisoned xxx.
(do_define): Generalise to handle poisoned definitions,
(do_define): Generalize to handle poisoned definitions,
redefining poisoned identifiers, etc.
(do_undef): Don't allow poisoned identifiers to be undefined.
(do_pragma): Add #pragma poison.
@ -14093,7 +14093,7 @@ Wed Jun 2 12:25:55 1999 Richard Henderson <rth@cygnus.com>
Wed Jun 2 08:42:55 1999 Nick Clifton <nickc@cygnus.com>
* config/arm/tcoff.h (USER_LABEL_PREFIX): Synchronise with
* config/arm/tcoff.h (USER_LABEL_PREFIX): Synchronize with
definition in config/arm/coff.h
* config/arm/coff.h: Add comment about USER_LABEL_PREFIX.

2
gcc/ChangeLog.3
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@ -10805,7 +10805,7 @@ Wed Feb 23 13:00:06 CET 2000 Jan Hubicka <jh@suse.cz>
* gcc.c (do_spec_1): Catch the case where %* is used in a
substitution pattern, but it has not been initialized.
Issue a meaningful error message if an unrecognised operator
Issue a meaningful error message if an unrecognized operator
is encountered in a spec string.
2000-03-14 Richard Earnshaw <rearnsha@arm.com>

2
gcc/ChangeLog.4
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@ -142,7 +142,7 @@
* c-parse.in (select_or_iter_stmt): Use truthvalue_conversion
on the condition of a FOR statement, so that it gets typechecked
and optimised.
and optimized.
2000-12-29 Alexandre Oliva <aoliva@redhat.com>

4
gcc/ChangeLog.5
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@ -11536,7 +11536,7 @@ Mon Jan 29 20:38:19 2001 Christopher Faylor <cgf@cygnus.com>
2001-01-27 Michael Sokolov <msokolov@ivan.Harhan.ORG>
* fixproto: Correctly install synthesised unistd.h and stdlib.h when
* fixproto: Correctly install synthesized unistd.h and stdlib.h when
they didn't need fixing.
2001-01-27 Janis Johnson <janis@us.ibm.com>
@ -11922,7 +11922,7 @@ Sun Jan 21 09:44:17 2001 Denis Chertykov <denisc@overta.ru>
* config/avr/avr.c (ret_cond_branch): New argument (reverse) added.
If REVERSE nonzero then condition code in X must be reversed.
(encode_section_info): Optimise if/else.
(encode_section_info): Optimize if/else.
(avr_function_value): Fix formatting.
* config/avr/avr.md (branch): Call to ret_cond_branch changed.

2
gcc/ChangeLog.6
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@ -995,7 +995,7 @@ Mon Dec 17 18:27:52 CET 2001 Jan Hubicka <jh@suse.cz>
Mon Dec 17 17:57:05 CET 2001 Jan Hubicka <jh@suse.cz>
* Makefile.in (cfgcleanup.o): Add cselib.h dependancy.
* Makefile.in (cfgcleanup.o): Add cselib.h dependency.
* basic-block.h (CLEANUP_THREADING): New constant.
* cfgcleanup.c: Include cselib.h
(thread_jump, mark_effect): New functions.

2
gcc/FSFChangeLog.10
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@ -8552,7 +8552,7 @@ Tue Apr 25 18:52:43 1995 Stephen R. van den Berg (berg@pool.informatik.rwth-aa
Delete the no_live_regs shortcut to save space.
Use stackentry state to determine filled registers.
(replace_reg): Accept COMPLEX_FLOAT as well.
(move_for_stack_reg): Optimise away some pointer dereferencing.
(move_for_stack_reg): Optimize away some pointer dereferencing.
(subst_stack_regs): Make sure the stack is in the right order
and of the right size for register passing.
(goto_block_pat): Make sure the stack is in the right order

4
gcc/FSFChangeLog.11
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@ -2636,7 +2636,7 @@ Wed Sep 10 11:49:20 1997 Jason Merrill <jason@yorick.cygnus.com>
EXCEPTION_SECTION, mark the start of the frame info with a
collectable tag.
* collect2.c (frame_tables): New list.
(is_ctor_dtor): Recognise frame entries.
(is_ctor_dtor): Recognize frame entries.
(scan_prog_file): Likewise.
(main): Pass -fno-exceptions to sub-compile. Also do collection
if there are any frame entries.
@ -3948,7 +3948,7 @@ Sun Aug 3 21:57:31 1997 Jim Meyering <meyering@eng.ascend.com>
Sun Aug 3 21:54:51 1997 Nick Burrett <n.a.burrett@btinternet.com>
* cpplib.c (cpp_start_read): Recognise suffixes 'cp' and 'c++'.
* cpplib.c (cpp_start_read): Recognize suffixes 'cp' and 'c++'.
Sun Aug 3 19:18:27 1997 Ralf Baechle <ralf@uni-koblenz.de>

4
gcc/c-common.c
View File

@ -303,7 +303,7 @@ int warn_char_subscripts;
int warn_conversion;
/* Warn about #pragma directives that are not recognised. */
/* Warn about #pragma directives that are not recognized. */
int warn_unknown_pragmas; /* Tri state variable. */
@ -4947,7 +4947,7 @@ builtin_define_float_constants (name_prefix, fp_suffix, type)
sprintf (name, "__%s_DIG__", name_prefix);
builtin_define_with_int_value (name, dig);
/* The minimum negative int x such that b**(x-1) is a normalised float. */
/* The minimum negative int x such that b**(x-1) is a normalized float. */
sprintf (name, "__%s_MIN_EXP__", name_prefix);
sprintf (buf, "(%d)", min_exp);
builtin_define_with_value (name, buf, 0);

2
gcc/c-common.h
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@ -477,7 +477,7 @@ extern int warn_char_subscripts;
extern int warn_conversion;
/* Warn about #pragma directives that are not recognised. */
/* Warn about #pragma directives that are not recognized. */
extern int warn_unknown_pragmas; /* Tri state variable. */

2
gcc/c-format.c
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@ -286,7 +286,7 @@ decode_format_attr (args, info, validated_p)
/* Check a call to a format function against a parameter list. */
/* The meaningfully distinct length modifiers for format checking recognised
/* The meaningfully distinct length modifiers for format checking recognized
by GCC. */
enum format_lengths
{

4
gcc/c-opts.c
View File

@ -1199,7 +1199,7 @@ c_common_decode_option (argc, argv)
break;
case OPT_ftabstop:
/* Don't recognise -fno-tabstop=. */
/* Don't recognize -fno-tabstop=. */
if (!on)
return 0;
@ -1640,7 +1640,7 @@ set_Wimplicit (on)
}
/* Args to -d specify what to dump. Silently ignore
unrecognised options; they may be aimed at toplev.c. */
unrecognized options; they may be aimed at toplev.c. */
static void
handle_OPT_d (arg)
const char *arg;

6
gcc/config/arm/arm.c
View File

@ -831,7 +831,7 @@ arm_isr_value (argument)
if (streq (arg, ptr->arg))
return ptr->return_value;
/* An unrecognised interrupt type. */
/* An unrecognized interrupt type. */
return ARM_FT_UNKNOWN;
}
@ -1034,7 +1034,7 @@ arm_split_constant (code, mode, val, target, source, subtargets)
&& REGNO (target) != REGNO (source)))
{
/* After arm_reorg has been called, we can't fix up expensive
constants by pushing them into memory so we must synthesise
constants by pushing them into memory so we must synthesize
them in-line, regardless of the cost. This is only likely to
be more costly on chips that have load delay slots and we are
compiling without running the scheduler (so no splitting
@ -7859,7 +7859,7 @@ emit_multi_reg_push (mask)
num_dwarf_regs--;
/* For the body of the insn we are going to generate an UNSPEC in
parallel with several USEs. This allows the insn to be recognised
parallel with several USEs. This allows the insn to be recognized
by the push_multi pattern in the arm.md file. The insn looks
something like this:

4
gcc/config/arm/arm.md
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@ -3913,7 +3913,7 @@
;; DONE;
;;}")
;; Recognise garbage generated above.
;; Recognize garbage generated above.
;;(define_insn ""
;; [(set (match_operand:TI 0 "general_operand" "=r,r,r,<,>,m")
@ -4682,7 +4682,7 @@
"
)
;; Pattern to recognise insn generated default case above
;; Pattern to recognize insn generated default case above
(define_insn "*movhi_insn_arch4"
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r")
(match_operand:HI 1 "general_operand" "rI,K,r,m"))]

2
gcc/config/arm/linux-gas.h
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@ -45,7 +45,7 @@ Boston, MA 02111-1307, USA. */
#undef WCHAR_TYPE_SIZE
#define WCHAR_TYPE_SIZE BITS_PER_WORD
/* Emit code to set up a trampoline and synchronise the caches. */
/* Emit code to set up a trampoline and synchronize the caches. */
#undef INITIALIZE_TRAMPOLINE
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \

2
gcc/config/arm/netbsd.h
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@ -148,7 +148,7 @@ Boston, MA 02111-1307, USA. */
#undef DEFAULT_STRUCTURE_SIZE_BOUNDARY
#define DEFAULT_STRUCTURE_SIZE_BOUNDARY 8
/* Emit code to set up a trampoline and synchronise the caches. */
/* Emit code to set up a trampoline and synchronize the caches. */
#undef INITIALIZE_TRAMPOLINE
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \

2
gcc/config/c4x/c4x.c
View File

@ -1469,7 +1469,7 @@ c4x_check_legit_addr (mode, addr, strict)
switch (code)
{
/* Register indirect with auto increment/decrement. We don't
allow SP here---push_operand should recognise an operand
allow SP here---push_operand should recognize an operand
being pushed on the stack. */
case PRE_DEC:

2
gcc/config/c4x/c4x.h
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@ -1470,7 +1470,7 @@ CUMULATIVE_ARGS;
Note that we return, rather than break so that rtx_cost doesn't
include CONST_COSTS otherwise expand_mult will think that it is
cheaper to synthesise a multiply rather than to use a multiply
cheaper to synthesize a multiply rather than to use a multiply
instruction. I think this is because the algorithm synth_mult
doesn't take into account the loading of the operands, whereas the
calculation of mult_cost does.

14
gcc/config/c4x/c4x.md
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@ -29,7 +29,7 @@
; for QImode and Pmode, whether Pmode was QImode or PQImode.
; For addresses we wouldn't have to have a clobber of the CC
; associated with each insn and we could use MPYI in address
; calculations without having to synthesise a proper 32 bit multiply.
; calculations without having to synthesize a proper 32 bit multiply.
; Additional C30/C40 instructions not coded:
; CALLcond, IACK, IDLE, LDE, LDFI, LDII, LDM, NORM, RETIcond
@ -1360,7 +1360,7 @@
; If one of the operands is not a register, then we should
; emit two insns, using a scratch register. This will produce
; better code in loops if the source operand is invariant, since
; the source reload can be optimised out. During reload we cannot
; the source reload can be optimized out. During reload we cannot
; use change_address or force_reg which will allocate new pseudo regs.
; Unlike most other insns, the move insns can't be split with
@ -2076,7 +2076,7 @@
{
if (GET_CODE (operands[2]) == CONST_INT)
{
/* Let GCC try to synthesise the multiplication using shifts
/* Let GCC try to synthesize the multiplication using shifts
and adds. In most cases this will be more profitable than
using the C3x MPYI. */
FAIL;
@ -3410,7 +3410,7 @@
; If one of the operands is not a register, then we should
; emit two insns, using a scratch register. This will produce
; better code in loops if the source operand is invariant, since
; the source reload can be optimised out. During reload we cannot
; the source reload can be optimized out. During reload we cannot
; use change_address or force_reg.
(define_expand "movqf"
[(set (match_operand:QF 0 "src_operand" "")
@ -5317,7 +5317,7 @@
; Note we have to emit a dbu instruction if there are no delay slots
; to fill.
; Also note that GCC will try to reverse a loop to see if it can
; utilise this instruction. However, if there are more than one
; utilize this instruction. However, if there are more than one
; memory reference in the loop, it cannot guarantee that reversing
; the loop will work :( (see check_dbra_loop() in loop.c)
; Note that the C3x only decrements the 24 LSBs of the address register
@ -5629,7 +5629,7 @@
; The current low overhead looping code is naff and is not failsafe
; If you want RTPB instructions to be generated, apply the patches
; from www.elec.canterbury.ac.nz/c4x. This will utilise the
; from www.elec.canterbury.ac.nz/c4x. This will utilize the
; doloop_begin and doloop_end patterns in this MD.
(define_expand "decrement_and_branch_on_count"
[(parallel [(set (pc)
@ -7315,7 +7315,7 @@
; The following two peepholes remove an unecessary load
; often found at the end of a function. These peepholes
; could be generalised to other binary operators. They shouldn't
; could be generalized to other binary operators. They shouldn't
; be required if we run a post reload mop-up pass.
(define_peephole
[(parallel [(set (match_operand:QF 0 "ext_reg_operand" "")

2
gcc/config/c4x/libgcc.S
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@ -48,7 +48,7 @@ Boston, MA 02111-1307, USA. */
;
; r[i + 1] = r[i] * (2.0 - v * r[i])
;
; The normalised error e[i] at the ith iteration is
; The normalized error e[i] at the ith iteration is
;
; e[i] = (r - r[i]) / r = (1 / v - r[i]) * v = (1 - v * r[i])
;

2
gcc/config/fr30/fr30.md
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@ -521,7 +521,7 @@
;;{{{ Floating Point Moves
;; Note - Patterns for SF mode moves are compulsory, but
;; patterns for DF are optional, as GCC can synthesise them.
;; patterns for DF are optional, as GCC can synthesize them.
(define_expand "movsf"
[(set (match_operand:SF 0 "general_operand" "")

4
gcc/config/frv/frv.md
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@ -1607,7 +1607,7 @@
;; Floating Point Moves
;;
;; Note - Patterns for SF mode moves are compulsory, but
;; patterns for DF are optional, as GCC can synthesise them.
;; patterns for DF are optional, as GCC can synthesize them.
(define_expand "movsf"
[(set (match_operand:SF 0 "general_operand" "")
@ -2258,7 +2258,7 @@
;; Signed conversions from a smaller integer to a larger integer
;;
;; These operations are optional. If they are not
;; present GCC will synthesise them for itself
;; present GCC will synthesize them for itself
;; Even though frv does not provide these instructions, we define them
;; to allow load + sign extend to be collapsed together
(define_insn "extendqihi2"

2
gcc/config/ia64/ia64.md
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@ -766,7 +766,7 @@
;; Floating Point Moves
;;
;; Note - Patterns for SF mode moves are compulsory, but
;; patterns for DF are optional, as GCC can synthesise them.
;; patterns for DF are optional, as GCC can synthesize them.
(define_expand "movsf"
[(set (match_operand:SF 0 "general_operand" "")

2
gcc/config/mips/mips.h
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@ -123,7 +123,7 @@ enum block_move_type {
BLOCK_MOVE_LAST /* generate just the last store */
};
/* Information about one recognised processor. Defined here for the
/* Information about one recognized processor. Defined here for the
benefit of TARGET_CPU_CPP_BUILTINS. */
struct mips_cpu_info {
/* The 'canonical' name of the processor as far as GCC is concerned.

2
gcc/config/mn10300/mn10300.c
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@ -647,7 +647,7 @@ notice_update_cc (body, insn)
}
}
/* Recognise the PARALLEL rtx generated by mn10300_gen_multiple_store().
/* Recognize the PARALLEL rtx generated by mn10300_gen_multiple_store().
This function is for MATCH_PARALLEL and so assumes OP is known to be
parallel. If OP is a multiple store, return a mask indicating which
registers it saves. Return 0 otherwise. */

2
gcc/config/stormy16/stormy16.c
View File

@ -476,7 +476,7 @@ xstormy16_secondary_reload_class (class, mode, x)
return NO_REGS;
}
/* Recognise a PLUS that needs the carry register. */
/* Recognize a PLUS that needs the carry register. */
int
xstormy16_carry_plus_operand (x, mode)
rtx x;

2
gcc/config/v850/v850.md
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@ -851,7 +851,7 @@
;; ??? This is very ugly. The right way to do this is to modify cmpsi so
;; that it doesn't emit RTL, and then modify the bcc/scc patterns so that
;; they emit RTL for the compare instruction. Unfortunately, this requires
;; lots of changes that will be hard to sanitise. So for now, cmpsi still
;; lots of changes that will be hard to sanitize. So for now, cmpsi still
;; emits RTL, and I get the compare operands here from the previous insn.
(define_expand "movsicc"

4
gcc/cpplib.c
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@ -367,7 +367,7 @@ _cpp_handle_directive (pfile, indented)
if (dname->val.node->directive_index)
dir = &dtable[dname->val.node->directive_index - 1];
}
/* We do not recognise the # followed by a number extension in
/* We do not recognize the # followed by a number extension in
assembler code. */
else if (dname->type == CPP_NUMBER && CPP_OPTION (pfile, lang) != CLK_ASM)
{
@ -1984,7 +1984,7 @@ _cpp_pop_buffer (pfile)
}
}
/* Enter all recognised directives in the hash table. */
/* Enter all recognized directives in the hash table. */
void
_cpp_init_directives (pfile)
cpp_reader *pfile;

2
gcc/doc/extend.texi
View File

@ -7415,7 +7415,7 @@ Floating and complex non-type template parameters have been deprecated,
and are now removed from g++.
The implicit typename extension has been deprecated and will be removed
from g++ at some point. In some cases g++ determines that a dependant
from g++ at some point. In some cases g++ determines that a dependent
type such as @code{TPL<T>::X} is a type without needing a
@code{typename} keyword, contrary to the standard.

6
gcc/doc/invoke.texi
View File

@ -5841,7 +5841,7 @@ memory a feature of the ARM architecture allows a word load to be used,
even if the address is unaligned, and the processor core will rotate the
data as it is being loaded. This option tells the compiler that such
misaligned accesses will cause a MMU trap and that it should instead
synthesise the access as a series of byte accesses. The compiler can
synthesize the access as a series of byte accesses. The compiler can
still use word accesses to load half-word data if it knows that the
address is aligned to a word boundary.
@ -8589,10 +8589,10 @@ DBcond(D), instructions. This is enabled by default for the C4x. To be
on the safe side, this is disabled for the C3x, since the maximum
iteration count on the C3x is @math{2^{23} + 1} (but who iterates loops more than
@math{2^{23}} times on the C3x?). Note that GCC will try to reverse a loop so
that it can utilise the decrement and branch instruction, but will give
that it can utilize the decrement and branch instruction, but will give
up if there is more than one memory reference in the loop. Thus a loop
where the loop counter is decremented can generate slightly more
efficient code, in cases where the RPTB instruction cannot be utilised.
efficient code, in cases where the RPTB instruction cannot be utilized.
@item -mdp-isr-reload
@itemx -mparanoid

2
gcc/doc/md.texi
View File

@ -3533,7 +3533,7 @@ for comparisons whose argument is a @code{plus}.
@cindex looping instruction patterns
@cindex defining looping instruction patterns
Some machines have special jump instructions that can be utilised to
Some machines have special jump instructions that can be utilized to
make loops more efficient. A common example is the 68000 @samp{dbra}
instruction which performs a decrement of a register and a branch if the
result was greater than zero. Other machines, in particular digital

2
gcc/langhooks.h
View File

@ -186,7 +186,7 @@ struct lang_hooks
/* Function called with an option vector as argument, to decode a
single option (typically starting with -f or -W or +). It should
return the number of command-line arguments it uses if it handles
the option, or 0 and not complain if it does not recognise the
the option, or 0 and not complain if it does not recognize the
option. If this function returns a negative number, then its
absolute value is the number of command-line arguments used, but,
in addition, no language-independent option processing should be

2
gcc/real.c
View File

@ -5728,7 +5728,7 @@ ibmtoe (d, e, mode)
if (y[M] == 0 && y[M+1] == 0 && y[M+2] == 0 && y[M+3] == 0)
y[0] = y[E] = 0;
else
y[E] -= 5 + enormlz (y); /* now normalise the mantissa */
y[E] -= 5 + enormlz (y); /* now normalize the mantissa */
/* handle change in RADIX */
emovo (y, e);
}

2
gcc/reg-stack.c
View File

@ -353,7 +353,7 @@ next_flags_user (insn)
return NULL_RTX;
}
/* Reorganise the stack into ascending numbers,
/* Reorganize the stack into ascending numbers,
after this insn. */
static void

2
gcc/toplev.c
View File

@ -4008,7 +4008,7 @@ decode_f_option (arg)
else if (!strcmp (arg, "no-stack-limit"))
stack_limit_rtx = NULL_RTX;
else if (!strcmp (arg, "preprocessed"))
/* Recognise this switch but do nothing. This prevents warnings
/* Recognize this switch but do nothing. This prevents warnings
about an unrecognized switch if cpplib has not been linked in. */
;
else