re PR target/7282 (unrecognizable insn)
PR target/7282 * config/rs6000/rs6000.md (floatsidf2): Enable for POWERPC64. (floatunssidf2): Likewise. (floatsidf_ppc64): New insn_and_split. (floatunssidf_ppc64): Likewise. From-SVN: r55443
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@ -1,3 +1,11 @@
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2002-07-14 Alan Modra <amodra@bigpond.net.au>
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PR target/7282
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* config/rs6000/rs6000.md (floatsidf2): Enable for POWERPC64.
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(floatunssidf2): Likewise.
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(floatsidf_ppc64): New insn_and_split.
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(floatunssidf_ppc64): Likewise.
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2002-07-14 Andreas Jaeger <aj@suse.de>
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* config.gcc (sh64): Remove unused
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@ -5350,9 +5350,18 @@
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(clobber (match_dup 4))
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(clobber (match_dup 5))
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(clobber (match_dup 6))])]
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"! TARGET_POWERPC64 && TARGET_HARD_FLOAT"
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"TARGET_HARD_FLOAT"
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"
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{
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if (TARGET_POWERPC64)
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{
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rtx mem = assign_stack_temp (DImode, GET_MODE_SIZE (DImode), 0);
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rtx t1 = gen_reg_rtx (DImode);
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rtx t2 = gen_reg_rtx (DImode);
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emit_insn (gen_floatsidf_ppc64 (operands[0], operands[1], mem, t1, t2));
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DONE;
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}
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operands[2] = force_reg (SImode, GEN_INT (0x43300000));
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operands[3] = force_reg (DFmode, CONST_DOUBLE_ATOF (\"4503601774854144\", DFmode));
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operands[4] = assign_stack_temp (DFmode, GET_MODE_SIZE (DFmode), 0);
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@ -5417,9 +5426,19 @@
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(use (match_dup 3))
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(clobber (match_dup 4))
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(clobber (match_dup 5))])]
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"! TARGET_POWERPC64 && TARGET_HARD_FLOAT"
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"TARGET_HARD_FLOAT"
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"
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{
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if (TARGET_POWERPC64)
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{
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rtx mem = assign_stack_temp (DImode, GET_MODE_SIZE (DImode), 0);
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rtx t1 = gen_reg_rtx (DImode);
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rtx t2 = gen_reg_rtx (DImode);
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emit_insn (gen_floatunssidf_ppc64 (operands[0], operands[1], mem,
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t1, t2));
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DONE;
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}
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operands[2] = force_reg (SImode, GEN_INT (0x43300000));
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operands[3] = force_reg (DFmode, CONST_DOUBLE_ATOF (\"4503599627370496\", DFmode));
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operands[4] = assign_stack_temp (DFmode, GET_MODE_SIZE (DFmode), 0);
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@ -5535,6 +5554,36 @@
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"fcfid %0,%1"
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[(set_attr "type" "fp")])
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(define_insn_and_split "floatsidf_ppc64"
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[(set (match_operand:DF 0 "gpc_reg_operand" "=f")
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(float:DF (match_operand:SI 1 "gpc_reg_operand" "r")))
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(clobber (match_operand:DI 2 "memory_operand" "=o"))
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(clobber (match_operand:DI 3 "gpc_reg_operand" "=r"))
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(clobber (match_operand:DI 4 "gpc_reg_operand" "=f"))]
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"TARGET_POWERPC64 && TARGET_HARD_FLOAT"
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"#"
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""
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[(set (match_dup 3) (sign_extend:DI (match_dup 1)))
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(set (match_dup 2) (match_dup 3))
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(set (match_dup 4) (match_dup 2))
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(set (match_dup 0) (float:DF (match_dup 4)))]
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"")
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(define_insn_and_split "floatunssidf_ppc64"
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[(set (match_operand:DF 0 "gpc_reg_operand" "=f")
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(unsigned_float:DF (match_operand:SI 1 "gpc_reg_operand" "r")))
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(clobber (match_operand:DI 2 "memory_operand" "=o"))
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(clobber (match_operand:DI 3 "gpc_reg_operand" "=r"))
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(clobber (match_operand:DI 4 "gpc_reg_operand" "=f"))]
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"TARGET_POWERPC64 && TARGET_HARD_FLOAT"
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"#"
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""
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[(set (match_dup 3) (zero_extend:DI (match_dup 1)))
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(set (match_dup 2) (match_dup 3))
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(set (match_dup 4) (match_dup 2))
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(set (match_dup 0) (float:DF (match_dup 4)))]
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"")
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(define_insn "fix_truncdfdi2"
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[(set (match_operand:DI 0 "gpc_reg_operand" "=*f")
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(fix:DI (match_operand:DF 1 "gpc_reg_operand" "f")))]
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